Re: [PATCH v2 8/8] disas/riscv: Add support for XThead* instructions

On 2023/6/12 19:10, Christoph Muellner wrote: From: Christoph Müllner Support for emulating XThead* instruction has been added recently. This patch adds support for these instructions to the RISC-V disassembler. Co-developed-by: LIU Zhiwei Acked-by: Alistair Francis Signed-off-by: Christop

Re: [PATCH v2 2/8] target/riscv: Factor out extension tests to cpu_cfg.h

On 2023/6/12 19:10, Christoph Muellner wrote: From: Christoph Müllner This patch moves the extension test functions that are used to gate vendor extension decoders, into cpu_cfg.h. This allows to reuse them in the disassembler. This patch does not introduce new functionality. However, the pa

[PATCH v2 3/6] target/riscv: Add support for Zvfbfmin extension

Add trans_* and helper function for Zvfbfmin instructions. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson --- target/riscv/helper.h | 3 + target/riscv/insn32.decode | 4 ++ target/riscv/insn_trans/trans_rvbf16.c.inc

[PATCH v2 2/6] target/riscv: Add support for Zfbfmin extension

Add trans_* and helper function for Zfbfmin instructions. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson --- target/riscv/fpu_helper.c | 12 + target/riscv/helper.h | 4 ++ target/riscv/insn32.decode

[PATCH v2 6/6] target/riscv: Add disas support for BF16 extensions

Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- disas/riscv.c | 44 1 file changed, 44 insertions(+) diff --git a/disas/riscv.c b/disas/riscv.c index 5005364aba..44ea69315c 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -964,6 +964,16 @@

[PATCH v2 4/6] target/riscv: Add support for Zvfbfwma extension

Add trans_* and helper function for Zvfbfwma instructions. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson --- target/riscv/helper.h | 3 ++ target/riscv/insn32.decode | 4 ++ target/riscv/insn_trans/trans_rvbf16.c.inc

[PATCH v2 0/6] target/riscv: Add support for BF16 extensions

Specification for BF16 extensions can be found in: https://github.com/riscv/riscv-bfloat16 The port is available here: https://github.com/plctlab/plct-qemu/tree/plct-bf16-upstream-v2 v2: * Update dependancy check for BF16 extensions in patch 1 and patch 4 * Update encodings for BF16 instructions

[PATCH v2 1/6] target/riscv: Add properties for BF16 extensions

Add ext_zfbfmin/zvfbfmin/zvfbfwma properties. Add require check for BF16 extensions. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 20 target/riscv/cpu_cfg.h | 3 +++ 2 files changed, 23 insertions(

[PATCH v2 5/6] target/riscv: Expose properties for BF16 extensions

Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index dc6b2f72f6..feb0ee5e6f 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cp

Re: [PATCH 4/4] ppc/spapr: Move spapr nested HV to a new file

On 6/8/23 14:43, Nicholas Piggin wrote: Create spapr_nested.c for most of the nested HV implementation. Signed-off-by: Nicholas Piggin --- hw/ppc/meson.build | 1 + hw/ppc/spapr_hcall.c | 415 +- hw/ppc/spapr_nested.c | 496 +++

[PATCH 1/1] A new virtio pci device named virtio-vcpu-stall-watchdog-pci

Each vcpu creates a corresponding timer task. The watchdog is driven by a timer according to a certain period. Each time the timer expires, the counter is decremented. When the counter is "0", the watchdog considers the vcpu to be stalling and resets the VM. To avoid watchdog expiration, the guest

[PATCH 0/1] virtio: add a new vcpu stall watchdog

A new virtio pci device named virtio-vcpu-stall-watchdog-pci has been added to handle vcpu stalling hw/virtio/Kconfig | 5 + hw/virtio/meson.build | 2 + hw/virtio/virtio-vcpu-stall-watchdog-pci.c| 89 +++ hw/virtio/virtio-vcpu-stal

Re: [PATCH 2/4] ppc/spapr: Add a nested state struct

On Thu Jun 15, 2023 at 2:51 PM AEST, Harsh Prateek Bora wrote: > > > On 6/14/23 17:26, Nicholas Piggin wrote: > >>> @@ -1766,34 +1872,8 @@ void spapr_exit_nested(PowerPCCPU *cpu, int excp) > >>>address_space_unmap(CPU(cpu)->as, regs, len, len, true); > >>> > >>>out_restore_l1: > >>>

Re: [PATCH 2/4] target/tricore: Implement privilege level for all insns

On 6/14/23 18:59, Bastian Koppelmann wrote: Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 41 +- 1 file changed, 32 insertions(+), 9 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH 1/4] target/tricore: Introduce priv tb flag

On 6/14/23 18:59, Bastian Koppelmann wrote: +uint32_t tb_flags = (uint32_t)ctx->base.tb->flags; No need for the cast. Otherwise, Reviewed-by: Richard Henderson r~

[PATCH v2] hw/pci: prevent hotplug of devices on pcie-root-ports on the wrong slot

PCIE root ports and other upstream ports only allow one device on slot 0. When hotplugging a device on a pcie root port, make sure that the device address passed always represents slot 0. Any other slot value would be illegal on a root port. CC: jus...@redhat.com CC: imamm...@redhat.com Resolves:

Re: [PATCH 3/3] net: socket: remove net_init_socket()

On Fri, 9 Jun 2023 09:27:48 +0200 Laurent Vivier wrote: > Move the file descriptor type checking before doing anything with it. > If it's not usable, don't close it as it could be in use by another > part of QEMU, only fail and report an error. > > Signed-off-by: Laurent Vivier Reviewed-by: D

Re: [PATCH 2/3] net: socket: move fd type checking to its own function

On Fri, 9 Jun 2023 09:27:47 +0200 Laurent Vivier wrote: > Signed-off-by: Laurent Vivier Reviewed-by: David Gibson > --- > net/socket.c | 28 > 1 file changed, 20 insertions(+), 8 deletions(-) > > diff --git a/net/socket.c b/net/socket.c > index 24dcaa55bc46..6

Re: [PATCH 1/3] net: socket: prepare to cleanup net_init_socket()

On Fri, 9 Jun 2023 09:27:46 +0200 Laurent Vivier wrote: > Use directly net_socket_fd_init_stream() and net_socket_fd_init_dgram() > when the socket type is already known. > > Signed-off-by: Laurent Vivier This makes sense as a clean up regardless of the rest of the series. Reviewed-by: David

[PATCH] docs/devel: Document the tarball publishing/release process

This hopefully contains most of the information one would need to generate/publish QEMU tarballs and make the related announcements. The main goal is to quickly get others up to speed on the process so we can have multiple people able to handle releases at any point in time. Cc: Paolo Bonzini Cc:

Re: [PATCH 3/4] ppc/spapr: load and store l2 state with helper functions

On 6/14/23 17:32, Nicholas Piggin wrote: On Fri Jun 9, 2023 at 6:00 PM AEST, Harsh Prateek Bora wrote: On 6/8/23 14:43, Nicholas Piggin wrote: Arguably this is just shuffling around register accesses, but one nice thing it does is allow the exit to save away the L2 state then switch the en

Re: [PATCH 2/4] ppc/spapr: Add a nested state struct

On 6/14/23 17:26, Nicholas Piggin wrote: On Fri Jun 9, 2023 at 5:09 PM AEST, Harsh Prateek Bora wrote: On 6/8/23 14:43, Nicholas Piggin wrote: Rather than use a copy of CPUPPCState to store the host state while the environment has been switched to the L2, use a new struct for this purpose.

Re: [PULL 00/60] riscv-to-apply queue

nto > > staging (2023-06-10 07:25:00 -0700) > > > > are available in the Git repository at: > > > >https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20230614 > > > > for you to fetch changes up to 860029321d9ebdff47e89561de61e9441fead70a:

[PATCH v4 1/3] intel_iommu: Fix a potential issue in VFIO dirty page sync

Peter Xu found a potential issue: "The other thing is when I am looking at the new code I found that we actually extended the replay() to be used also in dirty tracking of vfio, in vfio_sync_dirty_bitmap(). For that maybe it's already broken if unmap_all() because afaiu log_sync() can be called i

[PATCH v4 3/3] intel_iommu: Fix address space unmap

During address space unmap, corresponding IOVA tree entries are also removed. But DMAMap is set beyond notifier's scope by 1, so in theory there is possibility to remove a continuous entry above the notifier's scope but falling in adjacent notifier's scope. There is no issue currently as no use ca

[PATCH v4 2/3] intel_iommu: Fix flag check in replay

Replay doesn't notify registered notifiers but the one passed to it. So it's meaningless to check the registered notifier's synthetic flag. There is no issue currently as all replay use cases have MAP flag set, but let's be robust. Signed-off-by: Zhenzhong Duan Reviewed-by: Peter Xu --- hw/i38

[PATCH v4 0/3] Some fixes on intel_iommu

Hi All, This patchset fixes a potential issue in VFIO dirty page sync and two trivial fixes for robust purpose. Tested net card passthrough, ping/ssh pass Tested DSA vdev passthrough, start dmatest then do live migration, pass. Checked the LM performance before and after patch, no explicit differ

Re: [PATCH v2 10/10] target/ppc: Get CPUState in one step

On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote: > We can get CPUState from env with env_cpu without going through > PowerPCCPU and casting that. > > Signed-off-by: BALATON Zoltan Acked-by: Nicholas Piggin > --- > target/ppc/excp_helper.c | 15 +++ > 1 file changed, 7 ins

Re: [PATCH v2 09/10] target/ppc: Simplify syscall exception handlers

On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote: > After previous changes the hypercall handling in 7xx and 74xx > exception handlers can be folded into one if statement to simpilfy > this code. > > Signed-off-by: BALATON Zoltan > --- > target/ppc/excp_helper.c | 26 ++--

Re: [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer

On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote: > Changing the parameter of cpu_interrupt_exittb() from CPUState to env > allows removing some more local CPUState variables in callers. I think it's more consistent to keep cs, which is same as cpu_interrupt(). Thanks, Nick

Re: [PATCH] hw/pci: prevent hotplug of devices on pcie-root-ports with wrong devfn address

> On 15-Jun-2023, at 2:23 AM, Michael S. Tsirkin wrote: > > On Wed, Jun 14, 2023 at 10:09:35PM +0530, Ani Sinha wrote: >> >> >>> On 14-Jun-2023, at 7:52 PM, Michael S. Tsirkin wrote: >>> >>> On Wed, Jun 14, 2023 at 06:01:50PM +0530, Ani Sinha wrote: PCIE root ports only allow one devi

Re: [PATCH] hw/pci: prevent hotplug of devices on pcie-root-ports with wrong devfn address

> On 15-Jun-2023, at 2:22 AM, Michael S. Tsirkin wrote: > > On Wed, Jun 14, 2023 at 10:31:40PM +0530, Ani Sinha wrote: >> >> >>> On 14-Jun-2023, at 6:31 PM, Igor Mammedov wrote: >>> >>> On Wed, 14 Jun 2023 18:01:50 +0530 >>> Ani Sinha wrote: >>> PCIE root ports only allow one device

Re: [PATCH v2 03/10] target/ppc: Move common check in exception handlers to a function

On Thu Jun 15, 2023 at 7:34 AM AEST, BALATON Zoltan wrote: > All powerpc exception handlers share some code when handling machine > check exceptions. Move this to a common function. > > Signed-off-by: BALATON Zoltan Reviewed-by: Nicholas Piggin > --- > target/ppc/excp_helper.c | 114 +-

Re: [kvm-unit-tests v4 00/12] powerpc: updates, P10, PNV support

On Wed Jun 14, 2023 at 11:09 AM AEST, Joel Stanley wrote: > On Thu, 8 Jun 2023 at 07:58, Nicholas Piggin wrote: > > > > Posting again, a couple of patches were merged and accounted for review > > comments from last time. > > I saw some failures in the spr tests running on a power9 powernv system:

Re: [PATCH v4 1/6] target/ppc: Fix instruction loading endianness in alignment interrupt

On Wed Jun 14, 2023 at 3:51 PM AEST, Anushree Mathur wrote: > > On 5/30/23 18:55, Nicholas Piggin wrote: > > powerpc ifetch endianness depends on MSR[LE] so it has to byteswap > > after cpu_ldl_code(). This corrects DSISR bits in alignment > > interrupts when running in little endian mode. > > > >

Re: [PATCH 0/4] ppc/pnv: Add chiptod and core timebase state machine models

On Wed Jun 14, 2023 at 6:54 PM AEST, Cédric Le Goater wrote: > On 6/14/23 07:14, Nicholas Piggin wrote: > > On Tue Jun 6, 2023 at 11:59 PM AEST, Cédric Le Goater wrote: > >> On 6/4/23 01:36, Nicholas Piggin wrote: > >>> This adds support for chiptod and core timebase state machine models in > >>> t

Re: [PATCH 03/10] target/ppc: Move common check in exception handlers to a function

On Wed Jun 14, 2023 at 4:25 PM AEST, Cédric Le Goater wrote: > On 6/14/23 05:35, Nicholas Piggin wrote: > > On Mon Jun 12, 2023 at 8:42 AM AEST, BALATON Zoltan wrote: > >> All powerpc exception handlers share some code when handling machine > >> check exceptions. Move this to a common function. > >

Re: [PATCH 09/10] target/ppc: Simplify syscall exception handlers

On Thu Jun 15, 2023 at 7:33 AM AEST, BALATON Zoltan wrote: > On Wed, 14 Jun 2023, Nicholas Piggin wrote: > > On Mon Jun 12, 2023 at 8:42 AM AEST, BALATON Zoltan wrote: > >> After previous changes the hypercall handling in 7xx and 74xx > >> exception handlers can be folded into one if statement to s

Re: [PATCH 08/10] target/ppc: Fix gen_sc to use correct nip

On Thu Jun 15, 2023 at 7:27 AM AEST, BALATON Zoltan wrote: > On Wed, 14 Jun 2023, Nicholas Piggin wrote: > > On Mon Jun 12, 2023 at 8:42 AM AEST, BALATON Zoltan wrote: > >> Most exceptions are raised with nip pointing to the faulting > >> instruction but the sc instruction generating a syscall exce

Re: [PATCH 04/10] target/ppc: Use env_cpu for cpu_abort in excp_helper

On Wed Jun 14, 2023 at 8:13 PM AEST, BALATON Zoltan wrote: > On Wed, 14 Jun 2023, Nicholas Piggin wrote: > > On Mon Jun 12, 2023 at 8:42 AM AEST, BALATON Zoltan wrote: > >> Use the env_cpu function to get the CPUState for cpu_abort. These are > >> only needed in case of fatal errors so this allows

Re: [PATCH 06/10] target/ppc: Readability improvements in exception handlers

On Wed Jun 14, 2023 at 8:07 PM AEST, BALATON Zoltan wrote: > On Wed, 14 Jun 2023, Nicholas Piggin wrote: > > On Mon Jun 12, 2023 at 8:42 AM AEST, BALATON Zoltan wrote: > >> Improve readability by shortening some long comments, removing > >> comments that state the obvious and dropping some empty li

[QEMU][PATCH v8 00/11] Introduce xenpvh machine for arm architecture

Hi, Rebased and resending the series with latest QEMU as it's been quite sometime. There is one line code change in patch 04/10. Rest is just rebased with latest. This series add xenpvh machine for aarch64. Motivation behind creating xenpvh machine with IOREQ and TPM was to enable each guest on Xe

[QEMU][PATCH v8 06/11] hw/xen/xen-hvm-common: skip ioreq creation on ioreq registration failure

From: Stefano Stabellini On ARM it is possible to have a functioning xenpv machine with only the PV backends and no IOREQ server. If the IOREQ server creation fails continue to the PV backends initialization. Also, moved the IOREQ registration and mapping subroutine to new function xen_do_ioreq_

[QEMU][PATCH v8 09/11] hw/arm: introduce xenpvh machine

Add a new machine xenpvh which creates a IOREQ server to register/connect with Xen Hypervisor. Optional: When CONFIG_TPM is enabled, it also creates a tpm-tis-device, adds a TPM emulator and connects to swtpm running on host machine via chardev socket and support TPM functionalities for a guest do

[QEMU][PATCH v8 11/11] test/qtest: add xepvh to skip list for qtest

Like existing xen machines, xenpvh also cannot be used for qtest. Signed-off-by: Vikram Garhwal --- tests/qtest/libqtest.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c index 77de16227f..de03ef5f60 100644 --- a/tests/qtest/l

[QEMU][PATCH v8 04/11] xen-hvm: reorganize xen-hvm and move common function to xen-hvm-common

From: Stefano Stabellini This patch does following: 1. creates arch_handle_ioreq() and arch_xen_set_memory(). This is done in preparation for moving most of xen-hvm code to an arch-neutral location, move the x86-specific portion of xen_set_memory to arch_xen_set_memory. Also, move han

[QEMU][PATCH v8 05/11] include/hw/xen/xen_common: return error from xen_create_ioreq_server

From: Stefano Stabellini This is done to prepare for enabling xenpv support for ARM architecture. On ARM it is possible to have a functioning xenpv machine with only the PV backends and no IOREQ server. If the IOREQ server creation fails, continue to the PV backends initialization. Signed-off-by

[QEMU][PATCH v8 10/11] meson.build: enable xenpv machine build for ARM

Add CONFIG_XEN for aarch64 device to support build for ARM targets. Signed-off-by: Vikram Garhwal Signed-off-by: Stefano Stabellini Reviewed-by: Alex Bennée --- meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meson.build b/meson.build index 481865bfa9..cfa98e9e2

[QEMU][PATCH v8 08/11] meson.build: do not set have_xen_pci_passthrough for aarch64 targets

From: Stefano Stabellini have_xen_pci_passthrough is only used for Xen x86 VMs. Signed-off-by: Stefano Stabellini Reviewed-by: Alex Bennée --- meson.build | 2 ++ 1 file changed, 2 insertions(+) diff --git a/meson.build b/meson.build index 34306a6205..481865bfa9 100644 --- a/meson.build +++

[QEMU][PATCH v8 03/11] hw/i386/xen/xen-hvm: move x86-specific fields out of XenIOState

From: Stefano Stabellini In preparation to moving most of xen-hvm code to an arch-neutral location, move: - shared_vmport_page - log_for_dirtybit - dirty_bitmap - suspend - wakeup out of XenIOState struct as these are only used on x86, especially the ones related to dirty logging. Updated XenIOS

[QEMU][PATCH v8 07/11] hw/xen/xen-hvm-common: Use g_new and error_report

Replace g_malloc with g_new and perror with error_report. Signed-off-by: Vikram Garhwal Reviewed-by: Stefano Stabellini Reviewed-by: Paul Durrant --- hw/xen/xen-hvm-common.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/xen/xen-hvm-common.c b/hw/xen/xen-hv

[QEMU][PATCH v8 02/11] hw/i386/xen: rearrange xen_hvm_init_pc

In preparation to moving most of xen-hvm code to an arch-neutral location, move non IOREQ references to: - xen_get_vmport_regs_pfn - xen_suspend_notifier - xen_wakeup_notifier - xen_ram_init towards the end of the xen_hvm_init_pc() function. This is done to keep the common ioreq functions in one

[QEMU][PATCH v8 01/11] hw/i386/xen/: move xen-mapcache.c to hw/xen/

xen-mapcache.c contains common functions which can be used for enabling Xen on aarch64 with IOREQ handling. Moving it out from hw/i386/xen to hw/xen to make it accessible for both aarch64 and x86. Signed-off-by: Vikram Garhwal Signed-off-by: Stefano Stabellini Reviewed-by: Paul Durrant --- hw/

[PATCH 11/12] hw/vmapple/apple-gfx: Introduce ParavirtualizedGraphics.Framework support

MacOS provides a framework (library) that allows any vmm to implement a paravirtualized 3d graphics passthrough to the host metal stack called ParavirtualizedGraphics.Framework (PVG). The library abstracts away almost every aspect of the paravirtualized device model and only provides and receives c

[PATCH 12/12] hw/vmapple/vmapple: Add vmapple machine type

Apple defines a new "vmapple" machine type as part of its proprietary macOS Virtualization.Framework vmm. This machine type is similar to the virt one, but with subtle differences in base devices, a few special vmapple device additions and a vastly different boot chain. This patch reimplements thi

[PATCH 08/12] hw/vmapple/aes: Introduce aes engine

VMApple contains an "aes" engine device that it uses to encrypt and decrypt its nvram. It has trivial hard coded keys it uses for that purpose. Add device emulation for this device model. Signed-off-by: Alexander Graf --- hw/vmapple/Kconfig | 2 + hw/vmapple/aes.c| 583 ++

[PATCH 10/12] hw/vmapple/cfg: Introduce vmapple cfg region

Instead of device tree or other more standardized means, VMApple passes platform configuration to the first stage boot loader in a binary encoded format that resides at a dedicated RAM region in physical address space. This patch models this configuration space as a qdev device which we can then m

[PATCH 07/12] gpex: Allow more than 4 legacy IRQs

Some boards such as vmapple don't do real legacy PCI IRQ swizzling. Instead, they just keep allocating more board IRQ lines for each new legacy IRQ. Let's support that mode by giving instantiators a new "nr_irqs" property they can use to support more than 4 legacy IRQ lines. In this mode, GPEX will

[PATCH 09/12] hw/vmapple/bdif: Introduce vmapple backdoor interface

The VMApple machine exposes AUX and ROOT block devices (as well as USB OTG emulation) via virtio-pci as well as a special, simple backdoor platform device. This patch implements this backdoor platform device to the best of my understanding. I left out any USB OTG parts; they're only needed for gue

[PATCH 06/12] hw: Add vmapple subdir

We will introduce a number of devices that are specific to the vmapple target machine. To keep them all tidily together, let's put them into a single target directory. Signed-off-by: Alexander Graf --- MAINTAINERS | 6 ++ hw/Kconfig | 1 + hw/meson.build | 1

[PATCH 05/12] hw/virtio: Add support for apple virtio-blk

Apple has its own virtio-blk PCI device ID where it deviates from the official virtio-pci spec slightly: It puts a new "apple type" field at a static offset in config space and introduces a new discard command. This patch adds a new qdev property called "apple-type" to virtio-blk-pci. When that pr

[PATCH 04/12] hvf: arm: Ignore writes to CNTP_CTL_EL0

MacOS unconditionally disables interrupts of the physical timer on boot and then continues to use the virtual one. We don't really want to support a full physical timer emulation, so let's just ignore those writes. Signed-off-by: Alexander Graf --- target/arm/hvf/hvf.c | 7 +++ 1 file change

[PATCH 01/12] build: Only define OS_OBJECT_USE_OBJC with gcc

Recent versions of macOS use clang instead of gcc. The OS_OBJECT_USE_OBJC define is only necessary when building with gcc. Let's not define it when building with clang. With this patch, I can successfully include GCD headers in QEMU when building with clang. Signed-off-by: Alexander Graf --- me

[PATCH 03/12] hvf: Increase number of possible memory slots

For PVG we will need more than the current 32 possible memory slots. Bump the limit to 512 instead. Signed-off-by: Alexander Graf --- accel/hvf/hvf-accel-ops.c | 2 +- include/sysemu/hvf_int.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/accel/hvf/hvf-accel-ops.c b/acc

[PATCH 04/12] hvf: arm: Ignore writes to CNTP_CTL_EL0

MacOS unconditionally disables interrupts of the physical timer on boot and then continues to use the virtual one. We don't really want to support a full physical timer emulation, so let's just ignore those writes. Signed-off-by: Alexander Graf --- target/arm/hvf/hvf.c | 7 +++ 1 file change

[PATCH 02/12] hw/misc/pvpanic: Add MMIO interface

In addition to the ISA and PCI variants of pvpanic, let's add an MMIO platform device that we can use in embedded arm environments. Signed-off-by: Alexander Graf --- hw/misc/Kconfig | 4 +++ hw/misc/meson.build | 1 + hw/misc/pvpanic-mmio.c| 66 +

[PATCH 00/12] Introduce new vmapple machine type

This patch set introduces a new ARM and HVF specific machine type called "vmapple". It mimicks the device model that Apple's proprietary Virtualization.Framework exposes, but implements it in QEMU. With this new machine type, you can run macOS guests on Apple Silicon systems via HVF. To do so, you

[PATCH v3 2/6] ebpf: Added eBPF initialization by fds.

It allows using file descriptors of eBPF provided outside of QEMU. QEMU may be run without capabilities for eBPF and run RSS program provided by management tool(g.e. libvirt). Signed-off-by: Andrew Melnychenko --- ebpf/ebpf_rss-stub.c | 6 ++ ebpf/ebpf_rss.c | 27 ++

[PATCH v3 1/6] ebpf: Added eBPF map update through mmap.

Changed eBPF map updates through mmaped array. Mmaped arrays provide direct access to map data. It should omit using bpf_map_update_elem() call, which may require capabilities that are not present. Signed-off-by: Andrew Melnychenko --- ebpf/ebpf_rss.c | 117 ++

[PATCH v3 3/6] virtio-net: Added property to load eBPF RSS with fds.

eBPF RSS program and maps may now be passed during initialization. Initially was implemented for libvirt to launch qemu without permissions, and initialized eBPF program through the helper. Signed-off-by: Andrew Melnychenko --- hw/net/virtio-net.c| 55 ++--

[PATCH v3 4/6] ebpf: Added declaration/initialization routines.

Now, the binary objects may be retrieved by id. It would require for future qmp commands that may require specific eBPF blob. Signed-off-by: Andrew Melnychenko --- ebpf/ebpf.c | 70 ebpf/ebpf.h | 31 + ebpf/ebpf_rss.c

[PATCH v3 6/6] ebpf: Updated eBPF program and skeleton.

Updated section name, so libbpf should init/gues proper program type without specifications during open/load. Signed-off-by: Andrew Melnychenko --- ebpf/rss.bpf.skeleton.h | 1469 --- tools/ebpf/rss.bpf.c|2 +- 2 files changed, 741 insertions(+), 730 d

[PATCH v3 5/6] qmp: Added new command to retrieve eBPF blob.

Added command "request-ebpf". This command returns eBPF program encoded base64. The program taken from the skeleton and essentially is an ELF object that can be loaded in the future with libbpf. Signed-off-by: Andrew Melnychenko --- qapi/ebpf.json| 55

[PATCH v3 0/6] eBPF RSS through QMP support.

This series of patches provides the ability to retrieve eBPF program through qmp, so management application may load bpf blob with proper capabilities. Now, virtio-net devices can accept eBPF programs and maps through properties as external file descriptors. Access to the eBPF map is direct throug

[PATCH v2 10/10] target/ppc: Get CPUState in one step

We can get CPUState from env with env_cpu without going through PowerPCCPU and casting that. Signed-off-by: BALATON Zoltan --- target/ppc/excp_helper.c | 15 +++ 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 66

[PATCH v2 00/10] Misc clean ups to target/ppc exception handling

These are some small clean ups for target/ppc/excp_helper.c trying to make this code a bit simpler. No functional change is intended. v2: Patch 3 changes according to review, added tags Regards, BALATON Zoltan BALATON Zoltan (10): target/ppc: Remove some superfluous parentheses target/ppc: R

[PATCH v2 02/10] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup()

CPUState is rarely needed by this function (only for logging a fatal error) and it's easy to get from the env parameter so passing it separately is not necessary. Signed-off-by: BALATON Zoltan Acked-by: Nicholas Piggin --- target/ppc/excp_helper.c | 9 - 1 file changed, 4 insertions(+),

[PATCH v2 01/10] target/ppc: Remove some superfluous parentheses

Signed-off-by: BALATON Zoltan Acked-by: Nicholas Piggin --- target/ppc/excp_helper.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 12d8a7257b..8298217e78 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc

[PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer

Changing the parameter of cpu_interrupt_exittb() from CPUState to env allows removing some more local CPUState variables in callers. Signed-off-by: BALATON Zoltan --- target/ppc/excp_helper.c | 9 +++-- target/ppc/helper_regs.c | 15 ++- target/ppc/helper_regs.h | 2 +- 3 files

[PATCH v2 08/10] target/ppc: Fix gen_sc to use correct nip

Most exceptions are raised with nip pointing to the faulting instruction but the sc instruction generating a syscall exception leaves nip pointing to next instruction. Fix gen_sc to not use gen_exception_err() which sets nip back but correctly set nip to pc_next so we don't have to patch this in th

[PATCH v2 03/10] target/ppc: Move common check in exception handlers to a function

All powerpc exception handlers share some code when handling machine check exceptions. Move this to a common function. Signed-off-by: BALATON Zoltan --- target/ppc/excp_helper.c | 114 +-- 1 file changed, 25 insertions(+), 89 deletions(-) diff --git a/target/

[PATCH v2 07/10] target/ppd: Remove unused define

Commit 7a3fe174b12d removed usage of POWERPC_SYSCALL_VECTORED, drop the unused define as well. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Nicholas Piggin --- target/ppc/translate.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/ppc/translate.c b/t

[PATCH v2 06/10] target/ppc: Readability improvements in exception handlers

Improve readability by shortening some long comments, removing comments that state the obvious and dropping some empty lines so they don't distract when reading the code. Signed-off-by: BALATON Zoltan Acked-by: Nicholas Piggin --- target/ppc/cpu.h | 1 + target/ppc/excp_helper.c | 180

[PATCH v2 09/10] target/ppc: Simplify syscall exception handlers

After previous changes the hypercall handling in 7xx and 74xx exception handlers can be folded into one if statement to simpilfy this code. Signed-off-by: BALATON Zoltan --- target/ppc/excp_helper.c | 26 ++ 1 file changed, 10 insertions(+), 16 deletions(-) diff --git a/

[PATCH v2 04/10] target/ppc: Use env_cpu for cpu_abort in excp_helper

Use the env_cpu function to get the CPUState for cpu_abort. These are only needed in case of fatal errors so this allows to avoid casting and storing CPUState in a local variable wnen not needed. Signed-off-by: BALATON Zoltan --- target/ppc/excp_helper.c | 118 +--

Re: [PATCH 09/10] target/ppc: Simplify syscall exception handlers

On Wed, 14 Jun 2023, Nicholas Piggin wrote: On Mon Jun 12, 2023 at 8:42 AM AEST, BALATON Zoltan wrote: After previous changes the hypercall handling in 7xx and 74xx exception handlers can be folded into one if statement to simpilfy this code. Signed-off-by: BALATON Zoltan --- target/ppc/excp_

Re: [PATCH 08/10] target/ppc: Fix gen_sc to use correct nip

On Wed, 14 Jun 2023, Nicholas Piggin wrote: On Mon Jun 12, 2023 at 8:42 AM AEST, BALATON Zoltan wrote: Most exceptions are raised with nip pointing to the faulting instruction but the sc instruction generating a syscall exception leaves nip pointing to next instruction. Fix gen_sc to not use gen

Re: [PATCH] hw/pci: prevent hotplug of devices on pcie-root-ports with wrong devfn address

On Wed, Jun 14, 2023 at 10:09:35PM +0530, Ani Sinha wrote: > > > > On 14-Jun-2023, at 7:52 PM, Michael S. Tsirkin wrote: > > > > On Wed, Jun 14, 2023 at 06:01:50PM +0530, Ani Sinha wrote: > >> PCIE root ports only allow one device on slot 0/function 0. > > > > > > Why do you say this? PCI dev

Re: [PATCH] hw/pci: prevent hotplug of devices on pcie-root-ports with wrong devfn address

On Wed, Jun 14, 2023 at 10:31:40PM +0530, Ani Sinha wrote: > > > > On 14-Jun-2023, at 6:31 PM, Igor Mammedov wrote: > > > > On Wed, 14 Jun 2023 18:01:50 +0530 > > Ani Sinha wrote: > > > >> PCIE root ports only allow one device on slot 0/function 0. When > >> hotplugging a > >> device on a pc

Re: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers

On Mon, 5 Jun 2023, BALATON Zoltan wrote: We don't emulate the gigabit ethernet part of the chip but the MorphOS driver accesses these and expects to get some valid looking result otherwise it hangs. Add some minimal dummy implementation to avoid rhis. Signed-off-by: BALATON Zoltan --- This is

Re: [PATCH V2] migration: file URI

On Wed, Jun 14, 2023 at 02:59:54PM -0300, Fabiano Rosas wrote: > In this message Daniel mentions virDomainSnapshotXXX which would benefit > from using the same "file" migration, but being done live: > > https://lore.kernel.org/r/zd7mrgq+4qsdb...@redhat.com > > And from your response here: > http

Re: [PATCH V2] migration: file URI

Peter Xu writes: > On Wed, Jun 14, 2023 at 12:47:41PM -0300, Fabiano Rosas wrote: >> Peter Xu writes: >> >> > On Mon, Jun 12, 2023 at 03:39:34PM -0400, Steven Sistare wrote: >> >> On 6/12/2023 2:44 PM, Peter Xu wrote: >> >> > Hi, Steve, >> >> > >> >> > On Wed, Jun 07, 2023 at 11:38:59AM -0700,

Re: [PATCH] hw/pci: prevent hotplug of devices on pcie-root-ports with wrong devfn address

> On 14-Jun-2023, at 6:31 PM, Igor Mammedov wrote: > > On Wed, 14 Jun 2023 18:01:50 +0530 > Ani Sinha wrote: > >> PCIE root ports only allow one device on slot 0/function 0. When hotplugging >> a >> device on a pcie root port, make sure that the device address passed is >> always 0x00 that

[PATCH 4/4] target/tricore: Fix ICR.IE offset in RESTORE insn

from ISA v1.6.1 onwards the bit position of ICR.IE changed. ctx->icr_ie_offset contains the correct value for the ISA version used by the vCPU. Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/tricore/tr

[PATCH 3/4] target/tricore: Honour privilege changes on PSW write

the CPU can change the privilege level by writing the corresponding bits in PSW. If this happens all instructions after this 'mtcr' in the TB are translated with the wrong privilege level. So we have to exit to the cpu_loop() and start translating again with the new privilege level. Signed-off-by:

[PATCH 0/4] TriCore Privilege Levels

Hi, this patch series tries to properly implement privilege levels for the TriCore, as discussed in https://lore.kernel.org/qemu-devel/20230118090319.32n4uto7ogy3gfr6@schnipp.zuhause/. While implementing privilege traps for the SV/UM1 only insns, I saw that the RESTORE insn uses the wrong ICR.IE

[PATCH 1/4] target/tricore: Introduce priv tb flag

Signed-off-by: Bastian Koppelmann --- target/tricore/cpu.h | 17 - target/tricore/translate.c | 15 +-- 2 files changed, 21 insertions(+), 11 deletions(-) diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 041fc0b6e5..257fcf3cee 100644 --- a/target/t

[PATCH 2/4] target/tricore: Implement privilege level for all insns

Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 41 +- 1 file changed, 32 insertions(+), 9 deletions(-) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index a0644dd120..edbc319fa1 100644 --- a/target/tricore/translate.c

Re: [PATCH] hw/pci: prevent hotplug of devices on pcie-root-ports with wrong devfn address

> On 14-Jun-2023, at 7:52 PM, Michael S. Tsirkin wrote: > > On Wed, Jun 14, 2023 at 06:01:50PM +0530, Ani Sinha wrote: >> PCIE root ports only allow one device on slot 0/function 0. > > > Why do you say this? PCI devices can be multifunction. Yeah you are right, the language needs correctio

Re: [PATCH v2 20/20] qemu-file: Make qemu_file_get_error_obj() static

On Tue, May 30, 2023 at 08:39:41PM +0200, Juan Quintela wrote: > It was not used outside of qemu_file.c anyways. > > Signed-off-by: Juan Quintela Reviewed-by: Peter Xu -- Peter Xu

  1   2   >