On 4/1/23 22:59, BALATON Zoltan wrote:
Also update PowerMac family docs with some more recent info.
Signed-off-by: BALATON Zoltan
---
docs/about/deprecated.rst| 7 +++
docs/system/ppc/powermac.rst | 12
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/do
On 4/1/23 22:59, BALATON Zoltan wrote:
Besides resolving the confusing behaviour mentioned in previous commit
this might also allow unifying qemu-system-ppc and qemu-system-ppc64
in the future.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 6 ++
1 file changed, 6 insertions(+
On 4/1/23 22:59, BALATON Zoltan wrote:
We already have machine in a local variable so no need to use
qdev_get_machine(), also remove now unneded line break.
Typo "unneeded".
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 3 +--
hw/ppc/mac_oldworld.c | 3 +--
2 files changed, 2
On 1/4/23 13:35, Michael S. Tsirkin wrote:
> On Wed, Jan 04, 2023 at 10:01:38AM +0100, Laszlo Ersek wrote:
>> The modern ACPI CPU hotplug interface was introduced in the following
>> series (aa1dd39ca307..679dd1a957df), released in v2.7.0:
>>
>> 1 abd49bc2ed2f docs: update ACPI CPU hotplug spec
On 04/01/2023 21.10, Laurent Vivier wrote:
On 1/4/23 19:37, Thomas Huth wrote:
On 03/01/2023 12.00, Laurent Vivier wrote:
Signed-off-by: Laurent Vivier
Acked-by: Michael S. Tsirkin
---
Notes:
v4:
- rework EXPECT_STATE()
- use g_dir_make_tmp()
v3:
- Add "-M none"
On 1/4/23 08:55, Sid Manning wrote:
ptw.c:S1_ptw_translate
After migrating to v7.2.0, an issue was found where we were not getting the correct
virtual address from a load insn. Reading the address used in the load insn from the
debugger resulted in the execution of the insn getting the correc
On 1/4/23 16:37, Richard Henderson wrote:
On 1/4/23 16:26, Richard Henderson wrote:
From the failures I see on the gitlab merge job, I think I need to resubmit with this
new test adjusted to loop less,
+ for (i = 0; i < 5; i++) {
here.
The failing jobs are --enable-debug, and take
On 1/4/23 13:58, Fabiano Rosas wrote:
When TCG is disabled this part of the code should not be reachable, so
wrap it with an ifdef for now.
This allows us to start using CONFIG_TCG=n (--disable-tcg in the
configure line).
Signed-off-by: Fabiano Rosas
---
As I understand it, only a small part of
On Fri, Dec 30, 2022 at 11:07:25PM +0100, Jason A. Donenfeld wrote:
> The setup_data links are appended to the compressed kernel image. Since
> the kernel image is typically loaded at 0x10, setup_data lives at
> `0x10 + compressed_size`, which does not get relocated during the
> kernel's bo
On 1/4/23 13:58, Fabiano Rosas wrote:
This struct has no dependencies on TCG code and it is being used in
target/arm/ptw.c to simplify the passing around of page table walk
results. Those routines can be reached by KVM code via the gdbstub
breakpoint code, so take the structure out of CONFIG_TCG
On 1/4/23 13:58, Fabiano Rosas wrote:
This struct has no dependencies on TCG code and it is being used in
target/arm/ptw.c to simplify the passing around of page table walk
results. Those routines can be reached by KVM code via the gdbstub
breakpoint code, so take the structure out of CONFIG_TCG
On 1/4/23 13:58, Fabiano Rosas wrote:
@@ -25,6 +25,7 @@
#include "qemu/config-file.h"
#include "qemu/option.h"
#include "qemu/units.h"
+#include "sysemu/tcg.h"
/* Kernel boot protocol is specified in the kernel docs
* Documentation/arm/Booting and Documentation/arm64/booting.txt
@@
On 1/4/23 13:58, Fabiano Rosas wrote:
From: Claudio Fontana
the exception code needs some adjustment before being exposed to
KVM-only builds. We need to call arm_rebuild_hflags only when TCG is
enabled, or we will error out.
The direct call to helper_rebuild_hflags_a64(env, new_el) will not
be
On 1/4/23 13:58, Fabiano Rosas wrote:
Code moved verbatim, except for a couple of ifdef CONFIG_TCG that were
dropped.
Signed-off-by: Fabiano Rosas
---
Extracted from:
https://lore.kernel.org/r/20210416162824.25131-15-cfont...@suse.de
[RFC v14 14/80] target/arm: split cpregs from tcg/helper.c
---
On 1/4/23 13:58, Fabiano Rosas wrote:
Code moved verbatim.
Signed-off-by: Fabiano Rosas
---
Extracted from:
https://lore.kernel.org/r/20210416162824.25131-15-cfont...@suse.de
[RFC v14 14/80] target/arm: split cpregs from tcg/helper.c
---
target/arm/cpregs.c| 482 +++
On 1/4/23 13:58, Fabiano Rosas wrote:
Since commit cf7c6d1004 ("target/arm: Split out cpregs.h") we now have
a cpregs.h header which is more suitable for this code.
Code moved verbatim.
Signed-off-by: Fabiano Rosas
---
Extracted from:
https://lore.kernel.org/r/20210416162824.25131-15-cfont...@s
On 1/4/23 13:58, Fabiano Rosas wrote:
This code doesn't need to be buried in helper.c. Let's move it to its
own file to keep things cleaner.
Code moved verbatim.
Signed-off-by: Fabiano Rosas
---
Extracted from:
https://lore.kernel.org/r/20210416162824.25131-15-cfont...@suse.de
[RFC v14 14/80] t
On 1/4/23 13:58, Fabiano Rosas wrote:
From: Claudio Fontana
Signed-off-by: Claudio Fontana
Signed-off-by: Fabiano Rosas
---
Included {sme,mve}_helper.c and left a couple of files behind that
still have non-tcg code to be removed from them:
helper.c (and op_helper.h as a dep)
vfp_helper.c
Origi
On 1/4/23 13:58, Fabiano Rosas wrote:
This function is needed by common code (ptw.c), so move it along with
the other regime_* functions in internal.h. When we enable the build
without TCG, the tlb_helper.c file will not be present.
Maybe better to just move to ptw.c?
r~
Signed-off-by: Fab
On Tue, Jan 03, 2023 at 11:06:37PM +, Sean Christopherson wrote:
> On Tue, Jan 03, 2023, Wang, Wei W wrote:
> > On Tuesday, January 3, 2023 9:40 AM, Chao Peng wrote:
> > > > Because guest memory defaults to private, and now this patch stores
> > > > the attributes with KVM_MEMORY_ATTRIBUTE_PRIV
On 1/4/2023 5:18 PM, Philippe Mathieu-Daudé wrote:
> On 4/1/23 20:29, Chuck Zmudzinski wrote:
> > On 1/4/23 1:48 PM, Philippe Mathieu-Daudé wrote:
>
> >> Here TYPE_PIIX3_DEVICE means for "PCI function part of the PIIX
> >> south bridge chipset, which expose a PCI-to-ISA bridge". A better
> >> name
On 1/4/2023 5:35 PM, Philippe Mathieu-Daudé wrote:
> On 4/1/23 17:42, Chuck Zmudzinski wrote:
> > On 1/4/23 9:44 AM, Bernhard Beschow wrote:
> >> During the last patches, TYPE_PIIX3_XEN_DEVICE turned into a clone of
> >> TYPE_PIIX3_DEVICE. Remove this redundancy.
> >>
> >> Signed-off-by: Bernhard B
On Thu, Dec 22, 2022 at 09:36:39PM +0100, Marcel Holtmann wrote:
> The libvhost-user and libvduse libraries are also useful for external
> usage outside of QEMU and thus it would be nice if their files could
> be just copied and used. However due to different compiler settings, a
> lot of manual fi
On 1/4/23 5:35 PM, Philippe Mathieu-Daudé wrote:
> On 4/1/23 17:42, Chuck Zmudzinski wrote:
>> On 1/4/23 9:44 AM, Bernhard Beschow wrote:
>>> During the last patches, TYPE_PIIX3_XEN_DEVICE turned into a clone of
>>> TYPE_PIIX3_DEVICE. Remove this redundancy.
>>>
>>> Signed-off-by: Bernhard Beschow
On Thu, Dec 22, 2022 at 01:08:09PM +0100, Markus Armbruster wrote:
> Back in 2016, we discussed[1] rules for headers, and these were
> generally liked:
>
> 1. Have a carefully curated header that's included everywhere first. We
>got that already thanks to Peter: osdep.h.
>
> 2. Headers shoul
On Fri, Dec 23, 2022 at 10:34:36AM +0100, David Hildenbrand wrote:
> On 22.12.22 12:02, David Hildenbrand wrote:
> > For virtio-mem, we want to have the plugged/unplugged state of memory
> > blocks available before migrating any actual RAM content. This
> > information is immutable on the migration
On 1/4/23 16:26, Richard Henderson wrote:
From the failures I see on the gitlab merge job, I think I need to resubmit with this new
test adjusted to loop less,
+ for (i = 0; i < 5; i++) {
here.
The failing jobs are --enable-debug, and take about 115 seconds to run manually on our
a
On 12/29/22 16:02, Richard Henderson wrote:
From: Ilya Leoshkevich
Add a test that locklessly changes and exercises page protection bits
from various threads. This helps catch race conditions in the VMA
handling.
Acked-by: Alex Bennée
Signed-off-by: Ilya Leoshkevich
Message-Id: <202212231202
Hello,
I got reports from several users trying to run AmigaOS4 on sam460ex on
Apple silicon Macs that they get missing graphics that I can't reproduce
on x86_64. With help from the users who get the problem we've narrowed it
down to the following:
It looks like that data written to the sm501
On 1/4/23 23:35, Philippe Mathieu-Daudé wrote:
Hi Cédric,
On 4/1/23 09:43, Cédric Le Goater wrote:
On 1/3/23 18:33, Peter Maydell wrote:
Can we use the write_bootloader() function, which handles the
endianness question correctly and is how other boards do the
"put a little lump of code into
On Mon, Dec 19, 2022 at 2:45 PM Alex Bennée wrote:
>
>
> Thomas Huth writes:
>
> > Many users forget to remove the suggestions from the bug template
> > when creating a new issue. So when searching for strings like "s390x"
> > or "Windows", you get a lot of unrelated issues in the results.
> > Th
From: Claudio Fontana
Skip the test_device_intro_concrete for now for ARM KVM-only build,
as on ARM we currently build devices for ARM that are not
compatible with a KVM-only build.
We can remove this workaround when we fix this in KConfig etc,
and we only list and build machines that are compat
On Wed, 2023-01-04 at 22:30 +1000, Alistair Francis wrote:
> On Thu, Dec 22, 2022 at 8:40 AM Alistair Francis
> wrote:
> >
> > From: Wilfred Mallawa
> >
> > use the `FIELD32_1CLEAR` macro to implement register
> > `rw1c` functionality to `ibex_spi`.
> >
> > This change was tested by running th
Hi Cédric,
On 4/1/23 09:43, Cédric Le Goater wrote:
On 1/3/23 18:33, Peter Maydell wrote:
Can we use the write_bootloader() function, which handles the
endianness question correctly and is how other boards do the
"put a little lump of code into the guest" job ?
Yes. See below.
May be we co
On 4/1/23 22:58, Fabiano Rosas wrote:
This introduces the target/arm/tcg directory. Its purpose is to hold
the TCG code that is selected by CONFIG_TCG.
Signed-off-by: Fabiano Rosas
---
We could squash this onto the next one perhaps.
Yes please.
Reviewed-by: Philippe Mathieu-Daudé
---
MA
The header hw/input/adb.h is included by some files that don't need
it. Clean it up and include only where necessary.
Signed-off-by: BALATON Zoltan
---
hw/misc/macio/cuda.c | 2 --
hw/misc/macio/pmu.c | 3 ---
hw/misc/mos6522.c| 1 -
include/hw/misc/mac_via.h| 1
On 4/1/23 20:29, Chuck Zmudzinski wrote:
On 1/4/23 1:48 PM, Philippe Mathieu-Daudé wrote:
Here TYPE_PIIX3_DEVICE means for "PCI function part of the PIIX
south bridge chipset, which expose a PCI-to-ISA bridge". A better
name could be TYPE_PIIX3_ISA_PCI_DEVICE. Unfortunately this
device is name
On 3/1/23 18:43, Peter Maydell wrote:
On Thu, 22 Dec 2022 at 21:55, Philippe Mathieu-Daudé wrote:
ARM CPUs fetch instructions in little-endian.
smpboot[] encoded instructions are written in little-endian.
We call tswap32() on the array. tswap32 function swap a 32-bit
value if the target endi
The mac99 machine emulates different machines depending on machine
properties or even if it is run as qemu-system-ppc64 or
qemu-system-ppc. This is very confusing for users and many hours were
lost trying to explain it or finding out why commands users came up
with are not working as expected. (E.g
On 4/1/23 17:42, Chuck Zmudzinski wrote:
On 1/4/23 9:44 AM, Bernhard Beschow wrote:
During the last patches, TYPE_PIIX3_XEN_DEVICE turned into a clone of
TYPE_PIIX3_DEVICE. Remove this redundancy.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 4 +---
hw/isa/piix.c
The existing blk_add_insert_bs_notifier() and
blk_add_remove_bs_notifier() APIs only monitor changes to the
BlockBackend's root node. There is no way to find out if other nodes are
inserted or removed.
Add an API to monitor changes to the full graph. The next commit will
use this to reset blk_ram_
We converted all caller of pflash_cfi01_register() by open
coding a call to pflash_cfi01_create() followed by an explicit
call to sysbus_mmio_map(); we can now remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/pflash_cfi01.c | 19 ---
include/hw/block/flash.h | 9 --
Nothing here requires access to PFlashCFI01 internal fields:
use the inherited generic DeviceState.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/xtensa/xtfpga.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index bce3a543b0..b
Nothing here requires access to PFlashCFI01 internal fields:
use the inherited generic DeviceState.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc_sysfw.c | 14 +++---
include/hw/i386/pc.h | 3 +--
2 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/i386/pc_sysfw.c
This struct has no dependencies on TCG code and it is being used in
target/arm/ptw.c to simplify the passing around of page table walk
results. Those routines can be reached by KVM code via the gdbstub
breakpoint code, so take the structure out of CONFIG_TCG to make it
visible when building with --
Besides resolving the confusing behaviour mentioned in previous commit
this might also allow unifying qemu-system-ppc and qemu-system-ppc64
in the future.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/ppc/mac_newworld.c b/hw/
Convert the QOM PFlashCFI01 to a forward/opaque pointer declaration.
Only pflash_cfi01.c is able to poke at the internal fields.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/pflash_cfi01.c | 2 ++
include/hw/block/flash.h | 1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git
On 04/01/2023 19:53, Bernhard Beschow wrote:
Having a proxy PIC allows for ISA PICs to be created and wired up in
southbridges. This is especially useful for PIIX3 for two reasons:
First, the southbridge doesn't need to care about the virtualization
technology used (KVM, TCG, Xen) due to in-IRQs
Currently pflash_cfi02_register():
1/ creates a TYPE_PFLASH_CFI02 qdev instance
2/ maps the first MMIO region to the system bus
The first minor issue is the implicit sysbus mapping is not
obvious (the function name could mention it), and the function
is not documented.
Another issue is we are
On Wed, 4 Jan 2023 at 12:36, Thomas Huth wrote:
>
> The windows jobs (especially the 32-bit job) recently started to
> hit the timeout limit. Bump it a little bit to ease the situation
> (80 minutes is quite long already - OTOH, these jobs do not have to
> wait for a job from the container stage t
pflash_cfi01_register() hides an implicit sysbus mapping of
MMIO region #0. This is not practical in a heterogeneous world
where multiple cores use different address spaces. In order to
remove to remove pflash_cfi01_register() from the pflash API,
open-code it as a qdev creation call followed by an
The hflags are used only for TCG code, so introduce a new file
hflags.c to keep that code.
Signed-off-by: Fabiano Rosas
---
hw/arm/boot.c | 5 +-
target/arm/arm-powerctl.c | 8 +-
target/arm/helper.c| 337 +---
target/arm/internals.h
pflash_cfi01_register() hides an implicit sysbus mapping of
MMIO region #0. This is not practical in a heterogeneous world
where multiple cores use different address spaces. In order to
remove to remove pflash_cfi01_register() from the pflash API,
open-code it as a qdev creation call followed by an
Also update PowerMac family docs with some more recent info.
Signed-off-by: BALATON Zoltan
---
docs/about/deprecated.rst| 7 +++
docs/system/ppc/powermac.rst | 12
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/docs/about/deprecated.rst b/docs/about/depreca
On Sun, Dec 4, 2022 at 5:39 PM Wilfred Mallawa wrote:
>
> On Fri, 2022-12-02 at 19:52 -0500, John Snow wrote:
> > A few tiny touchups needed for cutting edge 'flake8' tooling, a minor
> > type touchup in iotests, and extending the python tests to cover the
> > recently released Python 3.11.
> >
>
Nothing here requires access to PFlashCFI01 internal fields:
use the inherited generic DeviceState.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/riscv/virt.c | 9 +
include/hw/riscv/virt.h | 3 +--
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/riscv/virt.c b/h
This is the remainder of the series that were postponed to after the
freeze the last time I've tried to submit them with some new patches
I did meanwhile.
BALATON Zoltan (7):
input/adb: Only include header where needed
mac_{old,new}world: Use local variable instead of qdev_get_machine()
mac_
pflash_cfi02_register() hides an implicit sysbus mapping of
MMIO region #0. This is not practical in a heterogeneous world
where multiple cores use different address spaces. In order to
remove to remove pflash_cfi02_register() from the pflash API,
open-code it as a qdev creation call followed by an
pflash_cfi01_register() hides an implicit sysbus mapping of
MMIO region #0. This is not practical in a heterogeneous world
where multiple cores use different address spaces. In order to
remove to remove pflash_cfi01_register() from the pflash API,
open-code it as a qdev creation call followed by an
The point of a getter() function is to not expose the structure
internal fields. Otherwise callers could simply access the
PFlashCFI01::mem field.
Have the callers pass a DeviceState* argument. The QOM
type check is done in the callee.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/pflash_c
Convert the QOM PFlashCFI02 to a forward/opaque pointer declaration.
Only pflash_cfi02.c is able to poke at the internal fields.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/pflash_cfi02.c | 2 ++
include/hw/block/flash.h | 1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git
The point of a getter() function is to not expose the structure
internal fields. Otherwise callers could simply access the
PFlashCFI01::blk field.
Have the callers pass a DeviceState* argument. The QOM
type check is done in the callee.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/sbsa-ref.c
When TCG is disabled this part of the code should not be reachable, so
wrap it with an ifdef for now.
This allows us to start using CONFIG_TCG=n (--disable-tcg in the
configure line).
Signed-off-by: Fabiano Rosas
---
As I understand it, only a small part of the ptw routines should be
necessary f
From: Claudio Fontana
on ARM we currently list and build all machines, even when
building KVM-only, without TCG.
Until we fix this (and we only list and build machines that are
compatible with KVM), only test specifically using the "virt"
machine in this case.
Signed-off-by: Claudio Fontana
Si
From: Claudio Fontana
make it clearer from the name that this is a tcg-only function.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Signed-off-by: Fabiano Rosas
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c
Paving the road toward heterogeneous QEMU, the limitations of
having a single machine sysbus become more apparent.
The sysbus_mmio_map() API forces the caller to map a sysbus
device to an address on the system bus (system bus here is
the root MemoryRegion returned by get_system_memory() ).
This i
From: Claudio Fontana
the exception code needs some adjustment before being exposed to
KVM-only builds. We need to call arm_rebuild_hflags only when TCG is
enabled, or we will error out.
The direct call to helper_rebuild_hflags_a64(env, new_el) will not
be possible when extracting out to common
We converted all caller of pflash_cfi02_register() by open
coding a call to pflash_cfi02_create() followed by an explicit
call to sysbus_mmio_map(); we can now remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/pflash_cfi02.c | 22 --
include/hw/block/flash.h | 12
pflash_cfi01_register() hides an implicit sysbus mapping of
MMIO region #0. This is not practical in a heterogeneous world
where multiple cores use different address spaces. In order to
remove to remove pflash_cfi01_register() from the pflash API,
open-code it as a qdev creation call followed by an
On 4/1/23 22:58, Fabiano Rosas wrote:
From: Claudio Fontana
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Fabiano Rosas
---
I also moved translate-{m-nocp,mve,neon,vfp,sme}.c
Originally from:
https://lore.kernel.org/r/20210416162824.2
Move this earlier to make the next patch diff cleaner. While here
update the comment slightly to not give the impression that the
misalignment affects only TCG.
Reviewed-by: Richard Henderson
Signed-off-by: Fabiano Rosas
---
target/arm/machine.c | 18 +-
1 file changed, 9 insert
On 4/1/23 22:58, Fabiano Rosas wrote:
From: Claudio Fontana
make it clearer from the name that this is a tcg-only function.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Signed-off-by: Fabiano Rosas
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 dele
From: Claudio Fontana
on ARM we currently list and build all machines, even when
building KVM-only, without TCG.
Until we fix this (and we only list and build machines that are
compatible with KVM), only test specifically using the "virt"
machine in this case.
Signed-off-by: Claudio Fontana
Si
The BDRV_REQ_REGISTERED_BUF flag can be set on I/O requests to indicate
that I/O buffers were previously registered using bdrv_register_buf().
block-ram-registrar automatically registers guest RAM so that emulated
storage controllers can set BDRV_REQ_REGISTERED_BUF without having to
worry about reg
Nothing here requires access to PFlashCFI01 internal fields:
use the inherited generic DeviceState.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/loongarch/virt.c | 9 -
include/hw/loongarch/virt.h | 3 +--
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/loongarc
This introduces the target/arm/tcg directory. Its purpose is to hold
the TCG code that is selected by CONFIG_TCG.
Signed-off-by: Fabiano Rosas
---
We could squash this onto the next one perhaps.
---
MAINTAINERS| 1 +
target/arm/meson.build | 4
target/arm/tcg/meson.build
Fix this:
ERROR: braces {} are necessary for all arms of this statement
Reviewed-by: Claudio Fontana
Reviewed-by: Cornelia Huck
Signed-off-by: Fabiano Rosas
---
target/arm/helper.c | 67 -
1 file changed, 42 insertions(+), 25 deletions(-)
diff --git
pflash_cfi02_register() hides an implicit sysbus mapping of
MMIO region #0. This is not practical in a heterogeneous world
where multiple cores use different address spaces. In order to
remove to remove pflash_cfi02_register() from the pflash API,
open-code it as a qdev creation call followed by an
Reviewed-by: Claudio Fontana
Reviewed-by: Cornelia Huck
Signed-off-by: Fabiano Rosas
---
target/arm/helper.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index ed3da5ada3..6b0840ee31 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.
Setting emulated machine type with a property called "via" is
confusing users so deprecate the "via" option in favour of newly added
explicit machine types. The default via=cuda option is not a valid
config (no real Mac has this combination of hardware) so no machine
type could be defined for that
From: Claudio Fontana
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Signed-off-by: Fabiano Rosas
---
target/arm/helper.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 2bb302e5d2..506c057675 1006
Since commit cf7c6d1004 ("target/arm: Split out cpregs.h") we now have
a cpregs.h header which is more suitable for this code.
Code moved verbatim.
Signed-off-by: Fabiano Rosas
---
Extracted from:
https://lore.kernel.org/r/20210416162824.25131-15-cfont...@suse.de
[RFC v14 14/80] target/arm: spli
Kevin pointed out that block-ram-registrar doesn't handle graph changes. New
nodes must have all of guest RAM registered before they can process I/O
requests with BDRV_REQ_REGISTERED_BUF.
These patches add a mechanism for monitoring graph changes and use it to
refresh registered buffers in block-r
This function is needed by common code (ptw.c), so move it along with
the other regime_* functions in internal.h. When we enable the build
without TCG, the tlb_helper.c file will not be present.
Signed-off-by: Fabiano Rosas
---
target/arm/internals.h | 17 ++---
target/arm/tlb_helpe
Add callbacks for graph changes and propagate them to the root via
child_of_bds. The purpose is to respond to graph changes.
This commit doesn't do anything on its own since the callbacks aren't
used by BlockBackend's child_root yet. That will be done in the next
commit.
Signed-off-by: Stefan Haj
From: Claudio Fontana
of note, cpreg lists were previously initialized by TCG first,
and then thrown away and replaced with the data coming from KVM.
Now we just initialize once, either for TCG or for KVM.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
[moved arm_cpu_register_g
Nothing here requires access to PFlashCFI01 internal fields:
use the inherited generic DeviceState.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/sbsa-ref.c | 12 ++--
hw/arm/vexpress.c | 12 +---
hw/arm/virt.c | 10 +-
include/hw/arm/virt.h | 3 +--
4
From: Claudio Fontana
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Fabiano Rosas
---
target/arm/meson.build | 1 -
target/arm/tcg/meson.build | 4
target/arm/{ => tcg}/psci.c | 0
3 files changed, 4 insertions(+), 1 deletion
From: Claudio Fontana
Remove some unused headers.
Signed-off-by: Claudio Fontana
Acked-by: Richard Henderson
Reviewed-by: Claudio Fontana
Reviewed-by: Cornelia Huck
Signed-off-by: Fabiano Rosas
---
target/arm/cpu.c | 1 -
target/arm/cpu64.c | 6 --
2 files changed, 7 deletions(-)
di
We already have machine in a local variable so no need to use
qdev_get_machine(), also remove now unneded line break.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 3 +--
hw/ppc/mac_oldworld.c | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/mac_newworld
Currently pflash_cfi01_register():
1/ creates a TYPE_PFLASH_CFI01 qdev instance
2/ maps the first MMIO region to the system bus
The first minor issue is the implicit sysbus mapping is not
obvious (the function name could mention it), and the function
is not documented.
Another issue is we are
By using pflash_cfi01_get_blk(), pflash_cfi01_legacy_drive()
doesn't require any knowledge of the PFlashCFI01 structure.
Thus we can pass a generic DeviceState pointer.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/sbsa-ref.c| 2 +-
hw/arm/virt.c| 2 +-
hw/block/pflash_cfi
This code doesn't need to be buried in helper.c. Let's move it to its
own file to keep things cleaner.
Code moved verbatim.
Signed-off-by: Fabiano Rosas
---
Extracted from:
https://lore.kernel.org/r/20210416162824.25131-15-cfont...@suse.de
[RFC v14 14/80] target/arm: split cpregs from tcg/helper
From: Claudio Fontana
Signed-off-by: Claudio Fontana
Signed-off-by: Fabiano Rosas
---
Included {sme,mve}_helper.c and left a couple of files behind that
still have non-tcg code to be removed from them:
helper.c (and op_helper.h as a dep)
vfp_helper.c
Originally from:
https://lore.kernel.org/r
OpenBIOS cannot run FCode ROMs yet but it can detect NDRV in VGA card
ROM and add it to the device tree for MacOS. Pass the NDRV this way
instead of via fw_cfg. This solves the problem with OpenBIOS also
adding the NDRV to ati-vga which it does not work with. This does not
need any changes to OpenB
From: Claudio Fontana
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Fabiano Rosas
---
I also moved translate-{m-nocp,mve,neon,vfp,sme}.c
Originally from:
https://lore.kernel.org/r/20210416162824.25131-2-cfont...@suse.de
[RFC v14 01/80]
Fix these:
WARNING: Block comments use a leading /* on a separate line
WARNING: Block comments use * on subsequent lines
WARNING: Block comments use a trailing */ on a separate line
Reviewed-by: Claudio Fontana
Reviewed-by: Cornelia Huck
Signed-off-by: Fabiano Rosas
---
target/arm/helper.c |
Reviewed-by: Claudio Fontana
Reviewed-by: Cornelia Huck
Signed-off-by: Fabiano Rosas
---
target/arm/m_helper.c | 16
1 file changed, 16 deletions(-)
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index 355cd4d60a..033a4d9261 100644
--- a/target/arm/m_helper.c
+++ b
Code moved verbatim.
Signed-off-by: Fabiano Rosas
---
Extracted from:
https://lore.kernel.org/r/20210416162824.25131-15-cfont...@suse.de
[RFC v14 14/80] target/arm: split cpregs from tcg/helper.c
---
target/arm/cpregs.c| 482 +
target/arm/helper.c|
This series makes the necessary changes to allow the use of
--disable-tcg for arm.
I have included the other two already reviewed series to facilitate
the merge. Patch 12 is the first from this series proper.
I could use some help with the last two patches which deal with the
fact that ptw.c need
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