Hi Heecheol Yang.
I suggest rebasing your patch to the master.
Regards,
Michael Rolnik
On Sun, Sep 11, 2022 at 7:47 PM Hee-cheol Yang
wrote:
> Hello.
>
> First of all, I am very sorry for my late response for following
> patchworks for AVR gpio.:
>
>- https://patchew.org/QEMU/2021031316544
Update vhost_net_virtqueue_restart() for vhost-user scenario.
In order to reuse some functions, we process the idx for
vhost-user case. It is because vhost_get_vq_index behave
differently in vhost-user.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
---
hw/net/vhost_net.c | 3 +++
1 file c
Update virtio_net_queue_reset() and virtio_net_queue_enable()
for vhost-user scenario.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
---
hw/net/virtio-net.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index 6ab796b399.
Update vhost_net_virtqueue_reset() for vhost-user scenario.
In order to reuse some functions, we process the idx for
vhost-user scenario because vhost_get_vq_index behave
differently for vhost-user.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
---
hw/net/vhost_net.c | 3 +++
1 file chang
Add virtqueue reset feature for vhost-user.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
---
hw/net/vhost_net.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/net/vhost_net.c b/hw/net/vhost_net.c
index 8b80942e7c..ad319faee8 100644
--- a/hw/net/vhost_net.c
+++ b/hw/net/vhost_net.c
This patch set is based on the patch set that supports VIRTIO_F_RING_RESET for
vhost-kernel:
https://lore.kernel.org/qemu-devel/cover.1662916759.git.kangjie...@linux.alibaba.com/
The virtio queue reset function has already been defined in the virtio spec 1.2.
The relevant virtio spec informa
There is only vhost_set_dev_enable op in VhostOps. Thus, we introduce
the interface vhost_set_vring_enable to set the enable status for a
single vring.
Resetting a single vq will rely on this interface.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
---
hw/virtio/vhost-user.c|
Previously, vhost_set_vring_enable will enable/disable all vrings
in a device, which causes ambiguity. So we rename it to
vhost_set_dev_enable.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
---
backends/cryptodev-vhost.c| 12 ++--
hw/net/vhost_net-stub.c | 2 +-
Nothing special going on here, for once.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 5 +++
target/i386/tcg/emit.c.inc | 76
target/i386/tcg/translate.c | 1 +
3 files changed, 82 insertions(+)
diff --git a/target/i386/tcg/de
Extracted from a patch by Paul Brook .
Signed-off-by: Paolo Bonzini
---
tests/tcg/i386/Makefile.target | 2 +-
tests/tcg/i386/test-avx.c | 201 ++---
tests/tcg/i386/test-avx.py | 3 +-
3 files changed, 112 insertions(+), 94 deletions(-)
diff --git a/test
The more complicated operations here are insertions and extractions.
Otherwise, there are just more entries than usual because the PS/PD/SS/SD
variations are encoded in the opcode rater than in the prefixes.
These three-byte opcodes also include AVX new instructions, whose
implementation in the he
These are exactly the same as the non-VEX version, but one has to be careful
that only VEX.L=0 is allowed.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 25 +
target/i386/tcg/emit.c.inc | 20
2 files changed, 45 insertions(
From: Paul Brook
Include AVX, AVX2 and VAES in the guest cpuid features supported by TCG.
Signed-off-by: Paul Brook
Message-Id: <20220424220204.2493824-40-p...@nowt.org>
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff -
These are more simple integer instructions present in both MMX and SSE/AVX,
with no holes that were later occupied by newer instructions.
Simple, non-saturating operations are implemented using gvec; apart
from this, there is not much to talk about.
Signed-off-by: Paolo Bonzini
---
target/i386/
Everything else has been converted to the new decoder, so separate the
part that survives.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 104 +++-
1 file changed, 68 insertions(+), 36 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/fpu_helper.c | 84 ++--
1 file changed, 81 insertions(+), 3 deletions(-)
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index 230907bc5c..1be620257e 100644
--- a/target/i386/tcg/fpu_helper.
This includes shifts by immediate, which use bits 3-5 of the ModRM byte
as an opcode extension. With the exception of 128-bit shifts, they are
implemented using gvec.
This also covers VZEROALL and VZEROUPPER, which use the same opcode
as EMMS. If we were wanting to optimize out gen_clear_ymmh th
These are both MMX and SSE/AVX instructions, except for vmovdqu. In both
cases the inputs and output is in s->ptr{0,1,2}, so the only difference
between MMX, SSE, and AVX is which helper to call.
PCMPGT, MOVD and MOVQ are implemented using gvec.
The amount of macro magic for generating functions
There are several special cases here:
1) extending moves have different widths for the helpers vs. for the
memory loads, and the width for memory loads depends on VEX.L too.
This is represented by X86_SPECIAL_AVXExtMov.
2) some instructions, such as variable-width shifts, select the vector elemen
Here the code is a bit uglier due to the truncation and extension
of registers to and from 32-bit. Otherwise there is nothing special
going on.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 54 ++
target/i386/tcg/emit.c.inc | 120
This is all dead code, since the VEX prefix goes straight to the new decoder.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 243
1 file changed, 243 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 7e
These are a mixed match, including the first two horizontal
(66 and F2 only) operations, more moves, and SSE4a extract/insert.
Because SSE4a is pretty rare, I chose to leave the helper as they are,
but it is possible to unify them by loading index and length from the
source XMM register.
Signed-o
From: Richard Henderson
As pmovmskb is used by strlen et al, this is the third
highest overhead sse operation at %0.8.
Signed-off-by: Richard Henderson
[Reorganize to generate code for any vector size. - Paolo]
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/emit.c.inc | 65 +
These are mostly moves, and yet are a total pain. The main issue
is that:
1) some instructions are selected by mod==11 (register operand)
vs. mod=00/01/10 (memory operand)
2) stores to memory are two-operand operations, while the 3-register
and load-from-memory versions operate on the entire con
These are mostly floating-point SSE operations. The odd ones out
are MOVMSK and CVTxx2yy, the others are straightforward.
Unary operations are a bit special in AVX because they have 2 operands
for PD/PS operands (VEX. must be b), and 3 operands for SD/SS.
They are handled using X86_OP_GRO
Compared to Paul's implementation, the new decoder will use a different approach
to implement AVX's merging of dst with src1 on scalar operations. Adjust the
old SSE decoder to be compatible with new-style helpers.
The affected instructions are CVTSx2Sx, ROUNDSx, RSQRTSx, SQRTSx, RCPSx.
Signed-o
Because these are the only VEX instructions that QEMU supports, the
new decoder is entered on the first byte of a valid VEX prefix, and VEX
decoding only needs to be done in decode-new.c.inc.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 59 +++
target/i386/tcg/emit.c.
The more complicated ones here are d6-d7, e6-e7, f7. The others
are trivial.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 39 +
target/i386/tcg/emit.c.inc | 99 +---
target/i386/tcg/translate.c | 4 +-
3 files changed, 1
The new implementation of SSE will cover AVX from the get go, so include
the 24 extra comparison operators that are only available with the VEX
prefix.
Based on a patch by Paul Brook .
Signed-off-by: Paolo Bonzini
---
target/i386/ops_sse.h| 38
targe
Compared to Paul's implementation, the new decoder will use a different approach
to implement AVX's merging of dst with src1 on scalar operations. Adjust the
helpers to provide this functionality.
Signed-off-by: Paolo Bonzini
---
target/i386/ops_sse.h | 16
1 file changed, 16 i
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 160 ++-
target/i386/tcg/decode-new.h | 32 +++
target/i386/tcg/emit.c.inc | 34 ++-
target/i386/tcg/translate.c | 17 ++--
4 files changed, 232 insertions(+), 11 deletions(-)
Add to the helpers all the operands that are needed to implement AVX.
Extracted from a patch by Paul Brook .
Message-Id: <20220424220204.2493824-26-p...@nowt.org>
Signed-off-by: Paolo Bonzini
---
target/i386/ops_sse.h| 173 +
target/i386/ops_sse_header.h
The new implementation of SSE will cover AVX from the get go, because
all the work for the helper functions is already done. We just need to
build them.
Signed-off-by: Paolo Bonzini
---
target/i386/helper.h | 2 ++
target/i386/ops_sse.h| 5 +
target/i386/ops_sse_header.h | 4
From: Paul Brook
Adjust all #ifdefs to match the ones in ops_sse.h.
Signed-off-by: Paul Brook
Message-Id: <20220424220204.2493824-23-p...@nowt.org>
Signed-off-by: Paolo Bonzini
---
target/i386/ops_sse_header.h | 114 +++
1 file changed, 75 insertions(+), 39 del
From: Paul Brook
Add a new hflag bit to determine whether AVX instructions are allowed
Signed-off-by: Paul Brook
Message-Id: <20220424220204.2493824-4-p...@nowt.org>
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h| 3 +++
target/i386/helper.c | 12
target/
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 51
target/i386/tcg/decode-new.h | 20 +
2 files changed, 71 insertions(+)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index 7f76051b2d..a9b8b
Many SSE and AVX instructions are only valid with specific prefixes
(none, 66, F3, F2). Introduce a direct way to encode this in the
decoding table to avoid using decode groups too much.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 37
tar
Add generic code generation that takes care of preparing operands
around calls to decode.e.gen in a table-driven manner, so that ALU
operations need not take care of that.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 20 +++-
target/i386/tcg/decode-new.h | 1 +
targ
This series fleshes out more of the prototype table-driven decoder
and uses it to implement SSE and AVX.
As expected, there's a lot more lines here than in Paul's version
(roughly twice as much), but in my opinion it is a price worth paying
for future maintainability and for easier code review. N
ldq takes a pointer to the first byte to load the 64-bit word in;
ldo takes a pointer to the first byte of the ZMMReg. Make them
consistent, which will be useful in the new SSE decoder's
load/writeback routines.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 44 +
Extend the support to memory operands, and skip MMX instructions that
were introduced in SSE times, because they are now covered in test-mmx.
Signed-off-by: Paolo Bonzini
---
tests/tcg/i386/test-avx.py | 32 ++--
1 file changed, 26 insertions(+), 6 deletions(-)
diff
The "O" operand type in the Intel SDM needs to load an 8- to 64-bit
unsigned value, while insn_get is limited to 32 bits. Extract the code
out of disas_insn and into a separate function.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 36 ++--
1 fi
TCG will shortly implement VAES instructions, so add the relevant feature
word to the DisasContext.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 7e9920e29c..a92ef
The later prefix wins if both are present, make it show in s->prefix too.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 9a85010dcd..f8fd93dae0 100644
--- a/target/
The new decoder is based on three principles:
- use mostly table-driven decoding, using tables derived as much as possible
from the Intel manual. Centralizing the decode the operands makes it
more homogeneous, for example all immediates are signed. All modrm
handling is in one function, an
From: Richard Henderson
This will be used for emission and endian adjustments of gvec operations.
Signed-off-by: Richard Henderson
Message-Id: <2022083722.1697758-2-richard.hender...@linaro.org>
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 56 --
Signed-off-by: Paolo Bonzini
---
tests/tcg/i386/x86.csv | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/tcg/i386/x86.csv b/tests/tcg/i386/x86.csv
index d5d0c17f1b..c43bf42dd3 100644
--- a/tests/tcg/i386/x86.csv
+++ b/tests/tcg/i386/x86.csv
@@ -1469,16 +1469,16 @@
"P
The new testsuite is much more comprehensive, so remove the old one;
it is also buggy (the pinsrw test uses incorrect constraints, with =
instead of +, and the golden output for the fxsave tests differs depending
on how the C library uses SSE and AVX instructions).
Signed-off-by: Paolo Bonzini
--
Adjust the test-avx.py generator to produce tests specifically for
MMX and 3DNow. Using a separate generator introduces some code
duplication, but is a simpler approach because of test-avx's extra
complexity to support 3- and 4-operand AVX instructions.
If needed, a common library can be introduc
This series adds more tests for MMX and 3DNow, including a specific
execuatble because the SSE tests in test-avx are not able to pick the
right input parameters for MMn registers.
Unfortunately there are a couple typos in the 3DNow! instructions that
seem to be very widespread; the source of the t
Do not set all the flags, they are untouched other than ZF.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 0e9237d627..488a617d14 100644
--
The first was found by test-x86_64, the second by inspection. I will
shortly work on adding golden output for the tests in tests/tcg/i386,
so that we check more than "QEMU does not crash".
Paolo
Paolo Bonzini (2):
target/i386: fix cmpxchg with 32-bit register destination
target/i386: cmpxch
Unlike the memory case, where "the destination operand receives a write
cycle without regard to the result of the comparison", rm must not be
touched altogether if the write fails, including not zero-extending
it on 64-bit processors. This is not how the movcond currently works,
because it is alwa
Unaligned i/o access on serial UART works on real PCs.
This is used for example by FreeDOS CTMouse driver. Without this it
can't reset and detect serial mice.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/77
Signed-off-by: Arwed Meyer
---
hw/char/serial.c | 3 +++
1 file changed, 3 ins
Make source buffers const for char be write functions.
This allows using buffers returned by fifo as buf parameter and source buffer
should not be changed by write functions anyway.
Signed-off-by: Arwed Meyer
Reviewed-by: Marc-André Lureau
---
chardev/char.c | 4 ++--
include/chardev/c
Detect mouse reset via RTS or DTR line:
Don't send or process anything while in reset.
When coming out of reset, send ID sequence first thing.
This allows msmouse to be detected by common mouse drivers.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/77
Signed-off-by: Arwed Meyer
---
cha
Here is a bunch of patches for linux-user.
Most of them add missing syscalls and enhance the tracing/logging.
Some of the patches are target-hppa specific.
I've tested those on productive hppa debian buildd servers (running qemu-user).
Thanks!
Helge
Changes to v1:
- Dropped the faccessat2() sysc
On Sun, 11 Sept 2022 at 18:14, Arwed Meyer wrote:
>
> Am 08.09.22 um 23:11 schrieb Peter Maydell:
> > On Thu, 8 Sept 2022 at 18:43, Arwed Meyer wrote:
> >>
> >> Detect mouse reset via RTS or DTR line:
> >> Don't send or process anything while in reset.
> >> When coming out of reset, send ID seque
Some of the guest signal numbers are currently not converted to
their representative names in the strace output, e.g. SIGVTALRM.
This patch introduces a smart way to generate and keep in sync the
host-to-guest and guest-to-host signal conversion tables for usage in
the qemu signal and strace code.
Enhance the EXCP_DUMP() macro to print out the failing program too.
During debugging it's sometimes hard to track down the actual failing
program if you are e.g. building a whole debian package.
Signed-off-by: Helge Deller
---
linux-user/cpu_loop-common.h | 2 ++
1 file changed, 2 insertions(+)
Make use of fifo8 functions instead of implementing own fifo code.
This makes the code more readable and reduces risk of bugs.
Signed-off-by: Arwed Meyer
Reviewed-by: Marc-André Lureau
---
chardev/msmouse.c | 47 +--
1 file changed, 25 insertions(+),
Make msmouse send serial pnp data.
Enables you to see nice qemu device name in Win9x.
Signed-off-by: Arwed Meyer
Reviewed-by: Marc-André Lureau
---
chardev/msmouse.c | 58 ++-
1 file changed, 47 insertions(+), 11 deletions(-)
diff --git a/chardev/msm
If the mode parameter of chmod() is zero, this value isn't shown
when stracing a program:
chmod("filename",)
This patch fixes it up to show the zero-value as well:
chmod("filename",000)
Signed-off-by: Helge Deller
---
linux-user/strace.c | 5 +
1 file changed, 5 insertions(+)
diff -
I noticed those were missing when running the glib2.0 testsuite.
Add the syscalls including the strace output.
Signed-off-by: Helge Deller
---
linux-user/strace.c| 28
linux-user/strace.list | 9 +
linux-user/syscall.c | 34
Signed-off-by: Helge Deller
---
linux-user/strace.list | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/strace.list b/linux-user/strace.list
index ad9ef94689..97d8ccadac 100644
--- a/linux-user/strace.list
+++ b/linux-user/strace.list
@@ -355,7 +355,7 @@
{ TARGET_NR
Signed-off-by: Helge Deller
---
linux-user/strace.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/linux-user/strace.c b/linux-user/strace.c
index 6f818212d5..b6b9abaea4 100644
--- a/linux-user/strace.c
+++ b/linux-user/strace.c
@@ -3714,11 +3714,20 @@ print_futex
On the parisc architecture the stack grows upwards.
Move the TASK_UNMAPPED_BASE to high memory area as it's done by the
kernel on physical machines.
Signed-off-by: Helge Deller
---
linux-user/mmap.c | 4
1 file changed, 4 insertions(+)
diff --git a/linux-user/mmap.c b/linux-user/mmap.c
ind
This series of patches makes `-serial msmouse` work in practice.
Tested with FreeDOS/CTMouse driver `ctmouse /V` which identifies a
Logitech compatible 3 button mouse.
It will probably run as well with any other compatible serial mouse
driver on Windows 9x etc.
Arwed Meyer (5):
msmouse: Handle
Include the IIR register (which holds the opcode of the failing
instruction) when dumping the hppa registers.
Signed-off-by: Helge Deller
---
target/hppa/helper.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target/hppa/helper.c b/target/hppa/helper.c
index e2758d8df
Signed-off-by: Helge Deller
---
linux-user/strace.c| 15 +++
linux-user/strace.list | 3 ++-
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/linux-user/strace.c b/linux-user/strace.c
index 2f539845bb..6f818212d5 100644
--- a/linux-user/strace.c
+++ b/linux-user/str
Allow linux-user to strace the clock_gettime64() syscall.
This syscall is used a lot on 32-bit guest architectures which use newer
glibc versions.
Signed-off-by: Helge Deller
---
linux-user/strace.c| 53 ++
linux-user/strace.list | 4
2 files cha
Signed-off-by: Helge Deller
---
linux-user/strace.list | 3 +++
linux-user/syscall.c | 12
2 files changed, 15 insertions(+)
diff --git a/linux-user/strace.list b/linux-user/strace.list
index 215d971b2a..ad9ef94689 100644
--- a/linux-user/strace.list
+++ b/linux-user/strace.list
Enhance the hppa linux-user cpu_loop() to show more debugging info
on hard errors.
Signed-off-by: Helge Deller
---
linux-user/hppa/cpu_loop.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/hppa/cpu_loop.c
index 64263c3dc4..1ef3b46
Am 11.09.22 um 08:12 schrieb Volker Rümelin:
Am 08.09.22 um 19:31 schrieb Arwed Meyer:
@@ -54,21 +60,15 @@ DECLARE_INSTANCE_CHECKER(MouseChardev, MOUSE_CHARDEV,
static void msmouse_chr_accept_input(Chardev *chr)
{
MouseChardev *mouse = MOUSE_CHARDEV(chr);
- int len;
+ uint32_t l
Support queue_enable in vhost-kernel scenario. It can be called when
a vq reset operation has been performed and the vq is restared.
It should be noted that we can restart the vq when the vhost has
already started. When launching a new vhost device, the vhost is not
started and all vqs are not ini
Introduce vhost_net_virtqueue_restart(), which can restart the
specific virtqueue when the vhost net started running before.
If it fails to restart the virtqueue, the device will be stopped.
Here we do not reuse vhost_net_start_one() or vhost_dev_start()
because they work at queue pair level. The
A a new command line parameter "queue_reset" is added.
Meanwhile, the vq reset feature is disabled for pre-7.2 machines.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
---
hw/core/machine.c | 4 +++-
include/hw/virtio/virtio.h | 4 +++-
2 files changed, 6 insertions(+), 2 deletion
Introduce the fucntion flush_or_purge_queued_packets(), it will be
used in device reset and virtqueue reset. Therefore, we extract the
common logic as a new function.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
Acked-by: Jason Wang
---
hw/net/virtio-net.c | 17 +++--
1 file
Hi,
Am 09.09.22 um 15:18 schrieb Marc-André Lureau:
Hi
On Thu, Sep 8, 2022 at 9:38 PM Arwed Meyer mailto:arwed.me...@gmx.de>> wrote:
Make use of fifo8 functions instead of implementing own fifo code.
This makes the code more readable and reduces risk of bugs.
Signed-off-by: Arwed
Introduce vhost_virtqueue_reset(), which can reset the specific
virtqueue in the device. Then it will unmap vrings and the desc
of the virtqueue.
Here we do not reuse the vhost_net_stop_one() or vhost_dev_stop(),
because they work at queue pair level. We do not use
vhost_virtqueue_stop() because i
From: Xuan Zhuo
virtio-net and vhost-kernel implement queue reset.
Queued packets in the corresponding queue pair are flushed
or purged.
For virtio-net, userspace datapath will be disabled later in
__virtio_queue_reset(). It will set addr of vring to 0 and idx to 0.
Thus, virtio_net_receive() an
Expose vhost_virtqueue_stop(), we need to use it when resetting a
virtqueue.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
---
hw/virtio/vhost.c | 8
include/hw/virtio/vhost.h | 2 ++
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/virtio/vhost.c b/hw/vir
From: Xuan Zhuo
Introduce a new interface function virtio_queue_reset() to implement
reset for vq.
Add a new callback to VirtioDeviceClass for queue reset operation for
each child device.
Signed-off-by: Xuan Zhuo
Acked-by: Jason Wang
---
hw/virtio/virtio.c | 11 +++
include/h
The virtio queue reset function has already been defined in the virtio spec 1.2.
The relevant virtio spec information is here:
https://github.com/oasis-tcs/virtio-spec/issues/124
https://github.com/oasis-tcs/virtio-spec/issues/139
This patch set is to support this function in QEMU. It con
PCI devices support device specific vq enable.
Based on this function, the driver can re-enable the virtqueue after the
virtqueue is reset.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
Acked-by: Jason Wang
---
hw/virtio/virtio-pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw
From: Xuan Zhuo
Separate the logic of vq reset. This logic will be called directly
later.
Signed-off-by: Xuan Zhuo
Acked-by: Jason Wang
---
hw/virtio/virtio.c | 37 +
1 file changed, 21 insertions(+), 16 deletions(-)
diff --git a/hw/virtio/virtio.c b/hw/vi
From: Xuan Zhuo
PCI devices support vq reset.
Based on this function, the driver can adjust the size of the ring, and
quickly recycle the buffer in the ring.
The migration of the virtio devices will not happen during a reset
operation. This is becuase the global iothread lock is held. Migration
From: Xuan Zhuo
This is updated using scripts/update-linux-headers.sh.
Added VIRTIO_F_RING_RESET, VIRTIO_PCI_COMMON_Q_RESET. It came from here:
https://github.com/oasis-tcs/virtio-spec/issues/124
https://github.com/oasis-tcs/virtio-spec/issues/139
Add VIRTIO_PCI_COMMON_Q_NDATA, which comes from
Expose vhost_virtqueue_start(), we need to use it when restarting a
virtqueue.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
---
hw/virtio/vhost.c | 8
include/hw/virtio/vhost.h | 3 +++
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/virtio/vhost.c b/hw/
Add virtqueue reset feature for vhost-kernel.
Signed-off-by: Kangjie Xu
Signed-off-by: Xuan Zhuo
---
hw/net/vhost_net.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/net/vhost_net.c b/hw/net/vhost_net.c
index 1059aa45b4..97cdf9280b 100644
--- a/hw/net/vhost_net.c
+++ b/hw/net/vhost_net
Introduce the interface queue_enable() in VirtioDeviceClass and the
fucntion virtio_queue_enable() in virtio, it can be called when
VIRTIO_PCI_COMMON_Q_ENABLE is written and related virtqueue can be
started. It only supports the devices of virtio 1 or later. The
not-supported devices can only start
Am 08.09.22 um 23:11 schrieb Peter Maydell:
On Thu, 8 Sept 2022 at 18:43, Arwed Meyer wrote:
Detect mouse reset via RTS or DTR line:
Don't send or process anything while in reset.
When coming out of reset, send ID sequence first thing.
This allows msmouse to be detected by common mouse drivers
Hello.
First of all, I am very sorry for my late response for following patchworks for
AVR gpio.:
* https://patchew.org/QEMU/20210313165445.2113938-1-f4...@amsat.org/
I couldn't check works for several years because of my personal reasons.
If I or anyone want to continue these works, can I
On 02/09/2022 19.34, Juan Quintela wrote:
Signed-off-by: Juan Quintela
---
tests/qtest/meson.build | 27 +--
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index e910cb32ca..67b3b678d3 100644
--- a/test
Damien Le Moal 于2022年9月11日周日 16:36写道:
>
> On 2022/09/11 17:00, Sam Li wrote:
> [...]
> >>> @@ -1604,6 +1629,12 @@ static ssize_t
> >>> handle_aiocb_rw_linear(RawPosixAIOData *aiocb, char *buf)
> >>> (const char *)buf + offset,
> >>> aiocb->aio_n
On 2022/09/11 17:00, Sam Li wrote:
[...]
>>> @@ -1604,6 +1629,12 @@ static ssize_t
>>> handle_aiocb_rw_linear(RawPosixAIOData *aiocb, char *buf)
>>> (const char *)buf + offset,
>>> aiocb->aio_nbytes - offset,
>>> aiocb->
Sam Li 于2022年9月11日周日 16:00写道:
>
> Damien Le Moal 于2022年9月11日周日 14:06写道:
> >
> > On 2022/09/10 15:38, Sam Li wrote:
> > > A zone append command is a write operation that specifies the first
> > > logical block of a zone as the write position. When writing to a zoned
> > > block device using zone a
Damien Le Moal 于2022年9月11日周日 14:06写道:
>
> On 2022/09/10 15:38, Sam Li wrote:
> > A zone append command is a write operation that specifies the first
> > logical block of a zone as the write position. When writing to a zoned
> > block device using zone append, the byte offset of the write is pointi
Damien Le Moal 于2022年9月11日周日 14:48写道:
>
> On 2022/09/11 15:33, Sam Li wrote:
> > Damien Le Moal 于2022年9月11日周日 13:31写道:
> [...]
> >>> +/*
> >>> + * zone management operations - Execute an operation on a zone
> >>> + */
> >>> +static int coroutine_fn raw_co_zone_mgmt(BlockDriverState *bs,
> >>> Bl
On 2022/09/11 15:54, Sam Li wrote:
> Damien Le Moal 于2022年9月11日周日 13:34写道:
>>
>> On 2022/09/10 14:27, Sam Li wrote:
>>> Putting zoned/non-zoned BlockDrivers on top of each other is not
>>> allowed.
>>>
>>> Signed-off-by: Sam Li
>>> Reviewed-by: Stefan Hajnoczi
>>> ---
>>> block.c
1 - 100 of 101 matches
Mail list logo