On Mon, Jul 18, 2022 at 8:34 AM Jason Wang wrote:
>
> On Sat, Jul 16, 2022 at 7:34 PM Eugenio Pérez wrote:
> >
> > To restore the device in the destination of a live migration we send the
> > commands through control virtqueue. For a device to read CVQ it must
> > have received DRIVER_OK status b
On Sat, Jul 16, 2022 at 7:34 PM Eugenio Pérez wrote:
>
> To restore the device in the destination of a live migration we send the
> commands through control virtqueue. For a device to read CVQ it must
> have received DRIVER_OK status bit.
>
> However this open a window where the device could start
On Sat, Jul 16, 2022 at 7:34 PM Eugenio Pérez wrote:
>
> So later patches are cleaner
>
> Signed-off-by: Eugenio Pérez
> ---
> hw/virtio/vhost-vdpa.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
> index 4458c8d23e..
On Sat, Jul 16, 2022 at 7:34 PM Eugenio Pérez wrote:
>
> Migration with SVQ already migrate the inflight descriptors,
How is this done?
> so the
> destination can perform the work.
>
> This makes easier to migrate between backends or to recover them in
> vhost devices that support set in flight
On Sat, Jul 16, 2022 at 7:34 PM Eugenio Pérez wrote:
>
> The SVQ vring used idx usually match with the guest visible one, as long
> as all the guest buffers (GPA) maps to exactly one buffer within qemu's
> VA. However, as we can see in virtqueue_map_desc, a single guest buffer
> could map to many
Le 18/07/2022 à 05:17, Liu, Jingqi a écrit :
On 7/11/2022 6:44 PM, Hesham Almatary via wrote:
From: Brice Goglin
The "Memory Proximity Domain Attributes" structure of the ACPI HMAT
has a "Processor Proximity Domain Valid" flag that is currently
always set because Qemu -numa requires an initi
+Atish
On Mon, Jul 18, 2022 at 9:23 AM Jim Shu wrote:
>
> RISC-V priv spec v1.12 permits 2 PTE-update schemes of A/D-bit
> (Access/Dirty bit): HW update or SW update. RISC-V profile defines the
> extension name 'Ssptwad' for HW update to PTE A/D bits.
> https://github.com/riscv/riscv-profiles/blo
On 18/7/2022 11:22 am, Zhenzhong Duan wrote:
Since below KVM commit, KVM hided BTS as it's not supported yet.
b9181c8ef356 ("KVM: x86/pmu: Avoid exposing Intel BTS feature")
After below KVM commit, it gave control of MSR_IA32_MISC_ENABLES to userspace.
9fc222967a39 ("KVM: x86: Give host userspac
RISC-V priv spec v1.12 permits 2 PTE-update schemes of A/D-bit
(Access/Dirty bit): HW update or SW update. RISC-V profile defines the
extension name 'Ssptwad' for HW update to PTE A/D bits.
https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc
Current QEMU RISC-V implements HW update sch
On Sat, Jul 16, 2022 at 1:18 AM Eugenio Pérez wrote:
>
> Control virtqueue is used by networking device for accepting various
> commands from the driver. It's a must to support advanced configurations.
>
> Rx filtering event is issues by qemu when device's MAC address changed once
> and
> the pre
Since below KVM commit, KVM hided BTS as it's not supported yet.
b9181c8ef356 ("KVM: x86/pmu: Avoid exposing Intel BTS feature")
After below KVM commit, it gave control of MSR_IA32_MISC_ENABLES to userspace.
9fc222967a39 ("KVM: x86: Give host userspace full control of
MSR_IA32_MISC_ENABLES")
So
On 7/11/2022 6:44 PM, Hesham Almatary via wrote:
From: Brice Goglin
The "Memory Proximity Domain Attributes" structure of the ACPI HMAT
has a "Processor Proximity Domain Valid" flag that is currently
always set because Qemu -numa requires an initiator=X value
when hmat=on. Unsetting this flag
On Tue, Jul 12, 2022 at 4:41 PM Weiwei Li wrote:
>
> - fix the lines with over 80 characters
> - fix the lines which is obviously misalgined with other lines
> in same the group
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
Reviewed-by: Alistair Francis
Alistair
> ---
> target
On Thu, Jul 14, 2022 at 7:54 PM Heiko Stübner wrote:
>
> Am Dienstag, 21. Juni 2022, 01:15:58 CEST schrieb Atish Patra:
> > The Sscofpmf ('Ss' for Privileged arch and Supervisor-level extensions,
> > and 'cofpmf' for Count OverFlow and Privilege Mode Filtering)
> > extension allows the perf to han
On Fri, Jul 15, 2022 at 4:13 AM Palmer Dabbelt wrote:
>
> We got to talking about how Zmmul and M interact with each other
> https://github.com/riscv/riscv-isa-manual/issues/869 , and it turns out
> that QEMU's behavior is slightly wrong: having Zmmul and M is a legal
> combination, it just means
I think we've sorted this out, but replying to finalise the conversation
On Tue, 12 Jul 2022, at 11:27, Peter Delevoryas wrote:
> On Mon, Jul 11, 2022 at 10:56:08PM +0930, Andrew Jeffery wrote:
>>
>> /*
>> @@ -607,7 +608,7 @@ static void aspeed_gpio_write(void *opaque, hwaddr
>> offset, uint64
On Fri, Jul 15, 2022 at 4:13 AM Palmer Dabbelt wrote:
>
> We got to talking about how Zmmul and M interact with each other
> https://github.com/riscv/riscv-isa-manual/issues/869 , and it turns out
> that QEMU's behavior is slightly wrong: having Zmmul and M is a legal
> combination, it just means
On 7/17/22 18:08, Helge Deller wrote:
> In 2010, the commit b41a66edd0c added a thrird parameter "is_pipe2" to the
> internal do_pipe() function, but missed to actually use this parameter to
> decide if the pipe() or pipe2() syscall should be used.
> Instead it just continued to check the flags par
When writing back the fd[1] pipe file handle to emulated userspace
memory, use sizeof(abi_int) as offset insted of the hosts's int type.
There is no functional change in this patch.
Signed-off-by: Helge Deller
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 991b85e6b4..1e6e814871
In 2010, the commit b41a66edd0c added a thrird parameter "is_pipe2" to the
internal do_pipe() function, but missed to actually use this parameter to
decide if the pipe() or pipe2() syscall should be used.
Instead it just continued to check the flags parameter and used pipe2()
unconditionally if fla
On Sat, Jul 16, 2022 at 1:44 PM Eugenio Pérez wrote:
>
> It allows to run commands at start of the device, before it have enabled
> any queue.
>
> Signed-off-by: Eugenio Pérez
> ---
> hw/virtio/vhost-shadow-virtqueue.h | 3 +++
> include/hw/virtio/vhost-vdpa.h | 5 +
> hw/virtio/vhost-vd
On Sun, Jul 17, 2022 at 12:30 PM Eugenio Perez Martin
wrote:
>
> On Tue, Jul 12, 2022 at 9:26 AM Jason Wang wrote:
> >
> >
> > 在 2022/7/7 02:40, Eugenio Pérez 写道:
> > > As a first step we only enable CVQ first than others. Future patches add
> > > state restore.
> > >
> > > Signed-off-by: Eugenio
On Tue, Jul 12, 2022 at 9:26 AM Jason Wang wrote:
>
>
> 在 2022/7/7 02:40, Eugenio Pérez 写道:
> > As a first step we only enable CVQ first than others. Future patches add
> > state restore.
> >
> > Signed-off-by: Eugenio Pérez
> > ---
> > net/vhost-vdpa.c | 19 +++
> > 1 file cha
From: Alexey Baturo
Hi,
This patch fixes a typo which leads to broken pointer masking functionality for
RISC-V.
Thanks.
Alexey Baturo (1):
target/riscv: Fix typo and restore Pointer Masking functionality for
RISC-V
target/riscv/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 dele
From: Alexey Baturo
Signed-off-by: Alexey Baturo
---
target/riscv/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 63b04e8a94..86c19ea74e 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
As ui/cocoa does no longer override main(), ui/gtk and ui/sdl
can be enabled even ui/cocoa is enabled.
Signed-off-by: Akihiko Odaki
Reviewed-by: Peter Maydell
---
meson.build | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/meson.build b/meson.build
index bc5569ace
This reverts commit 47281859f66bdab1974fb122cab2cbb4a1c9af7f.
Signed-off-by: Akihiko Odaki
Reviewed-by: Peter Maydell
---
include/qemu/main-loop.h | 13 -
1 file changed, 13 deletions(-)
diff --git a/include/qemu/main-loop.h b/include/qemu/main-loop.h
index 5518845299d..0aa36a4f17e
This work is based on:
https://patchew.org/QEMU/20220317125534.38706-1-philippe.mathieu.da...@gmail.com/
Simplify the initialization dance by running qemu_init() in the main
thread before the Cocoa event loop starts. The secondary thread only
runs only qemu_main_loop() and qemu_cleanup().
This fi
This work is based on:
https://patchew.org/QEMU/20220317125534.38706-1-philippe.mathieu.da...@gmail.com/
Simplify the initialization dance by running qemu_init() in the main
thread before the Cocoa event loop starts. The secondary thread only
runs only qemu_main_loop() and qemu_cleanup().
This fi
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