On 6/24/22 02:36, Peter Delevoryas wrote:
Signed-off-by: Peter Delevoryas
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/arm/aspeed_ast2600.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 8693660271..0656c
On 6/24/22 02:36, Peter Delevoryas wrote:
Signed-off-by: Peter Delevoryas
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/arm/aspeed_ast10x0.c | 16 ++--
hw/arm/aspeed_ast2600.c | 27 ++-
hw/arm/aspeed_soc.c | 23 ++
On 6/24/22 02:36, Peter Delevoryas wrote:
sysbus_mmio_map maps devices into "get_system_memory()".
With the new SoC memory attribute, we want to make sure that each device is
mapped into the SoC memory.
In single SoC machines, the SoC memory is the same as "get_system_memory()",
but in multi So
On 6/24/22 08:36, Cédric Le Goater wrote:
On 6/24/22 02:36, Peter Delevoryas wrote:
Signed-off-by: Peter Delevoryas
Please merge this patch with patch 2 in which the "memory" property
is defined.
Ah no. That's another link. I don't understand where that was done
before.
C.
Thanks,
C.
On 6/24/22 02:36, Peter Delevoryas wrote:
Multi-SoC machines can use this property to specify a memory container
for each SoC. Single SoC machines will just specify get_system_memory().
Signed-off-by: Peter Delevoryas
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/arm/aspeed.c
On 6/24/22 02:36, Peter Delevoryas wrote:
Signed-off-by: Peter Delevoryas
Please merge this patch with patch 2 in which the "memory" property
is defined.
Thanks,
C.
---
hw/arm/aspeed_ast2600.c | 2 ++
hw/arm/aspeed_soc.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/ar
This function doesn't release descriptors in one error path,
result in memory leak. Call g_free() to release it.
Fixes: cc01a3f4cadd ("kvm: Support for querying fd-based stats")
Signed-off-by: Miaoqian Lin
---
accel/kvm/kvm-all.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/accel/kvm/kvm-
>-Original Message-
>From: Zhang, Chen
>Sent: Friday, June 24, 2022 10:04
>To: Yao, Yuan ; Paolo Bonzini ;
>Philippe Mathieu-Daudé ; Dr.
>David Alan Gilbert ; Zhong, Yang ;
>Connor Kuehl ; Eric
>Blake ; Markus Armbruster
>Cc: qemu-devel@nongnu.org; Yao, Yuan ; Yamahata, Isaku
>
>Subjec
>-Original Message-
>From: Markus Armbruster
>Sent: Friday, June 24, 2022 13:35
>To: Yao, Yuan
>Cc: Paolo Bonzini ; Philippe Mathieu-Daudé
>; Dr. David Alan Gilbert
>; Zhong, Yang ; Connor Kuehl
>; qemu-devel@nongnu.org;
>Yamahata, Isaku
>Subject: Re: [PATCH 1/1] i386/monitor: Fix page
> -Original Message-
> From: Qemu-devel bounces+chen.zhang=intel@nongnu.org> On Behalf Of Thomas Huth
> Sent: Wednesday, June 22, 2022 10:03 PM
> To: qemu-devel@nongnu.org; Riku Voipio
> Cc: Michael Tokarev ; qemu-triv...@nongnu.org; Paolo
> Bonzini
> Subject: [PATCH] common-user:
Hello Iris,
Could please resend with a Sob tag ?
Thanks,
C.
On 6/18/22 00:06, Iris Chen wrote:
---
Fixing suggestions to move testing related code to a different commit.
tests/qtest/aspeed_smc-test.c | 62 +++
1 file changed, 62 insertions(+)
diff --git a
On 23/06/2022 23.29, Richard Henderson wrote:
On 6/23/22 12:30, Peter Maydell wrote:
-static inline bool sadd32_overflow(int32_t x, int32_t y, int32_t *ret)
-{
-#if __has_builtin(__builtin_add_overflow) || __GNUC__ >= 5
- return __builtin_add_overflow(x, y, ret);
-#else
- *ret = x + y;
-
Yuan Yao writes:
> Don't skip next leve page table for pdpe/pde when the
level
> PG_PRESENT_MASK is set.
>
> This fixs the issue that no mapping information was
fixes
> collected from "info mem" for guest with LA57 enabled.
>
> Signed-off-by: Yuan Yao
Should we add
Fixes: 6c7c3c21f95dd9a
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 0013582a3a..bf163a8dce 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongar
Add linux-user emulation introduction
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/README | 39 +--
1 file changed, 37 insertions(+), 2 deletions(-)
diff --git a/target/loongarch/README b/target/lo
Hi Stefan,
Stefan Hajnoczi 于2022年6月20日周一 15:55写道：
>
> On Mon, Jun 20, 2022 at 11:36:11AM +0800, Sam Li wrote:
>
> Hi Sam,
> Is this version 2 of "[RFC v1] Add support for zoned device"? Please
> keep the email subject line the same (except for "v2", "v3", etc) so
> that it's clear which patch ser
This patch adds loongarch64 linux-user default configs file.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by: WANG Xuerui
---
configs/targets/loongarch64-linux-user.mak | 3 +++
1 file changed, 3 insertions(+)
create mode 100644 configs/targets
Raise EXCCODE_BCE instead of EXCCODE_ADEM for helper_asrtle_d/asrtgt_d.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 2 ++
target/loongarch/op_helper.c | 4 ++--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --g
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
linux-user/loongarch64/syscall_nr.h | 312
linux-user/loongarch64/target_syscall.h | 48
linux-user/syscall_defs.h | 6
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
linux-user/elfload.c| 91 +
linux-user/loongarch64/target_elf.h | 12
2 files changed, 103 insertions(+)
create mode 100
Some functions and member of the structure are different with softmmu-mode
So we need adjust them to support user-mode.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c| 21 ++-
target/loongarch/cpu.h
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
linux-user/loongarch64/cpu_loop.c | 96 +
linux-user/loongarch64/target_cpu.h | 34 ++
2 files changed, 130 insertions(+)
create mode 100644 linux-user/loongarch64/cpu_
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
---
linux-user/loongarch64/signal.c| 326 +
linux-user/loongarch64/target_signal.h | 13 +
2 files changed, 339 insertions(+)
create mode 100644 linux-user/loongarch64/signal.c
create mode 100644 linux-user/l
We can use CSR_BADV to replace badaddr.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.h | 2 --
target/loongarch/gdbstub.c | 2 +-
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/loongarch/cpu.h b/target/lo
loongarch_cpu_do_interrupt() should update CSR_BADV for some EXCCODE.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/loongarch/cpu.c b/target/lo
This includes:
- sockbits.h
- target_errno_defs.h
- target_fcntl.h
- termbits.h
- target_resource.h
- target_structs.h
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: WANG Xuerui
---
linux-user/loongarch64/s
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
scripts/qemu-binfmt-conf.sh | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-binfmt-conf.sh
index 9cb723f443..1f4e2cd19d 100755
--- a/script
Hi All,
This series adds support linux-user emulation.
As the LoongArch kernel had merged into 5.19-rc1,
you can see the latest kernel at https://kernel.org
Need review patch:
0002-linux-user-Add-LoongArch-signal-support.patch
V20:
- Update signal.c, we should't set sc_extcontext[0] on
> -Original Message-
> From: Qemu-devel bounces+chen.zhang=intel@nongnu.org> On Behalf Of Yuan Yao
> Sent: Thursday, June 9, 2022 4:35 PM
> To: Paolo Bonzini ; Philippe Mathieu-Daudé
> ; Dr. David Alan Gilbert ; Zhong,
> Yang ; Connor Kuehl
> Cc: qemu-devel@nongnu.org; Yao, Yuan ;
On 2022/6/24 上午9:20, Richard Henderson wrote:
On 6/23/22 17:45, maobibo wrote:
在 2022/6/24 07:34, Richard Henderson 写道:
On 6/23/22 01:55, Song Gao wrote:
+static void setup_sigcontext(CPULoongArchState *env,
+ struct target_sigcontext *sc,
+
On 6/23/22 17:45, maobibo wrote:
在 2022/6/24 07:34, Richard Henderson 写道:
On 6/23/22 01:55, Song Gao wrote:
+static void setup_sigcontext(CPULoongArchState *env,
+ struct target_sigcontext *sc,
+ struct extctx_layout *extctx)
+{
+ int
在 2022/6/24 08:45, maobibo 写道:
>
>
> 在 2022/6/24 07:34, Richard Henderson 写道:
>> On 6/23/22 01:55, Song Gao wrote:
>>> +static void setup_sigcontext(CPULoongArchState *env,
>>> + struct target_sigcontext *sc,
>>> + struct extctx_layout *e
在 2022/6/24 07:34, Richard Henderson 写道:
> On 6/23/22 01:55, Song Gao wrote:
>> +static void setup_sigcontext(CPULoongArchState *env,
>> + struct target_sigcontext *sc,
>> + struct extctx_layout *extctx)
>> +{
>> + int i;
>> +
>> + if
You can test booting the BMC with both '-device loader' and '-drive
file'. This is necessary because of how the fb-openbmc boot sequence
works (jump to 0x2000 after U-Boot SPL).
wget
https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd
qemu-system-arm -
Signed-off-by: Peter Delevoryas
---
hw/arm/aspeed_ast2600.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 8693660271..0656c02889 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -322,7 +322,7 @@ sta
Multi-SoC machines can use this property to specify a memory container
for each SoC. Single SoC machines will just specify get_system_memory().
Signed-off-by: Peter Delevoryas
---
hw/arm/aspeed.c | 4
hw/arm/aspeed_ast10x0.c | 5 ++---
hw/arm/aspeed_ast2600.c | 4 ++--
Signed-off-by: Peter Delevoryas
---
hw/arm/aspeed.c | 25 -
hw/arm/aspeed_soc.c | 26 ++
include/hw/arm/aspeed_soc.h | 2 ++
3 files changed, 28 insertions(+), 25 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
inde
Signed-off-by: Peter Delevoryas
---
hw/arm/aspeed_ast10x0.c | 16 ++--
hw/arm/aspeed_ast2600.c | 27 ++-
hw/arm/aspeed_soc.c | 23 +++
include/hw/arm/aspeed_soc.h | 9 +
4 files changed, 56 insertions(+), 19 deletion
Signed-off-by: Peter Delevoryas
---
MAINTAINERS| 1 +
hw/arm/fby35.c | 54 ++
hw/arm/meson.build | 3 ++-
3 files changed, 57 insertions(+), 1 deletion(-)
create mode 100644 hw/arm/fby35.c
diff --git a/MAINTAINERS b/MAINTAINERS
index aaa
sysbus_mmio_map maps devices into "get_system_memory()".
With the new SoC memory attribute, we want to make sure that each device is
mapped into the SoC memory.
In single SoC machines, the SoC memory is the same as "get_system_memory()",
but in multi SoC machines it will be different.
Signed-off
v2:
- Rebased on upstream/master + v2 of Cedric's DRAM mapping change:
https://patchwork.ozlabs.org/project/qemu-devel/patch/20220623202123.3972977-1-...@kaod.org/
- Got rid of all the sysbus patches, not needed (I can send the dead code
cleanup separately).
- Changed "system-memory" to "memor
Signed-off-by: Peter Delevoryas
---
hw/arm/aspeed_ast2600.c | 2 ++
hw/arm/aspeed_soc.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index f70b17d3f9..f950fff070 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -
On 6/23/22 01:55, Song Gao wrote:
+static void setup_sigcontext(CPULoongArchState *env,
+ struct target_sigcontext *sc,
+ struct extctx_layout *extctx)
+{
+int i;
+
+if (extctx->flags & SC_USED_FP) {
+__put_user(extctx->fpu.a
On 6/23/22 14:34, Klaus Jensen wrote:
From: Klaus Jensen
Hi,
The following changes since commit 7db86fe2ed220c196061824e652b94e7a2acbabf:
Merge tag 'pull-migration-20220623b' of https://gitlab.com/dagrh/qemu into
staging (2022-06-23 10:14:20 -0700)
are available in the Git repository at:
On Thu, May 19, 2022 at 11:37:12PM +0800, Chao Peng wrote:
> Register private memslot to fd-based memory backing store and handle the
> memfile notifiers to zap the existing mappings.
>
> Currently the register is happened at memslot creating time and the
> initial support does not include page mi
On Fri, May 20, 2022 at 06:31:02PM +, Sean Christopherson wrote:
> On Fri, May 20, 2022, Andy Lutomirski wrote:
> > The alternative would be to have some kind of separate table or bitmap (part
> > of the memslot?) that tells KVM whether a GPA should map to the fd.
> >
> > What do you all think
Lucas,
Can you please rebase this series with current master?
I got a conflict in patch 03, and every other patch that tries to add
instructions in insn32.decode, because of a missing "TLB Management
Instructions" that are not present there anymore.
Thanks,
Daniel
On 6/15/22 16:19, Lucas Co
On 6/23/22 09:53, Dr. David Alan Gilbert (git) wrote:
From: "Dr. David Alan Gilbert"
The following changes since commit 2b049d2c8dc01de750410f8f1a4eac498c04c723:
Merge tag 'pull-aspeed-20220622' of https://github.com/legoater/qemu into
staging (2022-06-22 07:27:06 -0700)
are available in
From: Klaus Jensen
This reverts commit d97eee64fef35655bd06f5c44a07fdb83a6274ae.
The emulated controller correctly accounts for not including bit buckets
in the controller-to-host data transfer, however it doesn't correctly
account for the holes for the on-disk data offsets.
Reported-by: Keith
On Thu, Jun 09, 2022 at 04:27:41PM +0100, Alberto Faria wrote:
> bdrv_{pread,pwrite}() now return -EIO instead of -EINVAL when 'bytes' is
> negative, making them consistent with bdrv_{preadv,pwritev}() and
> bdrv_co_{pread,pwrite,preadv,pwritev}().
>
> bdrv_pwrite_zeroes() now also calls trace_bdr
From: Klaus Jensen
The SRIOV series exposed an issued with how CC register writes are
handled and how CSTS is set in response to that. Specifically, after
applying the SRIOV series, the controller could end up in a state with
CC.EN set to '1' but with CSTS.RDY cleared to '0', causing drivers to
e
On 6/23/22 07:26, Leandro Lupori wrote:
On 6/21/22 18:26, Fabiano Rosas wrote:
[E-MAIL EXTERNO] Não clique em links ou abra anexos, a menos que você possa confirmar o
remetente e saber que o conteúdo é seguro. Em caso de e-mail suspeito entre
imediatamente em contato com o DTI.
Leandro Lupori
From: Klaus Jensen
The internally maintained AEN mask is not cleared on reset. Fix this.
Reviewed-by: Keith Busch
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 15d580a904ef..d349b3e42620 100644
--- a/hw
> On Jun 23, 2022, at 1:21 PM, Cédric Le Goater wrote:
>
> Currently, the Aspeed machines allocate a ram container region in
> which the machine ram region is mapped. See commit ad1a9782186d
> ("aspeed: add a RAM memory region container"). An extra region is
> mapped after ram in the ram contai
From: Łukasz Gieryk
PCI device capable of SR-IOV support is a new, still-experimental
feature with only a single working example of the Nvme device.
This patch in an attempt to fix a double-free problem when a
SR-IOV-capable Nvme device is hot-unplugged in the following scenario:
Qemu CLI:
From: Lukasz Maniak
Documentation describes 5 new parameters being added regarding SR-IOV:
sriov_max_vfs
sriov_vq_flexible
sriov_vi_flexible
sriov_max_vi_per_vf
sriov_max_vq_per_vf
The description also includes the simplest possible QEMU invocation
and the series of NVMe commands required to ena
From: Łukasz Gieryk
This patch updates the initialization place for the AER queue, so it’s
initialized once, at controller initialization, and not every time
controller is enabled.
While the original version works for a non-SR-IOV device, as it’s hard
to interact with the controller if it’s not
From: Łukasz Gieryk
The n->reg_size parameter unnecessarily splits the BAR0 size calculation
in two phases; removed to simplify the code.
With all the calculations done in one place, it seems the pow2ceil,
applied originally to reg_size, is unnecessary. The rounding should
happen as the last ste
From: Łukasz Gieryk
This patch implements the Function Level Reset, a feature currently not
implemented for the Nvme device, while listed as a mandatory ("shall")
in the 1.4 spec.
The implementation reuses FLR-related building blocks defined for the
pci-bridge module, and follows the same logic:
From: Łukasz Gieryk
With four new properties:
- sriov_v{i,q}_flexible,
- sriov_max_v{i,q}_per_vf,
one can configure the number of available flexible resources, as well as
the limits. The primary and secondary controller capability structures
are initialized accordingly.
Since the number of ava
From: Łukasz Gieryk
With the new command one can:
- assign flexible resources (queues, interrupts) to primary and
secondary controllers,
- toggle the online/offline state of given controller.
Signed-off-by: Łukasz Gieryk
Acked-by: Michael S. Tsirkin
Reviewed-by: Klaus Jensen
Signed-off-b
From: Łukasz Gieryk
An NVMe device with SR-IOV capability calculates the BAR size
differently for PF and VF, so it makes sense to extract the common code
to a separate function.
Signed-off-by: Łukasz Gieryk
Reviewed-by: Klaus Jensen
Acked-by: Michael S. Tsirkin
Signed-off-by: Klaus Jensen
--
From: Łukasz Gieryk
The NVMe device defines two properties: max_ioqpairs, msix_qsize. Having
them as constants is problematic for SR-IOV support.
SR-IOV introduces virtual resources (queues, interrupts) that can be
assigned to PF and its dependent VFs. Each device, following a reset,
should work
From: Lukasz Maniak
This patch implements initial support for Single Root I/O Virtualization
on an NVMe device.
Essentially, it allows to define the maximum number of virtual functions
supported by the NVMe controller via sriov_max_vfs parameter.
Passing a non-zero value to sriov_max_vfs trigge
From: Klaus Jensen
Use the same logic in format as in flush, saving a bh scheduling at the
start of the operation and moving completion handling to a separately
invoked bottom halve.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 43 ++-
1 file changed
From: Lukasz Maniak
Implementation of Primary Controller Capabilities data
structure (Identify command with CNS value of 14h).
Currently, the command returns only ID of a primary controller.
Handling of remaining fields are added in subsequent patches
implementing virtualization enhancements.
S
From: Lukasz Maniak
Introduce handling for Secondary Controller List (Identify command with
CNS value of 15h).
Secondary controller ids are unique in the subsystem, hence they are
reserved by it upon initialization of the primary controller to the
number of sriov_max_vfs.
ID reservation require
From: Klaus Jensen
Hi,
The following changes since commit 7db86fe2ed220c196061824e652b94e7a2acbabf:
Merge tag 'pull-migration-20220623b' of https://gitlab.com/dagrh/qemu into
staging (2022-06-23 10:14:20 -0700)
are available in the Git repository at:
git://git.infradead.org/qemu-nvme.git
From: Klaus Jensen
Remove an initial bh scheduling and move the completion invocation into
a separate bh. Also, make sure that iocb->aiocb is NULL'ed when
cancelling.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 32 +++-
1 file changed, 19 insertions(+), 13 dele
On 6/23/22 12:30, Peter Maydell wrote:
-static inline bool sadd32_overflow(int32_t x, int32_t y, int32_t *ret)
-{
-#if __has_builtin(__builtin_add_overflow) || __GNUC__ >= 5
-return __builtin_add_overflow(x, y, ret);
-#else
-*ret = x + y;
-return ((*ret ^ x) & ~(x ^ y)) < 0;
-#endif
-
From: Klaus Jensen
Make sure that iocb->aiocb is NULL'ed when cancelling.
Fixes: 38f4ac65ac88 ("hw/nvme: reimplement flush to allow cancellation")
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index a85eabfa8b
From: Klaus Jensen
Cancelling a format operation neglects to set iocb->ret as well as
clearing the iocb->aiocb after cancelling the underlying aiocb.
Fix this.
Fixes: 3bcf26d3d619 ("hw/nvme: reimplement format nvm to allow cancellation")
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 3 +++
On Thu, Jun 09, 2022 at 04:27:40PM +0100, Alberto Faria wrote:
> For consistency with other I/O functions, and in preparation to
> implement bdrv_{pread,pwrite}() using generated_co_wrapper.
>
> unsigned int fits in int64_t, so all callers remain correct.
>
> bdrv_check_request32() is called furt
From: Klaus Jensen
Move error handling down in the call stack to simplify the control flow.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 50 --
1 file changed, 12 insertions(+), 38 deletions(-)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
in
From: Klaus Jensen
Number of ZRWA Resources should be initialized to Max Active Resources,
and not the total number of zones.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 8 ++--
hw/nvme/ns.c | 4 ++--
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/nvme/ctrl.c b/hw
From: Klaus Jensen
When the DSM operation is cancelled asynchronously, we set iocb->ret to
-ECANCELED. However, the callback function only checks the return value
of the completed aio, which may have completed succesfully prior to the
cancellation and thus the callback ends up continuing the dsm
From: Klaus Jensen
Replace the local Error variable with errp and ERRP_GUARD().
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index b688afccbe5a..af82daa304bf 100644
--- a/hw/nvme/
From: Klaus Jensen
Commit 44219b6029fc ("hw/nvme: 64-bit pi support") accidentially
reintroduced code that was removed in commit a6de6ed5092c ("hw/nvme:
move format parameter parsing").
It is beneign, but get rid of it anyway.
Fixes: 44219b6029fc ("hw/nvme: 64-bit pi support")
Signed-off-by: Kl
From: Klaus Jensen
The NvmeCtrl is a PCIDevice, so remove the redundant passing of the
PCIDevice parameter.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index c8c4a0718f
From: Klaus Jensen
If the zone reset operation is cancelled but the block unmap operation
completes normally, the callback will continue resetting the next zone
since it neglects to check iocb->ret which will have been set to
-ECANCELED. Make sure that this is checked and bail out if an error is
From: Klaus Jensen
This series includes a couple of misc fixes as well as some cleanup
pertaining to the aio handling in flush, dsm, copy and zone reset. As
Jinhao gets around to iothread stuff, it might come in handy to have
this stuff cleaned up a bit.
Dmitrys fix (nvme-next commit "hw/nvme: a
From: Klaus Jensen
Make nvme_check_constraints() return an int and fix incorrect use of
errp/local_err.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 48 +++-
1 file changed, 23 insertions(+), 25 deletions(-)
diff --git a/hw/nvme/ctrl.c b/hw/nvme
On Wed, Jun 22, 2022 at 01:45:13PM +0200, Jason A. Donenfeld wrote:
> If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
> initialize early. Set this using the usual guest random number
> generation function. This is confirmed to successfully initialize the
> RNG on Linux 5.19-
On 6/23/22 04:41, Peter Maydell wrote:
+/*
+ * FIXME: The ARMVectorReg elements are stored in host-endian 64-bit units.
+ * We do not have a defined ordering of the 64-bit units for host-endian
+ * 128-bit quantities. For now, just leave the host words in little-endian
+ * order and hope for the
Currently, the Aspeed machines allocate a ram container region in
which the machine ram region is mapped. See commit ad1a9782186d
("aspeed: add a RAM memory region container"). An extra region is
mapped after ram in the ram container to catch invalid access done by
FW. That's how FW determines the
On Thu, Jun 9, 2022 at 4:27 PM Alberto Faria wrote:
> Start by making the interfaces of analogous non-coroutine and coroutine
> functions consistent with each other, then implement the non-coroutine
> ones using generated_co_wrapper.
>
> For the bdrv_pwrite_sync() case, also add the missing
> bdrv
On Thu, 23 Jun 2022 at 17:41, Thomas Huth wrote:
>
> According to commit cec07c0b612975 these wrappers were required
> for GCC < 5.0 and Clang < 3.8. We don't support such old compilers
> at all anymore, so we can remove the wrappers now.
>
> Signed-off-by: Thomas Huth
> ---
> Not sure whether i
On Thu, Jun 23, 2022 at 09:47:51AM +0100, Daniel P. Berrangé wrote:
> > Hmm, when I wanted to run the whole bunch of the migration-test again I
> > found that precopy tls test hangs (/x86_64/migration/precopy/unix/tls/psk).
> > Though for this time it also hangs for me even with the master branch,
> On Jun 23, 2022, at 10:56 AM, Cédric Le Goater wrote:
>
> Currently, the Aspeed machines allocate a ram container region in
> which the machine ram region is mapped. See commit ad1a9782186d
> ("aspeed: add a RAM memory region container"). An extra region is
> mapped after ram in the ram conta
On 6/23/22 10:49, Thomas Huth wrote:
According to https://gitlab.com/qemu-project/qemu/-/issues/1080#note_998088246
QEMU does not compile with older versions of libpng, so we should check
for a good version in meson.build. According to repology.org, our supported
host target operating systems shi
> On Jun 23, 2022, at 8:39 AM, Cédric Le Goater wrote:
>
> On 6/23/22 14:57, Peter Maydell wrote:
>> On Thu, 23 Jun 2022 at 13:37, Peter Delevoryas wrote:
>>>
>>> Note: sysbus_mmio_map(), sysbus_mmio_map_overlap(), and others are still
>>> using get_system_memory indirectly.
>>>
>>> Signed-o
> On Jun 23, 2022, at 8:09 AM, Cédric Le Goater wrote:
>
> On 6/23/22 12:26, Peter Delevoryas wrote:
>> Signed-off-by: Peter Delevoryas
>
> Let's start simple without flash support. We should be able to
> load FW blobs in each CPU address space using loader devices.
Actually, I was unable to
> On Jun 23, 2022, at 5:56 AM, Peter Maydell wrote:
>
> On Thu, 23 Jun 2022 at 13:04, Peter Delevoryas wrote:
>>
>> Signed-off-by: Peter Delevoryas
>> ---
>> hw/arm/aspeed_ast10x0.c | 10 --
>> hw/arm/aspeed_ast2600.c | 19 ++-
>> hw/arm/aspeed_soc.c | 9 +
> On Jun 23, 2022, at 5:30 AM, Peter Maydell wrote:
>
> On Thu, 23 Jun 2022 at 12:31, Peter Delevoryas wrote:
>>
>> Right now it's just defined as the regular global system memory. If we
>> migrate all the SoC code to use this property instead of directly calling
>> get_system_memory(), then
> On Jun 23, 2022, at 5:15 AM, Peter Maydell wrote:
>
> On Thu, 23 Jun 2022 at 11:56, Peter Delevoryas wrote:
>>
>> Signed-off-by: Peter Delevoryas
>> ---
>> hw/core/sysbus.c| 6 ++
>> include/hw/sysbus.h | 2 ++
>> 2 files changed, 8 insertions(+)
>>
>> diff --git a/hw/core/sysbus.c
On 6/23/22 19:56, Cédric Le Goater wrote:
Currently, the Aspeed machines allocate a ram container region in
which the machine ram region is mapped. See commit ad1a9782186d
("aspeed: add a RAM memory region container"). An extra region is
mapped after ram in the ram container to catch invalid acce
Currently, the Aspeed machines allocate a ram container region in
which the machine ram region is mapped. See commit ad1a9782186d
("aspeed: add a RAM memory region container"). An extra region is
mapped after ram in the ram container to catch invalid access done by
FW. That's how FW determines the
According to https://gitlab.com/qemu-project/qemu/-/issues/1080#note_998088246
QEMU does not compile with older versions of libpng, so we should check
for a good version in meson.build. According to repology.org, our supported
host target operating systems ship these versions:
Fedora
Hello,
I’m trying to trace the physical address in the RAM for some data that is being
written to a block device. I have access to the QEMUIOVector buffer that hold
that data. However, I’m not sure how to trace how’s it being written from the
RAM to the buffer, and how to get the physical addre
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