[PATCH v5 09/22] target/riscv: Adjust csr write mask with XLEN

Write mask is representing the bits we care about. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvi.c.inc | 4 ++-- target/riscv/op_helper.c| 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) dif

[PATCH v5 05/22] target/riscv: Ignore the pc bits above XLEN

The read from PC for translation is in cpu_get_tb_cpu_state, before translation. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu_helper.

[PATCH v5 12/22] target/riscv: Calculate address according to XLEN

Define one common function to compute a canonical address from a register plus offset. Merge gen_pm_adjust_address into this function. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rva.c.inc | 9 +++-- target/riscv

[PATCH v5 10/22] target/riscv: Create current pm fields in env

Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis --- target/riscv/cpu.c| 1 + target/riscv/cpu.h| 4 target/riscv/cpu_helper.c | 43 +++ target/riscv/csr.c| 19 + target/riscv/machine.c| 10 + 5

[PATCH v5 00/22] Support UXL filed in xstatus

In this patch set, we process the pc reigsters writes, gdb reads and writes, and address calculation under different UXLEN settings. The patch set v5 fix an error in v4: miss to select gdb core xml according to mxl. Besides, add xl field in CPURISCVState, so that we can remove many redundant riscv

[PATCH v5 03/22] target/riscv: Sign extend pc for different XLEN

When pc is written, it is sign-extended to fill the widest supported XLEN. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/translate.c | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/target/riscv/tran

[PATCH v5 07/22] target/riscv: Use gdb xml according to max mxlen

Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 3 ++ target/riscv/gdbstub.c | 71 +++--- 2 files changed, 55 insertions(+), 19 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/c

[PATCH v5 01/22] target/riscv: Adjust pmpcfg access with mxl

Signed-off-by: LIU Zhiwei --- target/riscv/csr.c | 18 ++ target/riscv/pmp.c | 12 2 files changed, 22 insertions(+), 8 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 9f41954894..ce20c3a970 100644 --- a/target/riscv/csr.c +++ b/target/riscv/c

[PATCH v5 02/22] target/riscv: Don't save pc when exception return

As pc will be written by the xepc in exception return, just ignore pc in translation. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/helper.h | 4 ++-- target/riscv/insn_trans/trans_privileged.c.inc | 7 ++-

[PATCH v5 06/22] target/riscv: Extend pc for runtime pc write

In some cases, we must restore the guest PC to the address of the start of the TB, such as when the instruction counter hits zero. So extend pc register according to current xlen for these cases. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/

Re: [PATCH 1/2] hw/arm/virt: Rename default_bus_bypass_iommu

Hi Markus, On Thu, Nov 25, 2021 at 08:11:04AM +0100, Markus Armbruster wrote: > Peter, this patch fixes a bug that became a regression when the fix > missed 6.1. It's been stuck on the list since August. Please have a > look, and if it's good, get it merged. I'll ask the i386/pc maintainers > t

[PATCH for-7.0 2/4] hw/nvme: add zone attribute get/set helpers

From: Klaus Jensen Add some get/set helpers for zone attributes. Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 4 ++-- include/block/nvme.h | 4 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 489d586ab9d7..7ac6ec50a0d1 100644

[PATCH for-7.0 3/4] hw/nvme: add ozcs enum

From: Klaus Jensen Add enumeration for OZCS values. Signed-off-by: Klaus Jensen --- hw/nvme/ns.c | 3 ++- include/block/nvme.h | 4 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/nvme/ns.c b/hw/nvme/ns.c index 8b5f98c76180..356b6c1c2f14 100644 --- a/hw/nvme/ns.c

[PATCH for-7.0 4/4] hw/nvme: add support for zoned random write area

From: Klaus Jensen Add support for TP 4076 ("Zoned Random Write Area"), v2021.08.23 ("Ratified"). This adds three new namespace parameters: "zoned.numzrwa" (number of zrwa resources, i.e. number of zones that can have a zrwa), "zoned.zrwas" (zrwa size in LBAs), "zoned.zrwafg" (granularity in LBA

[PATCH for-7.0 1/4] hw/nvme: add struct for zone management send

From: Klaus Jensen Add struct for Zone Management Send in preparation for more zone send flags. Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 10 -- include/block/nvme.h | 18 ++ 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/hw/nvme/ctrl.c b/h

[PATCH for-7.0 0/4] hw/nvme: zoned random write area

From: Klaus Jensen This series adds support for a zoned random write area as standardized in TP 4076 ("Zoned Random Write Area"). Klaus Jensen (4): hw/nvme: add struct for zone management send hw/nvme: add zone attribute get/set helpers hw/nvme: add ozcs enum hw/nvme: add support for zon

Re: [PATCH v3 03/23] multifd: Rename used field to num

"Dr. David Alan Gilbert" wrote: > * Juan Quintela (quint...@redhat.com) wrote: >> We will need to split it later in zero_num (number of zero pages) and >> normal_num (number of normal pages). This name is better. >> >> Signed-off-by: Juan Quintela >> --- >> migration/multifd.h | 2 +- >> migr

Re: [PATCH v3 01/23] multifd: Delete useless operation

"Dr. David Alan Gilbert" wrote: > * Juan Quintela (quint...@redhat.com) wrote: >> We are divining by page_size to multiply again in the only use. > ^--- typo >> Once there, impreve the comments. > ^--- typo >> >> Signed-off-by: Juan Quintela > > OK, with the typo's

Re: [PATCH v3 02/23] migration: Never call twice qemu_target_page_size()

"Dr. David Alan Gilbert" wrote: > * Juan Quintela (quint...@redhat.com) wrote: >> Signed-off-by: Juan Quintela > > OK, not much difference This was after "finishing" the series I realised that I was calling that function around 30 times or so in that three files. And as Richard complained when

Re: [PATCH 2/2] hw/i386: Rename default_bus_bypass_iommu

On Thu, Nov 25, 2021 at 08:12:25AM +0100, Markus Armbruster wrote: > Michael & Marcel, this patch fixes a bug that became a regression when > the fix missed 6.1. It's been stuck on the list since August. Please > have a look, and if it's good, get it merged. Thanks for the reminder. Jean-Philip

Re: SEV guest attestation

On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote: > * Daniel P. Berrangé (berra...@redhat.com) wrote: > > On Wed, Nov 24, 2021 at 11:34:16AM -0500, Tyler Fanelli wrote: > > > Hi, > > > > > > We recently discussed a way for remote SEV guest attestation through QEMU. > > > My i

Re: [PATCH 2/2] hw/i386: Rename default_bus_bypass_iommu

Michael & Marcel, this patch fixes a bug that became a regression when the fix missed 6.1. It's been stuck on the list since August. Please have a look, and if it's good, get it merged. I just asked the arm/virt maintainer to do the same for PATCH 1. Jean-Philippe Brucker writes: > Since comm

Re: [PATCH 1/2] hw/arm/virt: Rename default_bus_bypass_iommu

Peter, this patch fixes a bug that became a regression when the fix missed 6.1. It's been stuck on the list since August. Please have a look, and if it's good, get it merged. I'll ask the i386/pc maintainers to do the same for PATCH 2. Jean-Philippe Brucker writes: > Since commit d8fb7d0969d5

[PING][Ping] [PATCH v1 0/2] vl: flush all task from rcu queue before exiting

ping ping On 19.11.2021 12:42, Denis Plotnikov wrote: Ping! On 15.11.2021 12:41, Denis Plotnikov wrote: v1 -> v0: * move monitor cleanup to the very end of qemu cleanup [Paolo] The goal is to notify management layer about device destruction on qemu shutdown. Without this series DEVICE_DEL

Re: [PATCH 01/20] Hexagon HVX (target/hexagon) README

On 7/26/21 8:59 AM, Taylor Simpson wrote: > We're working on system mode support for Hexagon, and we plan to upstream it > when it is ready. > > Thanks, > Taylor Any progress on this? (Is there a way for outsiders to track the status?) Thanks, Rob

Re: [PATCH] intel-iommu: ignore SNP bit in scalable mode

On Thu, Nov 25, 2021 at 05:49:38AM +, Liu, Yi L wrote: > > From: Peter Xu > > Sent: Thursday, November 25, 2021 12:31 PM > > > > On Thu, Nov 25, 2021 at 04:03:34AM +, Liu, Yi L wrote: > > > > From: Peter Xu > > > > Sent: Wednesday, November 24, 2021 3:57 PM > > > > > > > > On Wed, Nov 24

RE: [PATCH] intel-iommu: ignore SNP bit in scalable mode

> From: Jason Wang > Sent: Wednesday, November 24, 2021 4:29 PM > > On Wed, Nov 24, 2021 at 3:57 PM Peter Xu wrote: > > > > On Wed, Nov 24, 2021 at 02:03:09PM +0800, Jason Wang wrote: > > > When booting with scalable mode, I hit this error: > > > > > > qemu-system-x86_64: vtd_iova_to_slpte: dete

RE: [PATCH] intel-iommu: ignore SNP bit in scalable mode

> From: Jason Wang > Sent: Wednesday, November 24, 2021 5:35 PM > > On Wed, Nov 24, 2021 at 5:23 PM Peter Xu wrote: > > > > On Wed, Nov 24, 2021 at 05:01:42PM +0800, Jason Wang wrote: > > > > > > > -static bool vtd_slpte_nonzero_rsvd(uint64_t slpte, uint32_t > level) > > > > > > > +static bool v

RE: [PATCH] intel-iommu: ignore SNP bit in scalable mode

> From: Peter Xu > Sent: Thursday, November 25, 2021 12:31 PM > > On Thu, Nov 25, 2021 at 04:03:34AM +, Liu, Yi L wrote: > > > From: Peter Xu > > > Sent: Wednesday, November 24, 2021 3:57 PM > > > > > > On Wed, Nov 24, 2021 at 02:03:09PM +0800, Jason Wang wrote: > > > > When booting with sca

Re: [PATCH] intel-iommu: ignore SNP bit in scalable mode

On Thu, Nov 25, 2021 at 04:03:34AM +, Liu, Yi L wrote: > > From: Peter Xu > > Sent: Wednesday, November 24, 2021 3:57 PM > > > > On Wed, Nov 24, 2021 at 02:03:09PM +0800, Jason Wang wrote: > > > When booting with scalable mode, I hit this error: > > > > > > qemu-system-x86_64: vtd_iova_to_slp

RE: [PATCH] intel-iommu: ignore SNP bit in scalable mode

> From: Peter Xu > Sent: Wednesday, November 24, 2021 3:57 PM > > On Wed, Nov 24, 2021 at 02:03:09PM +0800, Jason Wang wrote: > > When booting with scalable mode, I hit this error: > > > > qemu-system-x86_64: vtd_iova_to_slpte: detected splte reserve non- > zero iova=0xf002, level=0x1slpte=0x

Re: [PATCH v3 1/3] target/ppc: Fixed call to deferred exception

On Thu, Nov 25, 2021 at 01:49:46AM +0100, BALATON Zoltan wrote: > On Wed, 24 Nov 2021, Lucas Mateus Castro (alqotel) wrote: > > mtfsf, mtfsfi and mtfsb1 instructions call helper_float_check_status > > after updating the value of FPSCR, but helper_float_check_status > > checks fp_status and fp_statu

Re: [PATCH] target/ppc: fix Hash64 MMU update of PTE bit R

On Wed, Nov 24, 2021 at 09:00:46AM -0300, Leandro Lupori wrote: > When updating the R bit of a PTE, the Hash64 MMU was using a wrong byte > offset, causing the first byte of the adjacent PTE to be corrupted. > This caused a panic when booting FreeBSD, using the Hash MMU. > > Signed-off-by: Leandro

Re: [PATCH v11 19/26] linux-user: Add LoongArch signal support

Hi  Richard, On 2021/11/20 下午6:33, Richard Henderson wrote: +/* this struct defines a stack used during syscall handling */ +typedef struct target_sigaltstack { +    abi_long ss_sp; +    abi_int ss_flags; +    abi_ulong ss_size; +} target_stack_t; + +/* + * sigaltstack controls + */ +

Re: [PATCH] intel-iommu: ignore SNP bit in scalable mode

On Wed, Nov 24, 2021 at 6:10 PM Peter Xu wrote: > > On Wed, Nov 24, 2021 at 05:35:18PM +0800, Jason Wang wrote: > > On Wed, Nov 24, 2021 at 5:23 PM Peter Xu wrote: > > > > > > On Wed, Nov 24, 2021 at 05:01:42PM +0800, Jason Wang wrote: > > > > > > > > -static bool vtd_slpte_nonzero_rsvd(uint64_t

[PATCH 2/2] virtio-balloon: correct used length

Spec said: "and len the total of bytes written into the buffer." For inflateq, deflateq and statsq, we don't process in_sg so the used length should be zero. For free_page_vq, since the pages could be changed in the destination, we should make all pages used for safety. Signed-off-by: Jason Wang

[PATCH 1/2] virito-balloon: process all in sgs for free_page_vq

We only process the first in sg which may lead to the bitmap of the pages belongs to following sgs were not cleared. This may result more pages to be migrated. Fixing this by process all in sgs for free_page_vq. Signed-off-by: Jason Wang --- hw/virtio/virtio-balloon.c | 7 +-- 1 file changed

Re: [PATCH for-7.0 v7 02/10] target/ppc: PMU basic cycle count for pseries TCG

On 11/22/21 02:07, David Gibson wrote: On Fri, Nov 19, 2021 at 03:22:08PM -0300, Daniel Henrique Barboza wrote: This patch adds the barebones of the PMU logic by enabling cycle counting. The overall logic goes as follows: - a helper is added to control the PMU state on each MMCR0 write. This

Re: [PATCH v3 3/3] target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52

On Wed, 24 Nov 2021, Lucas Mateus Castro (alqotel) wrote: This commit fixes the difference reported in the bug in the reserved bit 52, it does this by adding this bit to the mask of bits to not be directly altered in the ppc_store_fpscr function (the hardware used to compare to QEMU was a Power9)

Re: [PATCH v3 1/3] target/ppc: Fixed call to deferred exception

On Wed, 24 Nov 2021, Lucas Mateus Castro (alqotel) wrote: mtfsf, mtfsfi and mtfsb1 instructions call helper_float_check_status after updating the value of FPSCR, but helper_float_check_status checks fp_status and fp_status isn't updated based on FPSCR and since the value of fp_status is reset ear

Re: [RFC PATCH 0/2] QEMU/openbios: PPC Software TLB support in the G4 family

On Wed, 24 Nov 2021, Fabiano Rosas wrote: Fabiano Rosas writes: Hi all, We have this bug in QEMU which indicates that we haven't been able to run openbios on a 7450 cpu for quite a long time: https://gitlab.com/qemu-project/qemu/-/issues/86 OK: $ ./qemu-system-ppc -serial mon:stdio -nogra

Re: [PATCH-for-6.2 2/2] tests/qtest/fdc-test: Add a regression test for CVE-2021-3507

On Tue, Nov 23, 2021 at 11:08 AM Hanna Reitz wrote: > On 18.11.21 12:57, Philippe Mathieu-Daudé wrote: > > Add the reproducer from > https://gitlab.com/qemu-project/qemu/-/issues/339 > > > > Without the previous commit, when running 'make check-qtest-i386' > > with QEMU configured with '--enable-

Re: [PATCH v4 0/3] hw/block/fdc: Fix CVE-2021-20196

On Wed, Nov 24, 2021 at 11:15 AM Philippe Mathieu-Daudé wrote: > Since v3: > - Preliminary extract blk_create_empty_drive() > - qtest checks qtest_check_clang_sanitizer() enabled > - qtest uses null-co:// driver instead of file > > Philippe Mathieu-Daudé (3): > hw/block/fdc: Extract blk_create_

Re: [RFC PATCH 0/2] QEMU/openbios: PPC Software TLB support in the G4 family

Fabiano Rosas writes: > Hi all, > > We have this bug in QEMU which indicates that we haven't been able to > run openbios on a 7450 cpu for quite a long time: > > https://gitlab.com/qemu-project/qemu/-/issues/86 > > OK: > $ ./qemu-system-ppc -serial mon:stdio -nographic -cpu 7410 > > >> ==

Re: [PATCH] target/ppc: fix Hash64 MMU update of PTE bit R

On 24/11/2021 16:52, Cédric Le Goater wrote: It can be reproduced by trying to boot this iso: https://download.freebsd.org/ftp/snapshots/powerpc/powerpc64/ISO-IMAGES/14.0/FreeBSD-14.0-CURRENT-powerpc-powerpc64-20211028-4827bf76bce-250301-disc1.iso.xz It is easier to reproduce it using power8/

[PATCH v2] hw/intc/arm_gicv3: Update cached state after LPI state changes

The logic of gicv3_redist_update() is as follows: * it must be called in any code path that changes the state of (only) redistributor interrupts * if it finds a redistributor interrupt that is (now) higher priority than the previous highest-priority pending interrupt, then this must be t

Re: [PATCH] target/ppc: fix Hash64 MMU update of PTE bit R

On 11/24/21 20:42, Daniel Henrique Barboza wrote: On 11/24/21 16:17, Leandro Lupori wrote: ​​     On 11/24/21 14:40, Daniel Henrique Barboza wrote:     >     >     > On 11/24/21 09:00, Leandro Lupori wrote:     >> When updating the R bit of a PTE, the Hash64 MMU was using a wrong byte     >>

Re: [PATCH] target/ppc: fix Hash64 MMU update of PTE bit R

On 11/24/21 16:17, Leandro Lupori wrote: ​​ On 11/24/21 14:40, Daniel Henrique Barboza wrote: > > > On 11/24/21 09:00, Leandro Lupori wrote: >> When updating the R bit of a PTE, the Hash64 MMU was using a wrong byte >> offset, causing the first byte of the adjacent PT

Re: Other pages for docs/devel/ [Was: Re: ... Update URLs of "SubmitAPatch" ...]

On 11/19/21 11:15, Kashyap Chamarthy wrote: Noted; so these two pages: -https://www.qemu.org/contribute/security-process/ -https://www.qemu.org/contribute/report-a-bug/ What about these two other pages (which are also linked to from the "contribute"[1] part of the website)? Do they belong to d

[PATCH 22/23] python: remove the old QMP package

Thank you for your service! Signed-off-by: John Snow --- python/PACKAGE.rst | 4 +- python/README.rst | 2 +- python/qemu/qmp/README.rst | 9 - python/qemu/qmp/__init__.py | 396 python/qemu/qmp/py.typed| 0 python/setup.cfg

Re: [PATCH v3 03/23] multifd: Rename used field to num

* Juan Quintela (quint...@redhat.com) wrote: > We will need to split it later in zero_num (number of zero pages) and > normal_num (number of normal pages). This name is better. > > Signed-off-by: Juan Quintela > --- > migration/multifd.h | 2 +- > migration/multifd.c | 38 +++--

Re: [PATCH] target/ppc: fix Hash64 MMU update of PTE bit R

It can be reproduced by trying to boot this iso: https://download.freebsd.org/ftp/snapshots/powerpc/powerpc64/ISO-IMAGES/14.0/FreeBSD-14.0-CURRENT-powerpc-powerpc64-20211028-4827bf76bce-250301-disc1.iso.xz It is easier to reproduce it using power8/powernv8. power8 only has Hash MMU. I understa

[PATCH 23/23] python: re-enable pylint duplicate-code warnings

With the old library gone, there's nothing duplicated in the tree, so the warning suppression can be removed. Signed-off-by: John Snow --- python/setup.cfg | 1 - 1 file changed, 1 deletion(-) diff --git a/python/setup.cfg b/python/setup.cfg index 5140a5b322..c341e922c2 100644 --- a/python/setu

[PATCH 19/23] python/aqmp: take QMPBadPortError and parse_address from qemu.qmp

Shift these definitions over from the qmp package to the async qmp package. Signed-off-by: John Snow --- python/qemu/aqmp/aqmp_tui.py | 2 +- python/qemu/aqmp/legacy.py | 30 ++ python/qemu/qmp/__init__.py | 26 -- 3 files changed, 27 inser

[PATCH 21/23] python/aqmp: copy qmp docstrings to qemu.aqmp.legacy

Copy the docstrings out of qemu.qmp, adjusting them as necessary to more accurately reflect the current state of this class. Signed-off-by: John Snow --- python/qemu/aqmp/legacy.py | 110 ++--- 1 file changed, 102 insertions(+), 8 deletions(-) diff --git a/python

[PATCH 13/23] scripts/cpu-x86-uarch-abi: switch to AQMP

Signed-off-by: John Snow --- scripts/cpu-x86-uarch-abi.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/scripts/cpu-x86-uarch-abi.py b/scripts/cpu-x86-uarch-abi.py index 8963d90f0b..c262d2f027 100644 --- a/scripts/cpu-x86-uarch-abi.py +++ b/scripts/cpu-x86-uarch-abi.py @

[PATCH 18/23] python: temporarily silence pylint duplicate-code warnings

The next several commits copy some code from qemu.qmp to qemu.aqmp, then delete qemu.qmp. In the interim, to prevent test failures, the duplicate code detection needs to be silenced to prevent bisect problems with CI testing. Signed-off-by: John Snow --- python/setup.cfg | 1 + 1 file changed, 1

[PATCH 14/23] scripts/render-block-graph: switch to AQMP

Creating an instance of qemu.aqmp.ExecuteError is too involved here, so just drop the specificity down to a generic AQMPError. Signed-off-by: John Snow --- scripts/render_block_graph.py | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/scripts/render_block_graph.py b/sc

[PATCH 08/23] python/qmp: switch qmp-shell to AQMP

We have a replacement for async QMP, but it doesn't have feature parity yet. For now, then, port the old tool onto the new backend. Signed-off-by: John Snow --- python/qemu/aqmp/legacy.py | 3 +++ python/qemu/qmp/qmp_shell.py | 31 +-- 2 files changed, 20 insertion

[PATCH 20/23] python/aqmp: fully separate from qmp.QEMUMonitorProtocol

After this patch, qemu.aqmp.legacy.QEMUMonitorProtocol no longer inherits from qemu.qmp.QEMUMonitorProtocol. To do this, several inherited methods need to be explicitly re-defined. Signed-off-by: John Snow --- python/qemu/aqmp/legacy.py | 38 -- 1 file changed

[PATCH 17/23] iotests: switch to AQMP

Simply import the type defition from the new location. Signed-off-by: John Snow --- tests/qemu-iotests/iotests.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py index 83bfedb902..cb21aebe36 100644 --- a/tests/qemu

[PATCH 09/23] python: move qmp utilities to python/qemu/utils

In order to upload a QMP package to PyPI, I want to remove any scripts that I am not 100% confident I want to support upstream, beyond our castle walls. Move most of our QMP utilities into the utils package so we can split them out from the PyPI upload. Signed-off-by: John Snow --- python/qemu/

[PATCH 07/23] python/qmp: switch qom tools to AQMP

Signed-off-by: John Snow --- python/qemu/qmp/qom.py| 5 +++-- python/qemu/qmp/qom_common.py | 7 --- python/qemu/qmp/qom_fuse.py | 11 ++- 3 files changed, 13 insertions(+), 10 deletions(-) diff --git a/python/qemu/qmp/qom.py b/python/qemu/qmp/qom.py index 8ff28a8343..bb5

[PATCH 15/23] scripts/bench-block-job: switch to AQMP

For this commit, we only need to remove accommodations for the synchronous QMP library. Signed-off-by: John Snow --- scripts/simplebench/bench_block_job.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/scripts/simplebench/bench_block_job.py b/scripts/simplebench/bench_bl

[PATCH 12/23] scripts/cpu-x86-uarch-abi: fix CLI parsing

Signed-off-by: John Snow --- scripts/cpu-x86-uarch-abi.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/scripts/cpu-x86-uarch-abi.py b/scripts/cpu-x86-uarch-abi.py index 08acc52a81..8963d90f0b 100644 --- a/scripts/cpu-x86-uarch-abi.py +++ b/scripts/cpu-x86-uarch-abi.py @@

[PATCH 06/23] python/qmp: switch qemu-ga-client to AQMP

Signed-off-by: John Snow --- python/qemu/qmp/qemu_ga_client.py | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/python/qemu/qmp/qemu_ga_client.py b/python/qemu/qmp/qemu_ga_client.py index b3e1d98c9e..15ed430c61 100644 --- a/python/qemu/qmp/qemu_ga_clie

[PATCH 16/23] iotests/mirror-top-perms: switch to AQMP

Signed-off-by: John Snow --- Note: I still need to adjust the logging. The problem now is that the logging messages include the PID of the test process, so they need to be filtered out. I'll investigate that for a follow-up, or for v2. I could just add yet another filtering function somewhere,

[PATCH 10/23] python: move qmp-shell under the AQMP package

Signed-off-by: John Snow --- python/README.rst | 2 +- python/qemu/{qmp => aqmp}/qmp_shell.py | 0 python/setup.cfg | 2 +- scripts/qmp/qmp-shell | 2 +- 4 files changed, 3 insertions(+), 3 deletions(-) rename python/qemu/{qmp => aqmp}/

[PATCH 03/23] python/aqmp: copy type definitions from qmp

Copy the remaining type definitions from QMP into the qemu.aqmp.legacy module. Now, most users don't need to import anything else but qemu.aqmp.legacy. Signed-off-by: John Snow --- python/qemu/aqmp/legacy.py | 22 -- python/qemu/aqmp/protocol.py | 16 ++-- 2 fil

[PATCH 11/23] python/machine: permanently switch to AQMP

Remove the QEMU_PYTHON_LEGACY_QMP environment variable, making the switch permanent. Update Exceptions and import paths as necessary. Signed-off-by: John Snow --- python/qemu/machine/machine.py | 18 +++--- python/qemu/machine/qtest.py | 2 +- 2 files changed, 8 insertions(+), 12

[PATCH 04/23] python/aqmp: add SocketAddrT to package root

It's a commonly needed definition, it can be re-exported by the root. Signed-off-by: John Snow --- python/qemu/aqmp/__init__.py | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/python/qemu/aqmp/__init__.py b/python/qemu/aqmp/__init__.py index 880d5b6fa7..c6fa2dda58 1

[PATCH 02/23] python/aqmp: handle asyncio.TimeoutError on execute()

This exception can be injected into any await statement. If we are canceled via timeout, we want to clear the pending execution record on our way out. Signed-off-by: John Snow --- python/qemu/aqmp/qmp_client.py | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/python/qe

[PATCH 05/23] python/qemu-ga-client: update instructions to newer CLI syntax

Signed-off-by: John Snow --- python/qemu/qmp/qemu_ga_client.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/python/qemu/qmp/qemu_ga_client.py b/python/qemu/qmp/qemu_ga_client.py index 67ac0b4211..b3e1d98c9e 100644 --- a/python/qemu/qmp/qemu_ga_client.py +++ b/python/qemu/q

[PATCH 01/23] python/aqmp: add __del__ method to legacy interface

asyncio can complain *very* loudly if you forget to back out of things gracefully before the garbage collector starts destroying objects that contain live references to asyncio Tasks. The usual fix is just to remember to call aqmp.disconnect(), but for the sake of the legacy wrapper and quick, one

[PATCH 00/23] Python: delete qemu.qmp package

GitLab: https://gitlab.com/jsnow/qemu/-/commits/python-qmp-legacy-switch CI: https://gitlab.com/jsnow/qemu/-/pipelines/415801786 NOT intended for 6.2. This series swaps out qemu.qmp for qemu.aqmp permanently, instead of hiding it behind an environment variable toggle. This leaves us with just one

Re: [PATCH] target/ppc: fix Hash64 MMU update of PTE bit R

​​ On 11/24/21 14:40, Daniel Henrique Barboza wrote: > > > On 11/24/21 09:00, Leandro Lupori wrote: >> When updating the R bit of a PTE, the Hash64 MMU was using a wrong byte >> offset, causing the first byte of the adjacent PTE to be corrupted. >> This caused a panic when booting FreeBSD, using t

Re: [PATCH v2 04/11] 9p: darwin: Handle struct dirent differences

On Mittwoch, 24. November 2021 16:45:30 CET Michael Roitzsch wrote: > Hi, > > > Are you sure d_seekoff doesn't work on macOS? > > I just tried on an APFS volume on macOS Monterey and d_seekoff is always 0, > while telldir() outputs useful values. > > Because using telldir() instead > > is not the

Re: [PATCH v3 01/23] multifd: Delete useless operation

* Juan Quintela (quint...@redhat.com) wrote: > We are divining by page_size to multiply again in the only use. ^--- typo > Once there, impreve the comments. ^--- typo > > Signed-off-by: Juan Quintela OK, with the typo's fixed: Reviewed-by: Dr. David Alan Gilbert

Re: [PATCH] target/ppc: fix Hash64 MMU update of PTE bit R

On 11/24/21 15:42, Cédric Le Goater wrote: On 11/24/21 14:40, Daniel Henrique Barboza wrote: On 11/24/21 09:00, Leandro Lupori wrote: When updating the R bit of a PTE, the Hash64 MMU was using a wrong byte offset, causing the first byte of the adjacent PTE to be corrupted. This caused a pa

Re: [PATCH] target/ppc: fix Hash64 MMU update of PTE bit R

On 11/24/21 14:40, Daniel Henrique Barboza wrote: On 11/24/21 09:00, Leandro Lupori wrote: When updating the R bit of a PTE, the Hash64 MMU was using a wrong byte offset, causing the first byte of the adjacent PTE to be corrupted. This caused a panic when booting FreeBSD, using the Hash MMU.

Re: [RFC PATCH v3] hw/nvme:Adding Support for namespace management

On Tue, Nov 23, 2021 at 11:11:37AM +0100, Lukasz Maniak wrote: > On Wed, Nov 10, 2021 at 04:56:29PM +0530, Naveen wrote: > > From: Naveen Nagar > > > > This patch supports namespace management : create and delete operations > > This patch has been tested with the following command and size of ima

[PATCH for-7.0 v8 28/31] linux-user: Add safe syscall handling for loongarch64 hosts

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- linux-user/host/loongarch64/hostdep.h | 14 .../host/loongarch64/safe-syscall.inc.S | 80 +++ 2 files changed, 94 insertions(+) create mode 100644 linux-user/host/loongarch64/hostdep.h create mode

[ANNOUNCE] QEMU 6.2.0-rc2 is now available

Hello, On behalf of the QEMU Team, I'd like to announce the availability of the third release candidate for the QEMU 6.2 release. This release is meant for testing purposes and should not be used in a production environment. http://download.qemu-project.org/qemu-6.2.0-rc2.tar.xz http://downlo

Re: [PATCH v3 02/23] migration: Never call twice qemu_target_page_size()

* Juan Quintela (quint...@redhat.com) wrote: > Signed-off-by: Juan Quintela OK, not much difference Reviewed-by: Dr. David Alan Gilbert > --- > migration/migration.c | 7 --- > migration/multifd.c | 7 --- > migration/savevm.c| 5 +++-- > 3 files changed, 11 insertions(+), 8 del

[PATCH for-7.0 v8 17/31] tcg/loongarch64: Implement add/sub ops

The neg_i{32,64} ops is fully expressible with sub, so omitted for simplicity. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 2 ++ tcg/loongarch64/tcg-target.c.inc | 38

[PATCH for-7.0 v8 29/31] linux-user: Implement CPU-specific signal handler for loongarch64 hosts

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- linux-user/host/loongarch64/host-signal.h | 87 +++ 1 file changed, 87 insertions(+) create mode 100644 linux-user/host/loongarch64/host-signal.h diff --git a/linux-user/host/

[PATCH for-7.0 v8 31/31] tests/docker: Add gentoo-loongarch64-cross image and run cross builds in GitLab

ch64 cross-compiler target +# +# This docker target is used for building loongarch64 tests. As it also +# needs to be able to build QEMU itself in CI we include it's +# build-deps. It is also a "stand-alone" image so as not to be +# triggered by re-builds on other base images giv

[PATCH for-7.0 v8 30/31] configure, meson.build: Mark support for loongarch64 hosts

Example output of `uname -a` on an initial Gentoo LA64 port, running the upstream submission version of Linux (with some very minor patches not influencing output here): > Linux 5.14.0-10342-g37a00851b145 #5 SMP PREEMPT Tue Aug 10 > 12:56:24 PM CST 2021 loongarch64 GNU/Linux And the same on the

[PATCH for-7.0 v8 22/31] tcg/loongarch64: Implement simple load/store ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 131 +++ 2 files changed, 132 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con

[PATCH for-7.0 v8 26/31] tcg/loongarch64: Implement tcg_target_init

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 27 +++ 1 file changed, 27 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 2d066a035d..ff167d686b 100644 --- a/tcg/loonga

[PATCH for-7.0 v8 24/31] tcg/loongarch64: Implement tcg_target_qemu_prologue

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 68 1 file changed, 68 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index c92587c823..a806e3352e 100644 --- a/tcg/l

[PATCH for-7.0 v8 11/31] tcg/loongarch64: Implement sign-/zero-extension ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 82 tcg/loongarch64/tcg-target.h | 24 3 files changed, 95 insertio

[PATCH for-7.0 v8 12/31] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 2 + tcg/loongarch64/tcg-target.c.inc | 88 tcg/loongarch64/tcg-target.h | 16 ++--- 3 files changed, 98 insertions(

[PATCH for-7.0 v8 27/31] tcg/loongarch64: Register the JIT

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 44 1 file changed, 44 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index ff167d686b..8ce30ecae5 100644 --- a/tcg/l

[PATCH for-7.0 v8 18/31] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 65 tcg/loongarch64/tcg-target.h | 16 +++ 3 files changed, 74 insertion

[PATCH for-7.0 v8 08/31] tcg/loongarch64: Implement the memory barrier op

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target.c.inc | 32 1 file changed, 32 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index fbac

[PATCH for-7.0 v8 25/31] tcg/loongarch64: Implement exit_tb/goto_tb

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 19 +++ 1 file changed, 19 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index a806e3352e..2d066a035d 100644 --- a/tcg/loongarch64/tc

[PATCH for-7.0 v8 23/31] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 2 + tcg/loongarch64/tcg-target.c.inc | 353 +++ 2 files changed, 355 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-

[PATCH for-7.0 v8 21/31] tcg/loongarch64: Implement tcg_out_call

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 34 1 file changed, 34 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 682bf76ceb..e470d7e145 100644 --- a/tcg/l

[PATCH for-7.0 v8 19/31] tcg/loongarch64: Implement br/brcond ops

Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 53 2 files changed, 54 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-s

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