Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/s390x/cpu_loop.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/linux-user/s390x/cpu_loop.c b/linux-user/s390x/cpu_loop.
Fix a typo for ESR_EC_DIVZERO, which is integral not floating-point.
Fix the if ladder for decoding floating-point exceptions.
Signed-off-by: Richard Henderson
---
linux-user/microblaze/cpu_loop.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/linux-use
On 8/21/21 1:30 PM, Christian Schoenebeck wrote:
Unfortunately something like
_Static_assert(typeof(a) == typeof(b), "type mismatch");
is currently not suported by C. So for the time being at least
check that the size of the scalar types match at compile time.
Did you try
_Static_assert(__
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/microblaze/cpu_loop.c | 73 +---
1 file changed, 29 insertions(+), 44 deletions(-)
diff --git a/linux-user/microblaze/cpu_loop.c b
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/xtensa/cpu_loop.c | 34 --
1 file changed, 12 insertions(+), 22 deletions(-)
diff --git a/linux-user/xtensa/cpu_loop.c b/linux
This si_code was changed in 75abf64287cab, for linux 4.17.
Signed-off-by: Richard Henderson
---
linux-user/syscall_defs.h | 1 +
linux-user/hppa/cpu_loop.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
index 55ccc6ae03..f9efbffe0c 1
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/mips/cpu_loop.c | 45 --
1 file changed, 14 insertions(+), 31 deletions(-)
diff --git a/linux-user/mips/cpu_loop.c b/linux
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/riscv/cpu_loop.c | 36 +++-
1 file changed, 7 insertions(+), 29 deletions(-)
diff --git a/linux-user/riscv/cpu_loop.c b/linux-
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/sparc/cpu_loop.c | 38 +++--
1 file changed, 7 insertions(+), 31 deletions(-)
diff --git a/linux-user/sparc/cpu_loop.c b/linux
Replace the local gen_signal with the generic functions that
match how the kernel raises signals.
Signed-off-by: Richard Henderson
---
linux-user/i386/cpu_loop.c | 46 +-
1 file changed, 16 insertions(+), 30 deletions(-)
diff --git a/linux-user/i386/cpu_loop.
Reduce the number of ifdefs within cpu_loop().
Signed-off-by: Richard Henderson
---
linux-user/i386/cpu_loop.c | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c
index f813e87294..5866e9844
Rename to do_tr_or_bp, as per the kernel function.
Add a 'trap' argument, akin to the kernel's si_code, but clearer.
The return value is always 0, so change the return value to void.
Use force_sig and force_sig_fault.
Signed-off-by: Richard Henderson
---
linux-user/mips/cpu_loop.c | 47 +
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/sh4/cpu_loop.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c
index
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/hppa/cpu_loop.c | 32 +++-
1 file changed, 7 insertions(+), 25 deletions(-)
diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/h
These si_codes have been properly set by the kernel since the beginning.
Signed-off-by: Richard Henderson
---
linux-user/hppa/cpu_loop.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/hppa/cpu_loop.c
index 3500b2c291..7bc85d
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/cris/cpu_loop.c | 22 ++
1 file changed, 6 insertions(+), 16 deletions(-)
diff --git a/linux-user/cris/cpu_loop.c b/linux-user/cris/cpu_lo
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
The user-only version of ppc_cpu_tlb_fill does not distinguish
between the various hw codes. Drop all of that and just use
the new force_sigsegv_for_addr function. The fault address for
POWERPC_EXCP_ISI is n
Use the new function instead of setting up a target_siginfo_t
and calling queue_signal. Note that we were incorrectly using
QEMU_SI_KILL instead of QEMU_SI_FAULT for raising SIGSEGV.
Signed-off-by: Richard Henderson
---
linux-user/hexagon/cpu_loop.c | 22 --
1 file changed,
These si_codes were changed in 535906c684fca, for linux 4.17.
Signed-off-by: Richard Henderson
---
linux-user/syscall_defs.h | 1 +
linux-user/alpha/cpu_loop.c | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
index a
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/alpha/cpu_loop.c | 76 +++--
1 file changed, 23 insertions(+), 53 deletions(-)
diff --git a/linux-user/alpha/cpu_loop.c b/linu
From: Peter Maydell
Use the new force_sig_fault() function instead of setting up
a target_siginfo_t and calling queue_signal().
Signed-off-by: Peter Maydell
Message-Id: <20210813131809.28655-8-peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson
---
linux-user/aarch64/cpu_loop.c | 34 ++
This si_code was changed in 4cc13e4f6d441, for linux 4.17.
Signed-off-by: Richard Henderson
---
linux-user/alpha/cpu_loop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/alpha/cpu_loop.c b/linux-user/alpha/cpu_loop.c
index b2e9503c50..e5f78a439a 100644
--- a/linu
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/openrisc/cpu_loop.c | 37 +-
1 file changed, 10 insertions(+), 27 deletions(-)
diff --git a/linux-user/openrisc/cpu_loop.c b/l
From: Peter Maydell
Use the new force_sig_fault() function instead of setting up
a target_siginfo_t and calling queue_signal().
Signed-off-by: Peter Maydell
Message-Id: <20210813131809.28655-7-peter.mayd...@linaro.org>
Signed-off-by: Richard Henderson
---
linux-user/arm/cpu_loop.c | 53 ++
From: Peter Maydell
In the Arm target code, when the fpa11 emulation code tells us we
need to send the guest a SIGFPE, we do this with queue_signal(), but
we are using the wrong si_type, and we aren't setting the _sifields
union members corresponding to either the si_type we are using or the
si_t
Most linux-user targets so far do not distinguish between SEGV_MAPERR
and SEGV_ACCERR. This function will be used to fix that.
Signed-off-by: Richard Henderson
---
linux-user/signal-common.h | 1 +
linux-user/signal.c| 18 ++
2 files changed, 19 insertions(+)
diff --gi
Use the new functions instead of setting up a target_siginfo_t
and calling queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/m68k/cpu_loop.c | 35 +++
1 file changed, 7 insertions(+), 28 deletions(-)
diff --git a/linux-user/m68k/cpu_loop.c b/linux-use
From: Peter Maydell
When generating a TRAP_BRKPT SIGTRAP, set the siginfo_t addr field
to the PC where the breakpoint/singlestep trap occurred; this is
what the kernel does for this signal for this architecture.
Signed-off-by: Peter Maydell
Message-Id: <20210813131809.28655-3-peter.mayd...@lina
From: Peter Maydell
The target_siginfo_t we populate in force_sig() will eventually
get copied onto the target's stack. Zero it out so that any extra
padding in the sifields union is consistently zero when the guest
sees it.
Signed-off-by: Peter Maydell
Message-Id: <20210813131809.28655-5-peter
From: Peter Maydell
When generating a TRAP_BRKPT SIGTRAP, set the siginfo_t addr field
to the PC where the breakpoint/singlestep trap occurred; this is
what the kernel does for this signal for this architecture.
Fixes: Coverity 1459154
Signed-off-by: Peter Maydell
Message-Id: <20210813131809.28
Supercedes: 20210813131809.28655-1-peter.mayd...@linaro.org
("linux-user: Clean up siginfo_t handling for arm, aarch64")
Changes from Peter's v1:
* Introduce force_sigsegv_for_addr().
* Convert the rest of the targets, except nios2
(nios2 looks very wrong, and I can't test it).
* Other m
From: Peter Maydell
In many places in the linux-user code we need to queue a signal for
the guest using the QEMU_SI_FAULT si_type. This requires that the
caller sets up and passes us a target_siginfo, including setting the
appropriate part of the _sifields union for the si_type. In a number
of p
On Sun, Aug 22, 2021 at 1:36 AM John Snow wrote:
> On Thu, Aug 19, 2021 at 1:39 PM G S Niteesh Babu
> wrote:
>
>> Added a draft of AQMP TUI.
>>
>> Implements the follwing basic features:
>> 1) Command transmission/reception.
>> 2) Shows events asynchronously.
>> 3) Shows server status in the bot
On Sat, Aug 21, 2021 at 9:39 AM John Snow wrote:
>
>
> On Thu, Aug 19, 2021 at 1:39 PM G S Niteesh Babu
> wrote:
>
>> Hello all,
>>
>> Gitlab:
>> https://gitlab.com/niteesh.gs/qemu/-/commits/aqmp-tui-prototype-v4
>> CI: https://gitlab.com/niteesh.gs/qemu/-/pipelines/356024270
>>
>> Revision sinc
Signed-off-by: Christian Schoenebeck
---
hw/9pfs/9p.c | 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c
index b59572fa79..91062ee4d6 100644
--- a/hw/9pfs/9p.c
+++ b/hw/9pfs/9p.c
@@ -1707,13 +1707,14 @@ static void coroutine_fn v9fs_
Signed-off-by: Christian Schoenebeck
---
fsdev/file-op-9p.h | 2 ++
hw/9pfs/9p.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/fsdev/file-op-9p.h b/fsdev/file-op-9p.h
index 42f677cf38..7630f0e538 100644
--- a/fsdev/file-op-9p.h
+++ b/fsdev/file-op-9p.h
@@ -18,6 +18,7 @@
#include
Signed-off-by: Christian Schoenebeck
---
fsdev/9p-marshal.c | 2 ++
fsdev/9p-marshal.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/fsdev/9p-marshal.c b/fsdev/9p-marshal.c
index a01bba6908..fbfc2a62cd 100644
--- a/fsdev/9p-marshal.c
+++ b/fsdev/9p-marshal.c
@@ -18,6 +18,8 @@
#includ
Unfortunately something like
_Static_assert(typeof(a) == typeof(b), "type mismatch");
is currently not suported by C. So for the time being at least
check that the size of the scalar types match at compile time.
Signed-off-by: Christian Schoenebeck
---
include/qemu/qarray.h | 6 ++
1 fil
Patches 1 and 2 introduce include/qemu/qarray.h which implements a deep auto
free mechanism for arrays. Unlike GArray it does not require special macros,
function calls or member dereferencing to access the individual array
elements. So existing C-style array code can be retained with only very
lit
Implements deep auto free of arrays while retaining common C-style
squared bracket access.
Signed-off-by: Christian Schoenebeck
---
include/qemu/qarray.h | 148 ++
1 file changed, 148 insertions(+)
create mode 100644 include/qemu/qarray.h
diff --git a/in
On 8/21/21 9:59 PM, Richard Henderson wrote:
> Misaligned thumb PC is architecturally impossible.
> Assert is better than proceeding, in case we've missed
> something somewhere.
>
> Expand a comment about aligning the pc in gdbstub.
> Fail an incoming migrate if a thumb pc is misaligned.
>
> Sign
Signed-off-by: Richard Henderson
---
tests/tcg/aarch64/pcalign-a64.c | 37 +
tests/tcg/arm/pcalign-a32.c | 46 +++
tests/tcg/aarch64/Makefile.target | 4 +--
tests/tcg/arm/Makefile.target | 4 +++
4 files changed, 89 insertions(+),
On Thu, Aug 19, 2021 at 1:39 PM G S Niteesh Babu
wrote:
> Added a draft of AQMP TUI.
>
> Implements the follwing basic features:
> 1) Command transmission/reception.
> 2) Shows events asynchronously.
> 3) Shows server status in the bottom status bar.
>
> Also added type annotations and necessary
Misaligned thumb PC is architecturally impossible.
Assert is better than proceeding, in case we've missed
something somewhere.
Expand a comment about aligning the pc in gdbstub.
Fail an incoming migrate if a thumb pc is misaligned.
Signed-off-by: Richard Henderson
---
target/arm/gdbstub.c | 9
Both single-step and pc alignment faults have priority over
breakpoint exceptions.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/debug_helper.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/target/arm/debug_helper.c b/target/arm/debug_
For A64, any input to an indirect branch can cause this.
For A32, many indirect branch paths force the branch to be aligned,
but BXWritePC does not. This includes the BX instruction but also
other interworking changes to PC. Prior to v8, this case is UNDEFINED.
With v8, this is CONSTRAINED UNPRE
Pull the fault information from where we placed it, in
arm_cpu_tlb_fill and arm_cpu_do_unaligned_access.
Signed-off-by: Richard Henderson
---
Pulled out from the larger unaligned data patch set.
For short-form FSC, pc misalignment is reported in the same way.
---
linux-user/arm/cpu_loop.c | 39 +
It is confusing to have different exits from translation
for various conditions in separate functions.
Merge disas_a64_insn into its only caller. Standardize
on the "s" name for the DisasContext, as the code from
disas_a64_insn had more instances.
Reviewed-by: Peter Maydell
Signed-off-by: Richa
This will shortly be raised for execution with a misaligned pc.
Signed-off-by: Richard Henderson
---
linux-user/aarch64/cpu_loop.c | 44 +--
1 file changed, 27 insertions(+), 17 deletions(-)
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop
From: Peter Maydell
In v8A, the PSTATE.IL bit is set for various kinds of illegal
exception return or mode-change attempts. We already set PSTATE.IL
(or its AArch32 equivalent CPSR.IL) in all those cases, but we
weren't implementing the part of the behaviour where attempting to
execute an instru
Raise pc alignment faults.
Fix single-step and pc-align priority over breakpoints.
Not yet fixing insn abort priority over breakpoints.
Based-on: 20210813131809.28655-1-peter.mayd...@linaro.org
("linux-user: Clean up siginfo_t handling for arm, aarch64")
Changes for v2:
* Handle the exceptions
On Thu, Aug 19, 2021 at 1:39 PM G S Niteesh Babu
wrote:
> Added dependencies for the upcoming AQMP TUI under the optional
> 'tui' group.
>
> The same dependencies have also been added under the devel group
> since no work around has been found for optional groups to imply
> other optional groups.
On Sat, 21 Aug 2021 at 19:59, Richard Henderson
wrote:
>
> > +static inline uint32_t syn_illegalstate(void)
> > +{
> > +return EC_ILLEGALSTATE << ARM_EL_EC_SHIFT;
> > +}
>
> I just noticed this should have the IL bit set.
Yep. (I remembered about that for the BXJ trap in the other patch,
but
A few new annoyances. Of note is the new warning for an unspecified
encoding when opening a text file, which actually does indicate a
potentially real problem; see
https://www.python.org/dev/peps/pep-0597/#motivation
I was under the impression that open would try to figure out the
encoding of a fi
The 'check-python-tox' CI test will probably start showing warnings
without this. This can go into the next release, just ignore the CI
warning until the tree opens.
John Snow (1):
python: Update for pylint 2.10
python/qemu/machine/machine.py | 6 --
python/setup.cfg | 1 +
2
> +static inline uint32_t syn_illegalstate(void)
> +{
> +return EC_ILLEGALSTATE << ARM_EL_EC_SHIFT;
> +}
I just noticed this should have the IL bit set.
r~
On Sat, 21 Aug 2021 at 16:45, Bin Meng wrote:
>
> As of today, when booting upstream U-Boot for Xilinx Zynq, the UART
> does not receive anything. Initial debugging shows that the UART clock
> frequency is 0 somehow which prevents the UART from receiving anything.
> Note the U-Boot can still outpu
On 8/18/21 11:55 PM, Philippe Mathieu-Daudé wrote:
> MIPS CPU store its endianess in the CP0 Config0 register.
> Use that runtime information instead of #ifdef'ry checking
> TARGET_WORDS_BIGENDIAN by introducing the cpu_is_bigendian()
> helper.
>
> Philippe Mathieu-Daudé (5):
> target/mips: Call
On 8/17/21 4:52 PM, Richard Henderson wrote:
> On 8/16/21 10:50 AM, Philippe Mathieu-Daudé wrote:
>> Trivial patches:
>> - Remove unused macros
>> - Use tcg_constant_i32()
>> - Inline the macros when few uses
>> - Move macro definitions in translate.h
>>
>> Philippe Mathieu-Daudé (8):
>> target/
On Thu, 19 Aug 2021 09:27:17 +0800
Tao Xu wrote:
> When COLO use only one vnet_hdr_support parameter between
> COLO network filter(filter-mirror, filter-redirector or
> filter-rewriter and colo-compare, packet will not be parsed
> correctly. Acquire network driver related to COLO, if it is
> nirt
As of today, when booting upstream U-Boot for Xilinx Zynq, the UART
does not receive anything. Initial debugging shows that the UART clock
frequency is 0 somehow which prevents the UART from receiving anything.
Note the U-Boot can still output data to the UART tx fifo, which should
not happen, as t
Bsel property of the pci bus indicates whether the bus supports acpi hotplug.
We need to validate the presence of this property before performing any hotplug
related callback operations. Currently validation of the existence of this
property was absent from acpi_pcihp_device_unplug_cb() function bu
This is an automated cleanup. This bug report has been moved to QEMU's
new bug tracker on gitlab.com and thus gets marked as 'expired' now.
Please continue with the discussion here:
https://gitlab.com/qemu-project/qemu/-/issues/552
** Changed in: qemu
Status: Incomplete => Expired
** Bu
On 8/21/21 12:01 PM, Bin Meng wrote:
> On Fri, Aug 20, 2021 at 11:52 PM Philippe Mathieu-Daudé
> wrote:
>>
>> When Linux refuses to overcommit a seriously wild allocation we get:
>>
>> $ qemu-system-i386 -m 4000
>> qemu-system-i386: cannot set up guest memory 'pc.ram': Cannot allocate
>>
On Sat, 21 Aug 2021 at 10:48, Florian Hauschild
wrote:
>
> This extension covers functions:
> * to read and write guest memory
> * to read and write guest registers
> * to flush tb cache
> * to control single stepping of qemu from plugin
>
> These changes allow the user to
> * collect mo
On 8/21/21 11:45 AM, Florian Hauschild wrote:
Hi all,
I extended the plugin interface with additional functionalities.
I wrote the extensions for fault injection/exploration reasearch using
QEMU. The additional functionalities for a plugin are:
* Read and write guest memory
* Read and writ
On Sat, 21 Aug 2021 at 11:03, Bin Meng wrote:
> Does g_autofree work with every compiler we support?
Yes. We use it extensively:
$ git grep g_autofree |wc -l
329
> Looks it only applies to GCC and clang?
> https://www.gitmemory.com/issue/linuxwacom/libwacom/142/518787578
Those are the only
On Fri, 20 Aug 2021 at 19:47, Richard Henderson
wrote:
>
> On 8/20/21 2:03 AM, Peter Maydell wrote:
> >> -} else if (datalo != addend) {
> >> +} else if (scratch_addend) {
> >> tcg_out_ld32_rwb(s, COND_AL, datalo, addend, addrlo);
> >> tcg_out_ld32_12(s,
On Fri, Aug 20, 2021 at 11:52 PM Philippe Mathieu-Daudé
wrote:
>
> When Linux refuses to overcommit a seriously wild allocation we get:
>
> $ qemu-system-i386 -m 4000
> qemu-system-i386: cannot set up guest memory 'pc.ram': Cannot allocate
> memory
>
> Slighly improve the error message, d
This extension covers functions:
* to read and write guest memory
* to read and write guest registers
* to flush tb cache
* to control single stepping of qemu from plugin
These changes allow the user to
* collect more information about the behaviour of the system
* change the guest sta
Hi all,
I extended the plugin interface with additional functionalities.
I wrote the extensions for fault injection/exploration reasearch using
QEMU. The additional functionalities for a plugin are:
* Read and write guest memory
* Read and write guest registers
* Allow plugin to force QEMU i
Hi, steve
It seems the VM will stuck after cpr-load on AArch64 environment？
My AArch64 environment and test steps:
1. linux kernel: 5.14-rc6
2. QEMU version: v6.1.0-rc2 (patch your patchset), and configure with
`../configure --target-list=aarch64-softmmu --disable-werror --enable-kvm` 4.
Steps
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