On 31/07/2021 00.04, Cleber Rosa wrote:
On Fri, Jul 30, 2021 at 11:43 AM Peter Maydell wrote:
On Fri, 30 Jul 2021 at 16:12, Peter Maydell wrote:
"make check-acceptance" takes way way too long. I just did a run
on an arm-and-aarch64-targets-only debug build and it took over
half an hour, and
Coverity seems to have issues figuring out the properties of g_malloc0
and other non *_n functions. While this was "fixed" by removing the
custom second argument to __coverity_mark_as_afm_allocated__, inline
the code from the array-based allocation functions to avoid future
issues.
Signed-off-by:
sz is only used in one place, so replace it with nmemb * size in
that one place.
Signed-off-by: Paolo Bonzini
---
scripts/coverity-scan/model.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/scripts/coverity-scan/model.c b/scripts/coverity-scan/model.c
index 1
g_malloc/g_malloc0/g_realloc only return NULL if the size is 0; we do not need
to cover that in the model, and so far have expected __coverity_alloc__
to model a non-NULL return value. But that apparently does not work
anymore, so add some extra conditionals that invoke __coverity_panic__
for NULL
Use void * for consistency with the actual function; provide a model
for MemoryRegionCache functions and for address_space_rw. These
let Coverity understand the bounds of the data that various functions
read and write even at very high levels of inlining (e.g. pci_dma_read).
Signed-off-by: Paolo
Recently, Coverity has started complaining about using g_free() to free
memory areas allocated by GLib functions not included in model.c,
such as g_strfreev. This unfortunately goes against the GLib
documentation, which suggests that g_malloc() should be matched
with g_free() and plain malloc() wi
These models are not needed anymore now that Coverity does not check
anymore that the result is used with "g_free". Coverity understands
GCC attributes and uses them to detect leaks.
Signed-off-by: Paolo Bonzini
---
scripts/coverity-scan/model.c | 105 +-
1 file
Recently, an update to the Coverity tools caused it to introduce hundreds
of new complaints about using g_free() to free memory areas allocated
by GLib functions. The solution adopted here (patch 2) is to just
make g_free a synonym of free, removing the custom g_free marker from
__coverity_mark_as
On 2021/7/30 20:52, Steven Sistare wrote:
> On 7/28/2021 12:56 AM, Zheng Chuan wrote:
>> On 2021/7/20 2:38, Steven Sistare wrote:
>>> On 7/19/2021 2:10 PM, Alex Williamson wrote:
On Mon, 19 Jul 2021 13:44:08 -0400
Steven Sistare wrote:
> On 7/16/2021 4:51 PM, Alex Williamson
Can confirm this bug on fresh Linux Arch and Debian Linux installation.
I need just nothing to reproduce it: Just install fresh arch and do steps
described in comment #1
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.la
On Thu, Jul 29, 2021 at 12:07 PM BALATON Zoltan wrote:
> Hello,
>
> On Thu, 29 Jul 2021, Howard Spoelstra wrote:
> > Hi,
> >
> > Qemu-system-ppc built from current master can no longer run Fedora 12 ppc
> > as guest. (This the only ppc distro I tested.) Host is Fedora 34. Please
> > see screen sh
The SMMU should access fault if AF == 0 in a TTD, and if AFFD == 0 in the CD.
Per the spec, an access fault has a higher priority over a permission fault.
For instance, a write to a writable clean (temporarily non-writable) page with
AF == 0 && AFFD == 0 will cause an access fault.
If AF == 1 in t
Hi all,
This adds a check in SMMU PTW to see if the access flag bit is set in a PTE, and
if we should fault accordingly or not.
Since we do not support HTTU, the check itself is pretty simple:
If AFFD == 0 in the context descriptor and AF == 0 in the PTE, we fault.
Otherwise, we do not have an ac
JR opcode (Jump Register) only takes 1 argument, $rs.
JALR (Jump And Link Register) takes 3: $rs, $rd and $hint.
Commit 6af0bf9c7c3 added their processing into decode_opc() as:
case 0x08 ... 0x09: /* Jumps */
gen_compute_branch(ctx, op1 | EXT_SPECIAL, rs, rd, sa);
having both opcodes
On Fri, Jul 30, 2021 at 11:43 AM Peter Maydell wrote:
>
> On Fri, 30 Jul 2021 at 16:12, Peter Maydell wrote:
> >
> > "make check-acceptance" takes way way too long. I just did a run
> > on an arm-and-aarch64-targets-only debug build and it took over
> > half an hour, and this despite it skipping
On 7/29/21 1:15 AM, Peter Maydell wrote:
We now have a complete MVE emulation, so we can enable it in our
Cortex-M55 model by setting the ID registers to match those of a
Cortex-M55 with full MVE support.
Signed-off-by: Peter Maydell
---
docs/system/arm/emulation.rst | 1 +
target/arm/cpu_tcg
On 7/29/21 1:15 AM, Peter Maydell wrote:
Implement the MVE VRINT insns, which round floating point inputs
to integer values, leaving them in floating point format.
Signed-off-by: Peter Maydell
---
target/arm/helper-mve.h| 6 +
target/arm/mve.decode | 7 ++
target/arm/mve_h
On 7/29/21 8:52 AM, Peter Maydell wrote:
> On Thu, 29 Jul 2021 at 02:01, Richard Henderson
> wrote:
>>
>> Cc: Yoshinori Sato
>> Signed-off-by: Richard Henderson
>> ---
>> linux-user/sh4/cpu_loop.c | 8
>> target/sh4/cpu.c | 2 +-
>> target/sh4/op_helper.c| 3 ---
>> 3 f
On 7/29/21 1:15 AM, Peter Maydell wrote:
+/*
+ * VCVT between halfprec and singleprec. As usual for halfprec
+ * conversions, FZ16 is ignored and AHP is observed.
+ */
+#define DO_VCVT_SH(OP, TOP) \
+void HELPER(glue(mve_, OP))(CPUARMState *env, voi
On 7/29/21 1:15 AM, Peter Maydell wrote:
Implement the MVE VCVT which converts from floating-point to integer
using a rounding mode specified by the instruction. We implement
this similarly to the Neon equivalents, by passing the required
rounding mode as an extra integer parameter to the helper
On 7/29/21 1:15 AM, Peter Maydell wrote:
Implement the MVE VCVT insns which convert between floating and fixed
point. As with the Neon equivalents, these use essentially the same
constant encoding as right-shift-by-immediate.
Signed-off-by: Peter Maydell
---
target/arm/helper-mve.h| 9 ++
On 7/29/21 1:15 AM, Peter Maydell wrote:
Implement the MVE "VCVT (between floating-point and integer)" insn.
Signed-off-by: Peter Maydell
---
target/arm/mve.decode | 7 +++
target/arm/translate-mve.c | 32
2 files changed, 39 insertions(+)
Reviewe
On 7/29/21 1:15 AM, Peter Maydell wrote:
Implement the MVE fp vector comparisons VCMP and VPT.
Signed-off-by: Peter Maydell
---
target/arm/helper-mve.h| 18 +++
target/arm/mve.decode | 39 +++
target/arm/mve_helper.c| 64 ++
This commit adds a feature that enables use to copy
messages from the TUI after highlighting the message
in the history box using up/down arrow keys and pressing
alt-c.
Signed-off-by: G S Niteesh Babu
---
python/qemu/aqmp/aqmp_tui.py | 9 +
1 file changed, 9 insertions(+)
diff --git a/p
This dependency is required to enable copying from the TUI
using special keys to the system clipboard.
pyperclip works out of the box on windows and macos but requires
xsel/xclip to be installed on linux machines.
Signed-off-by: G S Niteesh Babu
---
python/Pipfile.lock | 22
Added pygments as optional dependency for AQMP TUI.
This is required for the upcoming syntax highlighting feature
in AQMP TUI.
The dependency has also been added in the devel optional group.
Added mypy 'ignore_missing_imports' for pygments since it does
not have any type stubs.
Signed-off-by: G S
Add syntax highlighting for the incoming and outgoing QMP messages.
This is achieved using the pygments module which was added in a
previous commit.
The current implementation is a really simple one which doesn't
allow for any configuration. In future this has to be improved
to allow for easier th
Adds ability to highlight messages in the history box. The messages
can be selected using up/down arrow keys.
This can be enhanced in the future to apply specific settings to
a particular message.
Signed-off-by: G S Niteesh Babu
---
python/qemu/aqmp/aqmp_tui.py | 50 +
On 7/29/21 1:15 AM, Peter Maydell wrote:
Implement the MVE fp scalar comparisons VCMP and VPT.
Signed-off-by: Peter Maydell
---
target/arm/helper-mve.h| 18 +++
target/arm/mve.decode | 61 +
target/arm/mve_helper.c| 62
Add an entry point for aqmp-tui. This will allow it to be run from
the command line using "aqmp-tui localhost:1234"
More options available in the TUI can be found using "aqmp-tui -h"
Signed-off-by: G S Niteesh Babu
---
python/setup.cfg | 1 +
1 file changed, 1 insertion(+)
diff --git a/python/s
Added dependencies for the upcoming AQMP TUI under the optional
'tui' group.
The same dependencies have also been added under the devel group
since no work around has been found for optional groups to imply
other optional groups.
Signed-off-by: G S Niteesh Babu
---
python/Pipfile.lock | 12
Adds scroll support to history box. The list can now be scrolled
using arrow keys, page up/down and the mouse.
The current implementation requires the widget to be in focus
to enable scrolling. Therefore the user has to click on the widget
before scrolling.
Signed-off-by: G S Niteesh Babu
---
p
Added a draft of AQMP TUI.
Implements the follwing basic features:
1) Command transmission/reception.
2) Shows events asynchronously.
3) Shows server status in the bottom status bar.
Also added necessary pylint, mypy configurations
Signed-off-by: G S Niteesh Babu
---
python/qemu/aqmp/aqmp_tui.
Instead of manually connecting and disconnecting from the
server. We now rely on the runstate to manage the QMP
connection.
Along with this the ability to reconnect on certain exceptions
has also been added.
Signed-off-by: G S Niteesh Babu
---
python/qemu/aqmp/aqmp_tui.py | 109
Disable missing-docstring and fixme pylint warnings.
This is because since the AQMP is just a prototype
it is currently not documented properly and lot
of todo and fixme's are still in place.
Signed-off-by: G S Niteesh Babu
---
python/setup.cfg | 2 ++
1 file changed, 2 insertions(+)
diff --git
This patch adds type annotations for aqmp-tui using
the mypy library.
Signed-off-by: G S Niteesh Babu
---
python/qemu/aqmp/aqmp_tui.py | 79
python/setup.cfg | 3 --
2 files changed, 43 insertions(+), 39 deletions(-)
diff --git a/python/qemu/aqm
Before this patch the wait_closed work-around for python 3.6
fails during disconnect.
This is a temproray work around for which might be fixed in the
future or will be completely removed when the minimum python
version is raised to 3.7.
This patch was originally written by John Snow
Signed-off-b
Hello all,
Gitlab: https://gitlab.com/niteesh.gs/qemu/-/commits/aqmp-tui-prototype-v3
CI: https://gitlab.com/niteesh.gs/qemu/-/pipelines/345738265
Major revision since V2:
1) Refined QMP connection manager.
2) Added static typing.
3) Allow highlighting specific messages in history box.
4) Allow c
On 7/29/21 1:15 AM, Peter Maydell wrote:
{
+ VMAXNMAV 1110 1110 1110 11 00 0 0 . 0 ... 0 @vmaxnmv size=2
+ VMINNMAV 1110 1110 1110 11 00 1 0 . 0 ... 0 @vmaxnmv size=2
+ VMAXNMV1110 1110 1110 11 10 0 0 . 0 ... 0 @vmaxnmv size=2
+ VMI
On 7/29/21 1:15 AM, Peter Maydell wrote:
In commit a777d6033447a we added an assertion to parts_silence_nan() that
prohibits calling float*_silence_nan() when in default-NaN mode.
This ties together a property of the output ("do we generate a default
NaN when the result is a NaN?") with an operat
On 7/29/21 1:15 AM, Peter Maydell wrote:
Implement the MVE fp-with-scalar VFMA and VFMAS insns.
Signed-off-by: Peter Maydell
---
target/arm/helper-mve.h| 6 ++
target/arm/mve.decode | 14 +++---
target/arm/mve_helper.c| 37 +
tar
On 7/29/21 1:15 AM, Peter Maydell wrote:
Implement the MVE scalar floating point insns VADD, VSUB and VMUL.
Signed-off-by: Peter Maydell
---
target/arm/helper-mve.h| 9 +
target/arm/mve.decode | 27 +--
target/arm/mve_helper.c| 34 +++
On 7/29/21 1:15 AM, Peter Maydell wrote:
Implement the MVE VMAXNMA and VMINNMA insns; these are 2-operand, but
the destination register must be the same as one of the source
registers.
We defer the decode of the size in bit 28 to the individual insn
patterns rather than doing it in the format, b
On 7/29/21 1:14 AM, Peter Maydell wrote:
+#define DO_VCMULH(N, M, D, S) float16_mul(N, M, S)
+#define DO_VCMULS(N, M, D, S) float32_mul(N, M, S)
+
+#define DO_VCMLAH(N, M, D, S) float16_muladd(N, M, D, 0, S)
+#define DO_VCMLAS(N, M, D, S) float32_muladd(N, M, D, 0, S)
+
+DO_VCMLA(vcmul0h, 2, uint
On 7/29/21 1:14 AM, Peter Maydell wrote:
+r = FN(n[H##ESIZE(e)], m[H##ESIZE(e)], d[H##ESIZE(e)], \
+ 0, fpst);\
+mergemask(&d[H##ESIZE(e)], r, mask);\
+}
On 7/29/21 1:14 AM, Peter Maydell wrote:
+DO_2OP_FP(vfaddh, 2, uint16_t, float16_add)
+DO_2OP_FP(vfadds, 4, uint32_t, float32_add)
Use float16 and float32 types here?
It'll be more interesting with some of the other macros later...
r~
> -Original Message-
> From: Qemu-devel bounces+tsimpson=quicinc@nongnu.org> On Behalf Of Peter Maydell
> Sent: Friday, July 30, 2021 5:00 AM
> To: qemu-devel@nongnu.org
> Cc: Paolo Bonzini ; Markus Armbruster
> ; Eduardo Habkost
> Subject: [PATCH for-6.2 5/8] arch_init.h: Add QEMU
On 7/29/21 1:14 AM, Peter Maydell wrote:
Implement the MVE VFMA and VFMS insns.
Signed-off-by: Peter Maydell
---
target/arm/helper-mve.h| 6 ++
target/arm/mve.decode | 3 +++
target/arm/mve_helper.c| 36
target/arm/translate-mve.c | 2
On 7/29/21 1:14 AM, Peter Maydell wrote:
Implement the MVE VCADD insn. Note that here the size bit is the
opposite sense to the other 2-operand fp insns.
We don't check for the sz == 1 && Qd == Qm UNPREDICTABLE case,
because that would mean we can't use the DO_2OP_FP macro in
translate-mve.c.
On 7/29/21 1:14 AM, Peter Maydell wrote:
Implement more simple 2-operand floating point MVE insns.
Signed-off-by: Peter Maydell
---
target/arm/helper-mve.h| 15 +++
target/arm/mve.decode | 6 ++
target/arm/mve_helper.c| 24
target/arm/t
On 7/29/21 1:14 AM, Peter Maydell wrote:
Implement the MVE VADD (floating-point) insn. Handling of this is
similar to the 2-operand integer insns, except that we must take care
to only update the floating point exception status if the least
significant bit of the predicate mask for each element
On 7/29/21 1:14 AM, Peter Maydell wrote:
Implement the MVE VMLA insn, which multiplies a vector by a scalar
and accumulates into another vector.
Signed-off-by: Peter Maydell
---
Changes v1->v2: don't decode U bit
---
target/arm/helper-mve.h| 4
target/arm/mve.decode | 1 +
targ
On 7/29/21 1:14 AM, Peter Maydell wrote:
Implement the MVE integer min/max across vector insns
VMAXV, VMINV, VMAXAV and VMINAV, which find the maximum
from the vector elements and a general purpose register,
and store the maximum back into the general purpose
register.
These insns overlap with V
On 7/29/21 1:14 AM, Peter Maydell wrote:
We were not paying attention to the ECI state when advancing the VPT
state. Architecturally, VPT state advance happens for every beat
(see the pseudocode VPTAdvance()), so on every beat the 4 bits of
VPR.P0 corresponding to the current beat are inverted i
On 7/29/21 1:14 AM, Peter Maydell wrote:
We got an edge case wrong in the 48-bit SQRSHRL implementation: if
the shift is to the right, although it always makes the result
smaller than the input value it might not be within the 48-bit range
the result is supposed to be if the input had some bits i
On 7/29/21 1:14 AM, Peter Maydell wrote:
In the MVE shift-and-insert insns, we special case VSLI by 0
and VSRI by . VSRI by means "don't update the destination",
which is what we've implemented. However VSLI by 0 is "set
destination to the input", so we don't want to use the same
special-casing
On 7/30/21 12:59 AM, Peter Maydell wrote:
Instead of using an ifdef ladder in arch_init.c (which we then have
to manually update every time we add or remove a target
architecture), have meson.build put "#define QEMU_ARCH QEMU_ARCH_FOO"
in the config-target.h file.
Signed-off-by: Peter Maydell
--
On 7/30/21 12:59 AM, Peter Maydell wrote:
The QEMU_ARCH_VIRTIO_* defines are used only in one file,
qdev-monitor.c. Move them to that file.
Signed-off-by: Peter Maydell
---
include/sysemu/arch_init.h | 9 -
softmmu/qdev-monitor.c | 9 +
2 files changed, 9 insertions(+), 9
On 7/30/21 12:59 AM, Peter Maydell wrote:
We added a stub for the arch_type global in commit 5964ed56d9a1 so
that we could compile blockdev.c into the tools. However, in commit
9db1d3a2be9bf we removed the only use of arch_type from blockdev.c.
The stub is therefore no longer needed, and we can
On 7/30/21 12:59 AM, Peter Maydell wrote:
arch_init.c does very little but has a long list of #include lines.
Remove all the unnecessary ones.
Signed-off-by: Peter Maydell
---
softmmu/arch_init.c | 7 ---
1 file changed, 7 deletions(-)
Reviewed-by: Richard Henderson
r~
On 7/30/21 12:59 AM, Peter Maydell wrote:
When Hexagon was added we forgot to add it to the QEMU_ARCH_*
enumeration. This doesn't cause a visible effect because at the
moment Hexagon is linux-user only and the QEMU_ARCH_* constants are
only used in softmmu, but we might as well add it in, since
On 7/30/21 12:59 AM, Peter Maydell wrote:
arch_init.h only defines the QEMU_ARCH_* enumeration and the
arch_type global. Don't include it in files that don't use those.
Signed-off-by: Peter Maydell
---
Reviewed-by: Richard Henderson
r~
On 7/30/21 12:59 AM, Peter Maydell wrote:
The kvm_available() function reports whether KVM support was
compiled into the QEMU binary; it returns the value of the
CONFIG_KVM define.
The only place in the codebase where we use this function is
in qmp_query_kvm(). Now that accelerators are based on
On 7/30/21 12:59 AM, Peter Maydell wrote:
The xen_available() function is used only to produce an error
for some Xen-specific command line options in QEMU binaries where
Xen support was not compiled in: it just returns the value of
the CONFIG_XEN define.
Now that accelerators are QOM classes, we
From: Philippe Mathieu-Daudé
Raised exceptions don't return, so mark the helper with noreturn.
Fixes: 032c76bc6f9 ("nios2: Add architecture emulation support")
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20210729101315.2318714-1-f4...@amsat.org>
Signed-off
This crept in as either a cut-and-paste error, or rebase error.
Fixes: cfec388518d ("atomic_template: add inline trace/plugin helpers")
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20210729004647.282017-24-richard.hender...@linaro.org>
Signed-off-by: Richard Henderson
---
accel/tcg/atomic_t
s/pull-tcg-20210730
for you to fetch changes up to 236f6709ae0da224314c3344c339ed0dc07c15cf:
target/nios2: Mark raise_exception() as noreturn (2021-07-30 08:23:12 -1000)
Fix double bswap in 16-byte atomic store
Mark nios2 raise
Hello,
I think I need a concurrent radix tree that is written to work with atomic
updates. I would like to ask if anyone knows of one within qemu? Or at
least to efficiently obtain the page address/mmu index corresponding for a
given address.
Is there any documentation on cpu_mmu_index? Each tar
On 7/30/21 7:55 PM, Ani Sinha wrote:
> I have developed an interest in this space and hopefully can lend some
> helping hand to Igor and Michael in reviewing simpler patches.
Help is welcome IMHO, so:
Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Ani Sinha
> ---
> MAINTAINERS | 1 +
> 1
On Fri Jul 30, 2021 at 1:02 PM CDT, Dov Murik wrote:
>
>
> > Awesome! Unfortunately, it's looking like we'll have to wait[1] for QEMU to
> > thaw before this series goes in.
> >
>
> Thanks for explaining this. Do I need to do anything after 6.1 is
> released? Ping? Rebase and re-send?
Rebase and
On Fri, 30 Jul 2021 at 19:05, Christopher Caulfield
wrote:
> This is Christopher from the debugging experiences team at Microsoft focused
> on kernel debugging. I am reaching out with a few questions about QEMU on x64.
>
> Is it possible for the QEMU-x86-64 GDB Server to send the full set of x64
Hi QEMU community,
This is Christopher from the debugging experiences team at Microsoft
focused on kernel debugging. I am reaching out with a few questions about
QEMU on x64.
1. Is it possible for the QEMU-x86-64 GDB Server to send the full set of
x64 system registers (whether they are inc
On 30/07/2021 17:47, Connor Kuehl wrote:
> On Thu Jul 29, 2021 at 2:31 PM CDT, Dov Murik wrote:
>> The OVMF companion series has been reviewed by the new OVMF maintainer
>> and merged to edk2 master branch as of edk2 commit 514b3aa08ece [1].
>>
>> [1] https://github.com/tianocore/edk2/commit/514
I have developed an interest in this space and hopefully can lend some
helping hand to Igor and Michael in reviewing simpler patches.
Signed-off-by: Ani Sinha
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4256ad1adb..1c90ea4e6b 100644
--- a/M
On 7/30/21 7:13 PM, Cédric Le Goater wrote:
> On 7/29/21 8:05 PM, Richard Henderson wrote:
>> On 7/29/21 3:44 AM, Peter Maydell wrote:
>>> On Thu, 29 Jul 2021 at 01:51, Richard Henderson
>>> wrote:
We ought to have been recording the virtual address for reporting
to the guest trap h
On 7/29/21 8:05 PM, Richard Henderson wrote:
> On 7/29/21 3:44 AM, Peter Maydell wrote:
>> On Thu, 29 Jul 2021 at 01:51, Richard Henderson
>> wrote:
>>>
>>> We ought to have been recording the virtual address for reporting
>>> to the guest trap handler.
>>>
>>> Cc: qemu-...@nongnu.org
>>> Signed-o
These patches can really help improve keyboard usage with a guest.
Based on patches by Gustavo Noronha Silva .
John Arbuckle (2):
Add full keyboard grab support
Add ability to swap command/meta and options keys
ui/cocoa.m | 178 ++---
1 file c
There are keyboard shortcuts that are vital for use in a guest that runs Mac OS.
These shortcuts are reserved for Mac OS use only which makes having the guest
see them impossible on a Mac OS host - until now. This patch will enable the
user to decide if the guest should see all keyboard shortcuts u
For users who are use to using a Macintosh keyboard having to use a PC keyboard
can be a pain because the Command/meta and Option/Alt keys are switched. To
make life easier this option is added to allow the user to switch how the guest
reacts to each of these keys being pushed. It can make a Macint
On 7/29/21 2:46 AM, Richard Henderson wrote:
> We ought to have been recording the virtual address for reporting
> to the guest trap handler.
>
> Cc: qemu-...@nongnu.org
> Signed-off-by: Richard Henderson
Reviewed-by: Cédric Le Goater
> ---
> target/ppc/excp_helper.c | 2 ++
> 1 file changed
Hello,
On 7/30/21 3:25 PM, Philippe Mathieu-Daudé wrote:
> Cc'ing qemu-ppc@
>
> On 7/30/21 6:25 AM, Lindsay Ryan wrote:
>> Hi
>> I'm trying to emulate some physical IBM Power 9's that we have. There
>> seems to be plenty of examples of using x86_64 qemu, but slightly less
>> for Power.
For bare
On Fri, 30 Jul 2021 at 17:19, Nikita Gnilozub-Volobuev
wrote:
> I'm a student and I'm writing my term paper. Part of it is the record
> the trace of x86 ELF on x86_64 Linux. For record I use PANDA.
Hi; PANDA is based on a fork of an older version of QEMU, with
considerable alterations. You are pr
Hello there.
I'm a student and I'm writing my term paper. Part of it is the record
the trace of x86 ELF on x86_64 Linux. For record I use PANDA. And I
stacked with very strange problem: there is no system calls in my trace.
When I see this I was very surprised and make simple grabber of
transl
On Fri, 30 Jul 2021 at 16:12, Peter Maydell wrote:
>
> "make check-acceptance" takes way way too long. I just did a run
> on an arm-and-aarch64-targets-only debug build and it took over
> half an hour, and this despite it skipping or cancelling 26 out
> of 58 tests!
>
> I think that ~10 minutes ru
On 7/30/21 5:12 PM, Peter Maydell wrote:
> "make check-acceptance" takes way way too long. I just did a run
> on an arm-and-aarch64-targets-only debug build and it took over
> half an hour, and this despite it skipping or cancelling 26 out
> of 58 tests!
>
> I think that ~10 minutes runtime is rea
I agree, making these manual tasks until we find a fix for this is the
only solution I can think of too.
Daniele
On 7/28/2021 3:51 AM, Thomas Huth wrote:
These two jobs are currently failing very often - the linker seems to
get killed due to out-of-memory problems. Since apparently nobody has
Unlike A-profile, for M-profile the UDIV and SDIV insns can be
configured to raise an exception on division by zero, using the CCR
DIV_0_TRP bit.
Implement support for setting this bit by making the helper functions
raise the appropriate exception.
Signed-off-by: Peter Maydell
---
target/arm/cp
We're about to make a code change to the sdiv and udiv helper
functions, so first fix their indentation and coding style.
Signed-off-by: Peter Maydell
---
target/arm/helper.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/help
Unlike A-profile, for M-profile the UDIV and SDIV insns can be
configured to raise an exception on division by zero, using the CCR
DIV_0_TRP bit. This patchset implements that missing functionality
by having the udiv and sdiv helpers raise an exception if needed.
Some questions:
Is it worth allo
On 27.07.21 21:04, Dr. David Alan Gilbert wrote:
* David Hildenbrand (da...@redhat.com) wrote:
Let's simplify the case when we only want a single thread and don't have
to mess with signal handlers.
Signed-off-by: David Hildenbrand
---
util/oslib-posix.c | 8
1 file changed, 8 inser
"make check-acceptance" takes way way too long. I just did a run
on an arm-and-aarch64-targets-only debug build and it took over
half an hour, and this despite it skipping or cancelling 26 out
of 58 tests!
I think that ~10 minutes runtime is reasonable. 30 is not;
ideally no individual test would
On 29.07.21 18:29, Vladimir Sementsov-Ogievskiy wrote:
29.07.2021 16:47, Max Reitz wrote:
On 29.07.21 13:35, Vladimir Sementsov-Ogievskiy wrote:
29.07.2021 13:38, Max Reitz wrote:
On 29.07.21 12:02, Vladimir Sementsov-Ogievskiy wrote:
28.07.2021 10:00, Max Reitz wrote:
On 27.07.21 18:47, Vla
Just making sure Cedric is also seeing this...
-Klaus
On Fri, Jul 30, 2021 at 10:27 AM Philippe Mathieu-Daudé
wrote:
> Cc'ing qemu-ppc@
>
> On 7/30/21 6:25 AM, Lindsay Ryan wrote:
> > Hi
> > I'm trying to emulate some physical IBM Power 9's that we have. There
> > seems to be plenty of example
Strictly speaking, this is not necessary, because lo_inode_open() will
always return a new FD owned by the caller, so TempFd.owned will always
be true.
However, auto-cleanup is nice, and in some cases this plays nicely with
an lo_inode_fd() call in another conditional branch (see lo_setattr()).
S
lo_find() right now takes two lookup keys for two maps, namely the file
handle for inodes_by_handle and the statx information for inodes_by_ids.
However, we only need the statx information if looking up the inode by
the file handle failed.
There are two callers of lo_find(): The first one, lo_do_l
When the inode_file_handles option is set, try to generate a file handle
for new inodes instead of opening an O_PATH FD.
Being able to open these again will require CAP_DAC_READ_SEARCH, so the
description text tells the user they will also need to specify
-o modcaps=+dac_read_search.
Generating a
We are planning to add file handles to lo_inode objects as an
alternative to lo_inode.fd. That means that everywhere where we
currently reference lo_inode.fd, we will have to open a temporary file
descriptor that needs to be closed after use.
So instead of directly accessing lo_inode.fd, there wi
The xattr functions want a non-O_PATH FD, so they reopen the lo_inode.fd
with the flags they need through /proc/self/fd.
Similarly, lo_opendir() needs an O_RDONLY FD. Instead of the
/proc/self/fd trick, it just uses openat(fd, "."), because the FD is
guaranteed to be a directory, so this works.
This new field is an alternative to lo_inode.fd: Either of the two must
be set. In case an O_PATH FD is needed for some lo_inode, it is either
taken from lo_inode.fd, if valid, or a temporary FD is opened with
open_by_handle_at().
Using a file handle instead of an FD has the advantage of keeping
Hi,
v1 cover letter for an overview:
https://listman.redhat.com/archives/virtio-fs/2021-June/msg00033.html
v2 cover letter:
https://listman.redhat.com/archives/virtio-fs/2021-June/msg00074.html
For v3, at first I attempted to have errors related to file handle
generation (name_to_handle_at()) be
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