On 7/29/21 2:46 AM, Richard Henderson wrote:
> The function is trivial for user-only, but still must be present.
>
> Cc: Taylor Simpson
> Signed-off-by: Richard Henderson
> ---
> target/hexagon/cpu.h | 9 +
> 1 file changed, 9 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 7/29/21 2:46 AM, Richard Henderson wrote:
> Cc: qemu-...@nongnu.org
> Signed-off-by: Richard Henderson
> ---
> target/ppc/translate.c | 12 +++-
> 1 file changed, 7 insertions(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 7/29/21 2:46 AM, Richard Henderson wrote:
> Cc: qemu-...@nongnu.org
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper-a64.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 7/29/21 2:46 AM, Richard Henderson wrote:
> We will shortly use the MemOpIdx directly, but in the meantime
> re-compute the trace meminfo.
>
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/atomic_template.h | 48 +--
> accel/tcg/atomic_common.c.inc | 30
On 7/29/21 2:46 AM, Richard Henderson wrote:
> Cc: qemu-s3...@nongnu.org
> Signed-off-by: Richard Henderson
> ---
> target/s390x/tcg/mem_helper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 2021/7/29 4:22, Andrew Jones wrote:
On Wed, Jul 28, 2021 at 11:48:40AM +0800, Yanan Wang wrote:
Currently we directly calculate the omitted cpus based on the given
incomplete collection of parameters. This makes some cmdlines like:
-smp maxcpus=16
-smp sockets=2,maxcpus=16
-smp socke
On 7/29/21 2:46 AM, Richard Henderson wrote:
> This crept in as either a cut-and-paste error, or rebase error.
>
> Fixes: cfec388518d
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/atomic_template.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/accel/tcg/atomic_template.h b/acce
On 7/29/21 2:46 AM, Richard Henderson wrote:
> Move this code from tcg/tcg.h to its own header.
>
> Signed-off-by: Richard Henderson
> ---
> include/exec/memopidx.h | 55 +
> include/tcg/tcg.h | 39 +
> 2 files changed, 56
On 7/29/21 2:46 AM, Richard Henderson wrote:
> We're about to move this out of tcg.h, so rename it
> as we did when moving MemOp.
>
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/atomic_template.h | 24 +--
> include/tcg/tcg.h | 74 -
>
On 2021/7/29 4:16, Andrew Jones wrote:
On Wed, Jul 28, 2021 at 11:48:38AM +0800, Yanan Wang wrote:
To pave the way for the functional improvement in later patches,
make some refactor/cleanup for the smp parsers, including using
local maxcpus instead of ms->smp.max_cpus in the calculation,
defaul
On 7/29/21 2:46 AM, Richard Henderson wrote:
> We have lacked expressive support for memory sizes larger
> than 64-bits for a while. Fixing that requires adjustment
> to several points where we used this for array indexing,
> and two places that develop -Wswitch warnings after the change.
>
> Sig
On 7/29/21 2:46 AM, Richard Henderson wrote:
> We shouldn't be ignoring SIGBUS for user-only.
> Move our existing TCGCPUOps hook out from CONFIG_SOFTMMU.
>
> Signed-off-by: Richard Henderson
> ---
> include/hw/core/tcg-cpu-ops.h | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions
On 7/29/21 2:46 AM, Richard Henderson wrote:
> The printf should have been qemu_log_mask, the parameters
> themselves no longer compile, and because this is placed
> before unwinding the PC is actively wrong.
>
> We get better (and correct) logging on the other side of
> raising the exception, in
On 7/29/21 2:46 AM, Richard Henderson wrote:
> We ought to have been recording the virtual address for reporting
> to the guest trap handler.
>
> Cc: Yoshinori Sato
> Signed-off-by: Richard Henderson
> ---
> target/sh4/op_helper.c | 5 +
> 1 file changed, 5 insertions(+)
Reviewed-by: Phili
On 7/29/21 2:46 AM, Richard Henderson wrote:
> We shouldn't be ignoring SIGBUS for user-only.
> Move our existing TCGCPUOps hook out from CONFIG_SOFTMMU.
>
> Signed-off-by: Richard Henderson
> ---
> include/hw/core/tcg-cpu-ops.h | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions
On 7/29/21 2:46 AM, Richard Henderson wrote:
> This began with Peter wanting a cpu_ldst.h interface that can handle
> alignment info for Arm M-profile system mode, which will also compile
> for user-only without ifdefs. This is patch 32.
>
> Once I had that interface, I thought I might as well en
On Thu, 29 Jul 2021, Ani Sinha wrote:
>
>
> On Wed, 28 Jul 2021, Michael S. Tsirkin wrote:
>
> > On Mon, Jul 26, 2021 at 10:27:43PM +0530, Ani Sinha wrote:
> > > All existing code using acpi_get_i386_pci_host() checks for a non-null
> > > return value from this function call. Instead of returni
On 28/07/2021 20.26, Philippe Mathieu-Daudé wrote:
On 7/28/21 7:38 PM, Thomas Huth wrote:
If maintainers are currently pushing to a branch called "staging"
in their repository, they are ending up with some stuck jobs - unless
they have a s390x CI runner machine available. That's ugly, we should
On 28/07/2021 23.41, Peter Xu wrote:
Even if seems to exist for all archs on linux, however including
it with __linux__ defined seems to be not working yet as it'll try to include
asm/kvm.h and that can be missing for archs that do not support kvm.
To fix this (instead of any attempt to fix lin
Sup?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1891748
Title:
qemu-arm-static 5.1 can't run gcc
Status in QEMU:
Fix Released
Status in Juju Charms Collection:
New
Bug description:
Issue
On Wed, 28 Jul 2021, Michael S. Tsirkin wrote:
> On Mon, Jul 26, 2021 at 10:27:43PM +0530, Ani Sinha wrote:
> > All existing code using acpi_get_i386_pci_host() checks for a non-null
> > return value from this function call. Instead of returning early when the
> > value
> > returned is NULL, a
Hi.
On 2021/7/8 1:20, Steve Sistare wrote:
> Save accepted socket fds in the environment before cprsave, and look for
> fds in the environment after cprload. Reject cprexec if a socket enables
> the TLS or websocket option. Allow a monitor socket by closing it on exec.
>
> Signed-off-by: Mark K
ELF kernel allows us debugging much easier with DWARF symbols.
Signed-off-by: Jiaxun Yang
---
hw/mips/boston.c | 38 ++
1 file changed, 34 insertions(+), 4 deletions(-)
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index a5746ede65..42b31a1ce4 100644
--- a
Generate FDT on our own if no dtb argument supplied.
Avoid introduce unused device in FDT with user supplied dtb.
Signed-off-by: Jiaxun Yang
---
hw/mips/boston.c | 238 +--
1 file changed, 228 insertions(+), 10 deletions(-)
diff --git a/hw/mips/boston
Use memmap array to unfiy address of memory map.
That would allow us reuse address information for FDT generation.
Signed-off-by: Jiaxun Yang
---
hw/mips/boston.c | 95
1 file changed, 71 insertions(+), 24 deletions(-)
diff --git a/hw/mips/boston
Jiaxun Yang (3):
hw/mips/boston: Massage memory map information
hw/mips/boston: Allow loading elf kernel and dtb
hw/mips/boston: Add FDT generator
hw/mips/boston.c | 351 +++
1 file changed, 323 insertions(+), 28 deletions(-)
--
2.32.0
> -Original Message-
> From: Richard Henderson
> Sent: Wednesday, July 28, 2021 6:47 PM
> To: qemu-devel@nongnu.org
> Cc: Taylor Simpson
> Subject: [PATCH for-6.2 31/43] target/hexagon: Implement cpu_mmu_index
>
> The function is trivial for user-only, but still must be present.
>
>
By default, the Linux kernel fixes up unaligned accesses.
Therefore, as the kernel surrogate, qemu should as well.
No fixups are done for load-locked/store-conditional, so
mark those as MO_ALIGN.
There is a syscall to disable this, and (among other things)
deliver SIGBUS, but it is essentially unu
These functions have been replaced by cpu_*_mmu as the
most proper interface to use from target code.
Hide these declarations from code that should not use them.
Signed-off-by: Richard Henderson
---
include/tcg/tcg-ldst.h | 74 ++
include/tcg/tcg.h |
Rather than use 4-16 separate operations, use 2 operations
plus some byte reordering as necessary.
Cc: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/mips/tcg/msa_helper.c | 201 +--
1 file changed, 71 insertions(+), 130 deletions(-)
diff --g
The helper_*_mmu functions were the only thing available
when this code was written. This could have been adjusted
when we added cpu_*_mmuidx_ra, but now we can most easily
use the newest set of interfaces.
Cc: qemu-s3...@nongnu.org
Signed-off-by: Richard Henderson
---
target/s390x/tcg/mem_help
The function is trivial for user-only, but still must be present.
Cc: Taylor Simpson
Signed-off-by: Richard Henderson
---
target/hexagon/cpu.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index 2855dd3881..bde538fd5c 100644
--- a/targe
Signed-off-by: Richard Henderson
---
target/i386/tcg/mem_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/tcg/mem_helper.c b/target/i386/tcg/mem_helper.c
index 0fd696f9c1..a207e624cb 100644
--- a/target/i386/tcg/mem_helper.c
+++ b/target/i386/tcg/mem_helper
There is no point in encoding load/store within a bit of
the memory trace info operand. Represent atomic operations
as a single read-modify-write tracepoint. Use MemOpIdx
instead of inventing a form specifically for traces.
Signed-off-by: Richard Henderson
---
accel/tcg/atomic_template.h |
Use the MemOpIdx directly, rather than the rearrangement
of the same bits currently done by the trace infrastructure.
Pass in enum qemu_plugin_mem_rw so that we are able to treat
read-modify-write operations as a single operation.
Signed-off-by: Richard Henderson
---
include/qemu/plugin.h
> On Jul 28, 2021, at 3:16 AM, Stefan Hajnoczi wrote:
>
> On Sun, Jul 18, 2021 at 11:27:43PM -0700, Elena Ufimtseva wrote:
>> From: John G Johnson
>>
>> New class for vfio-user with its class and instance
>> constructors and destructors.
>>
>> Signed-off-by: Elena Ufimtseva
>> Signed-off-by
We (will) often have the complete MemOpIdx handy, so use that.
Signed-off-by: Richard Henderson
---
trace/mem.h | 32 +-
accel/tcg/cputlb.c| 12 --
accel/tcg/user-exec.c | 42 +++
tcg/tcg-op.c
We're about to move this out of tcg.h, so rename it
as we did when moving MemOp.
Signed-off-by: Richard Henderson
---
accel/tcg/atomic_template.h | 24 +--
include/tcg/tcg.h | 74 -
accel/tcg/cputlb.c| 78 +
A mostly generic test for unaligned access raising SIGBUS.
Signed-off-by: Richard Henderson
---
tests/tcg/multiarch/sigbus.c | 68
1 file changed, 68 insertions(+)
create mode 100644 tests/tcg/multiarch/sigbus.c
diff --git a/tests/tcg/multiarch/sigbus.c b/t
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 -
tcg/i386/tcg-target.c.inc | 114 --
2 files changed, 110 insertions(+), 6 deletions(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index b00a6da293..3b2c9437a0 100644
--- a/
To be called from tcg generated code on hosts that support
unaligned accesses natively, in response to an access that
is supposed to be aligned.
Signed-off-by: Richard Henderson
---
include/tcg/tcg-ldst.h | 5 +
accel/tcg/user-exec.c | 13 ++---
2 files changed, 15 insertions(+), 3
The helper_*_mmu functions were the only thing available
when this code was written. This could have been adjusted
when we added cpu_*_mmuidx_ra, but now we can most easily
use the newest set of interfaces.
Cc: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target/sparc/ldst_helper.c |
The helper_*_mmu functions were the only thing available
when this code was written. This could have been adjusted
when we added cpu_*_mmuidx_ra, but now we can most easily
use the newest set of interfaces.
Cc: qemu-...@nongnu.org
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 5
Move this code from tcg/tcg.h to its own header.
Signed-off-by: Richard Henderson
---
include/exec/memopidx.h | 55 +
include/tcg/tcg.h | 39 +
2 files changed, 56 insertions(+), 38 deletions(-)
create mode 100644 include
Cc: qemu-s3...@nongnu.org
Signed-off-by: Richard Henderson
---
target/s390x/tcg/mem_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c
index ec88f5dbb0..3782c1c098 100644
--- a/target/s390x/tcg/mem_helper.
Use the newly exposed do_unaligned_access hook from atomic_mmu_lookup,
which has access to complete alignment info from the TCGMemOpIdx arg.
Signed-off-by: Richard Henderson
---
accel/tcg/user-exec.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/acce
These functions are much closer to the softmmu helper
functions, in that they take the complete MemOpIdx,
and from that they may enforce required alignment.
The previous cpu_ldst.h functions did not have alignment info,
and so did not enforce it. Retain this by adding MO_UNALN to
the MemOp that w
We should not have been using the helper_ret_* set of
functions, as they are supposed to be private to tcg.
Nor should we have been using the plain cpu_*_data set
of functions, as they do not handle unwinding properly.
Cc: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/mips/
Cc: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
linux-user/sparc/cpu_loop.c | 11 +++
target/sparc/cpu.c | 2 +-
target/sparc/ldst_helper.c | 2 --
3 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/linux-user/sparc/cpu_loop.c b/linux-user/sparc/cpu_loo
Cc: qemu-...@nongnu.org
Signed-off-by: Richard Henderson
---
target/ppc/translate.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 171b216e17..540efa858f 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/tr
We have lacked expressive support for memory sizes larger
than 64-bits for a while. Fixing that requires adjustment
to several points where we used this for array indexing,
and two places that develop -Wswitch warnings after the change.
Signed-off-by: Richard Henderson
---
include/exec/memop.h
The previous placement in tcg/tcg.h was not logical.
Signed-off-by: Richard Henderson
---
include/exec/cpu_ldst.h | 87 +++
include/tcg/tcg.h | 87 ---
target/arm/helper-a64.c | 1 -
target/m68k/op_helper.c
We will shortly use the MemOpIdx directly, but in the meantime
re-compute the trace meminfo.
Signed-off-by: Richard Henderson
---
accel/tcg/atomic_template.h | 48 +--
accel/tcg/atomic_common.c.inc | 30 +++---
2 files changed, 39 insertions(+),
Cc: Max Filippov
Signed-off-by: Richard Henderson
---
target/xtensa/cpu.c| 2 +-
target/xtensa/helper.c | 30 +++---
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index 58ec3a0862..41816d91f6 100644
--- a/t
Cc: qemu-...@nongnu.org
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 13d1e3f808..f06399f351 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/hel
The printf should have been qemu_log_mask, the parameters
themselves no longer compile, and because this is placed
before unwinding the PC is actively wrong.
We get better (and correct) logging on the other side of
raising the exception, in sparc_cpu_do_interrupt.
Cc: Mark Cave-Ayland
Signed-off
Cc: Yoshinori Sato
Signed-off-by: Richard Henderson
---
linux-user/sh4/cpu_loop.c | 8
target/sh4/cpu.c | 2 +-
target/sh4/op_helper.c| 3 ---
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c
index 222ed1c6
This crept in as either a cut-and-paste error, or rebase error.
Fixes: cfec388518d
Signed-off-by: Richard Henderson
---
accel/tcg/atomic_template.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h
index 4427fab6df..4230ff2957 100644
---
We ought to have been recording the virtual address for reporting
to the guest trap handler.
Cc: Yoshinori Sato
Signed-off-by: Richard Henderson
---
target/sh4/op_helper.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c
index c0cbb95382..
We ought to have been recording the virtual address for reporting
to the guest trap handler. Mirror the SFSR FIXME from the sparc64
version of get_physical_address_data.
Cc: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target/sparc/ldst_helper.c | 8
1 file changed, 8 inserti
Cc: qemu-ri...@nongnu.org
Signed-off-by: Richard Henderson
---
linux-user/riscv/cpu_loop.c | 7 +++
target/riscv/cpu.c | 2 +-
target/riscv/cpu_helper.c | 8 +++-
3 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_
Signed-off-by: Richard Henderson
---
linux-user/hppa/cpu_loop.c | 2 +-
target/hppa/cpu.c | 8 +---
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/hppa/cpu_loop.c
index 82d8183821..5ce30fec8b 100644
--- a/linux-user/hppa/cpu_loo
We are already inconsistent about whether or not
MO_SIGN is set in trace_mem_get_info. Dropping it
entirely allows some simplification.
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c| 10 +++---
accel/tcg/user-exec.c | 45 ++-
2 files cha
Cc: qemu-s3...@nongnu.org
Signed-off-by: Richard Henderson
---
target/s390x/cpu.c | 2 +-
target/s390x/tcg/excp_helper.c | 28 +++-
2 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 7b7b05f1d3..9d8cf
Cc: qemu-...@nongnu.org
Signed-off-by: Richard Henderson
---
linux-user/ppc/cpu_loop.c | 2 +-
target/ppc/cpu_init.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c
index fa91ea0eed..d72d30248b 100644
--- a/linux-use
Cc: Edgar E. Iglesias
Signed-off-by: Richard Henderson
---
target/microblaze/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 72d8f2a0da..cbec062ed7 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
Cc: qemu-...@nongnu.org
Signed-off-by: Richard Henderson
---
linux-user/aarch64/cpu_loop.c | 4
linux-user/arm/cpu_loop.c | 43 +++
target/arm/cpu.c | 2 +-
target/arm/cpu_tcg.c | 2 +-
4 files changed, 40 insertions(+), 11 deletio
Cc: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
linux-user/mips/cpu_loop.c| 20
target/mips/cpu.c | 2 +-
target/mips/tcg/op_helper.c | 3 +--
target/mips/tcg/user/tlb_helper.c | 23 +++
4 files changed, 29
We ought to have been recording the virtual address for reporting
to the guest trap handler.
Cc: qemu-...@nongnu.org
Signed-off-by: Richard Henderson
---
target/ppc/excp_helper.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index a79a0
This began with Peter wanting a cpu_ldst.h interface that can handle
alignment info for Arm M-profile system mode, which will also compile
for user-only without ifdefs. This is patch 32.
Once I had that interface, I thought I might as well enforce the
requested alignment in user-only. There are
Signed-off-by: Richard Henderson
---
target/alpha/cpu.c| 2 +-
target/alpha/mem_helper.c | 8 +++-
2 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 4871ad0c0a..cb7e5261bd 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu
We shouldn't be ignoring SIGBUS for user-only.
Move our existing TCGCPUOps hook out from CONFIG_SOFTMMU.
Signed-off-by: Richard Henderson
---
include/hw/core/tcg-cpu-ops.h | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/h
On Wed, Jul 28, 2021 at 11:48:48AM +0800, Yanan Wang wrote:
> Now we have a common structure SMPCompatProps used to store information
> about SMP compatibility stuff, so we can also move smp_prefer_sockets
> there for cleaner code.
>
> No functional change intended.
>
> Signed-off-by: Yanan Wang
On 7/28/21 11:41 PM, Peter Xu wrote:
> Even if seems to exist for all archs on linux, however including
> it with __linux__ defined seems to be not working yet as it'll try to include
> asm/kvm.h and that can be missing for archs that do not support kvm.
>
> To fix this (instead of any attempt to
Hi Peter.
> These ones seem to have reached both qemu-devel and qemu-devel \o/
>
> https://lists.gnu.org/archive/html/qemu-devel/2021-07/msg06355.html
> https://lists.gnu.org/archive/html/qemu-arm/2021-07/msg00391.html
Thank you for contacting us.
Since our email seems to have successfully made
On 7/28/21 11:41 AM, Peter Xu wrote:
Even if seems to exist for all archs on linux, however including
it with __linux__ defined seems to be not working yet as it'll try to include
asm/kvm.h and that can be missing for archs that do not support kvm.
To fix this (instead of any attempt to fix lin
On Wed, Jul 28, 2021 at 05:41:28PM -0400, Peter Xu wrote:
> No need to have "Fixes" as the issue is just introduced very recently.
And.. This is only true if this patch can be merged in 6.1...
I should have added "for 6.1" in the subject but I forgot. Sorry.
--
Peter Xu
Even if seems to exist for all archs on linux, however including
it with __linux__ defined seems to be not working yet as it'll try to include
asm/kvm.h and that can be missing for archs that do not support kvm.
To fix this (instead of any attempt to fix linux headers..), we can mark the
header t
On Wed, Jul 28, 2021 at 11:11:30AM -1000, Richard Henderson wrote:
> On 7/28/21 10:37 AM, Peter Xu wrote:
> > A quick fix attached; would that work for us?
>
> Looks plausible, though perhaps just as easy to list the 5 platforms as just
> the one:
>
> #if defined(__linux__) && \
> (defined(H
On 7/28/21 10:37 AM, Peter Xu wrote:
A quick fix attached; would that work for us?
Looks plausible, though perhaps just as easy to list the 5 platforms as just
the one:
#if defined(__linux__) && \
(defined(HOST_X86_64) || \
defined(HOST_S390X) || \
...)
# define HAVE_KVM
#endif
On Wed, Jul 28, 2021 at 11:48:48AM +0800, Yanan Wang wrote:
> Now we have a common structure SMPCompatProps used to store information
> about SMP compatibility stuff, so we can also move smp_prefer_sockets
> there for cleaner code.
>
> No functional change intended.
>
> Signed-off-by: Yanan Wang
On Wed, Jul 28, 2021 at 10:38:57PM +0200, Andrew Jones wrote:
> On Wed, Jul 28, 2021 at 11:48:46AM +0800, Yanan Wang wrote:
> > @@ -248,6 +256,7 @@ struct MachineClass {
> > bool numa_mem_supported;
> > bool auto_enable_numa;
> > bool smp_prefer_sockets;
> > +SMPCompatProps smp_p
On Wed, Jul 28, 2021 at 11:48:47AM +0800, Yanan Wang wrote:
> Now we have a generic smp parser for all arches, and there will
> not be any other arch specific ones, so let's remove the callback
> from MachineClass and call the parser directly.
>
> Signed-off-by: Yanan Wang
> ---
> hw/core/machin
On Wed, Jul 28, 2021 at 11:48:46AM +0800, Yanan Wang wrote:
> Currently the only difference between smp_parse and pc_smp_parse
> is the support of dies parameter and the related error reporting.
> With some arch compat variables like "bool dies_supported", we can
> make smp_parse generic enough for
On Wed, Jul 28, 2021 at 09:37:48AM -1000, Richard Henderson wrote:
> On 6/15/21 7:55 AM, Peter Xu wrote:
> > Add dirty ring test if kernel supports it. Add the dirty ring parameter on
> > source should be mostly enough, but let's change the dest too to make them
> > match always.
> >
> > Reviewed
On Wed, Jul 28, 2021 at 11:48:43AM +0800, Yanan Wang wrote:
> In the real SMP hardware topology world, it's much more likely that
> we have high cores-per-socket counts and few sockets totally. While
> the current preference of sockets over cores in smp parsing results
> in a virtual cpu topology w
On Wed, Jul 28, 2021 at 11:48:41AM +0800, Yanan Wang wrote:
> We have two requirements for a valid SMP configuration:
> the product of "sockets * cores * threads" must represent all the
> possible cpus, i.e., max_cpus, and then must include the initially
> present cpus, i.e., smp_cpus.
>
> So we o
On Wed, Jul 28, 2021 at 11:48:40AM +0800, Yanan Wang wrote:
> Currently we directly calculate the omitted cpus based on the given
> incomplete collection of parameters. This makes some cmdlines like:
> -smp maxcpus=16
> -smp sockets=2,maxcpus=16
> -smp sockets=2,dies=2,maxcpus=16
> -smp soc
On Wed, Jul 28, 2021 at 09:46:09PM +0200, David Hildenbrand wrote:
> On 28.07.21 21:42, Peter Xu wrote:
> > On Wed, Jul 28, 2021 at 07:39:39PM +0200, David Hildenbrand wrote:
> > > > Meanwhile, I still have no idea how much overhead the "loop" part could
> > > > bring.
> > > > For a large virtio-m
On Wed, Jul 28, 2021 at 11:48:38AM +0800, Yanan Wang wrote:
> To pave the way for the functional improvement in later patches,
> make some refactor/cleanup for the smp parsers, including using
> local maxcpus instead of ms->smp.max_cpus in the calculation,
> defaulting dies to 0 initially like othe
On 28.07.21 20:31, Peter Xu wrote:
memory_region_transaction_{begin|commit}() could be too big when finalizing a
memory region. E.g., we should never attempt to update address space topology
during the finalize() of a memory region. Provide helpers for further use.
Signed-off-by: Peter Xu
---
On Wed, Jul 28, 2021, harry harry wrote:
> Sean, sorry for the late reply. Thanks for your careful explanations.
>
> > For emulation of any instruction/flow that starts with a guest virtual
> > address.
> > On Intel CPUs, that includes quite literally any "full" instruction
> > emulation,
> > si
On 28.07.21 21:42, Peter Xu wrote:
On Wed, Jul 28, 2021 at 07:39:39PM +0200, David Hildenbrand wrote:
Meanwhile, I still have no idea how much overhead the "loop" part could bring.
For a large virtio-mem region with frequent plugged/unplugged mem interacted,
it seems possible to take a while to
On Wed, Jul 28, 2021 at 07:39:39PM +0200, David Hildenbrand wrote:
> > Meanwhile, I still have no idea how much overhead the "loop" part could
> > bring.
> > For a large virtio-mem region with frequent plugged/unplugged mem
> > interacted,
> > it seems possible to take a while to me.. I have no
On 6/15/21 7:55 AM, Peter Xu wrote:
Add dirty ring test if kernel supports it. Add the dirty ring parameter on
source should be mostly enough, but let's change the dest too to make them
match always.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
---
tests/qtest/migration-test.
On Wed, Jul 28, 2021 at 2:39 PM Thomas Huth wrote:
>
> If maintainers are currently pushing to a branch called "staging"
> in their repository, they are ending up with some stuck jobs - unless
> they have a s390x CI runner machine available. That's ugly, we should
> make sure that the related jobs
Sean, sorry for the late reply. Thanks for your careful explanations.
> For emulation of any instruction/flow that starts with a guest virtual
> address.
> On Intel CPUs, that includes quite literally any "full" instruction emulation,
> since KVM needs to translate CS:RIP to a guest physical addr
On 7/28/21 3:46 PM, Antonio Caggiano wrote:
> From: Gerd Hoffmann
>
> ---
> hw/display/virtio-gpu-base.c| 4 +++
> hw/display/virtio-gpu-pci.c | 14 +
> hw/display/virtio-gpu.c | 1 +
> hw/display/virtio-vga.c | 32
On 7/28/21 8:31 PM, Peter Xu wrote:
> This patch has no functional change, but prepares for moving the function
> do_run_on_cpu() into softmmu/cpus.c. It does:
>
> 1. Move qemu_work_item into hw/core/cpu.h.
> 2. Export queue_work_on_cpu()/qemu_work_cond.
>
> All of them will be used by softm
On 7/28/21 3:46 PM, Antonio Caggiano wrote:
> Enable VirGL unstable APIs and request Venus when initializing VirGL.
>
> Signed-off-by: Antonio Caggiano
> ---
> hw/display/virtio-gpu-virgl.c | 2 +-
> meson.build | 1 +
> 2 files changed, 2 insertions(+), 1 deletion(-)
> diff -
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