On Fri, Jul 23, 2021 at 08:47:09AM +0200, Philippe Mathieu-Daudé wrote:
> On 7/23/21 8:32 AM, Gerd Hoffmann wrote:
> > On Thu, Jul 22, 2021 at 03:44:54PM +0100, Dr. David Alan Gilbert wrote:
> >> * Gerd Hoffmann (kra...@redhat.com) wrote:
> >>> Since commit 551dbd0846d2 ("migration: check pre_save
On Thu, Jul 15, 2021 at 6:21 PM Bin Meng wrote:
>
> On Wed, Jul 14, 2021 at 3:25 PM Alistair Francis
> wrote:
> >
> > Instead of using riscv_cpu_update_mip() let's instead use the new RISC-V
> > CPU GPIO lines to set the timer MIP bits.
> >
> > Signed-off-by: Alistair Francis
> > Reviewed-by: Ph
On 7/23/21 8:32 AM, Gerd Hoffmann wrote:
> On Thu, Jul 22, 2021 at 03:44:54PM +0100, Dr. David Alan Gilbert wrote:
>> * Gerd Hoffmann (kra...@redhat.com) wrote:
>>> Since commit 551dbd0846d2 ("migration: check pre_save return in
>>> vmstate_save_state") the pre_save hook can fail. So lets finally
On 7/20/21 11:53 PM, Song Gao wrote:
Add loongarch64 linux-user default configs file.
Signed-off-by: Song Gao
---
configs/targets/loongarch64-linux-user.mak | 3 +++
1 file changed, 3 insertions(+)
create mode 100644 configs/targets/loongarch64-linux-user.mak
Reviewed-by: Richard Henderso
On 7/20/21 11:53 PM, Song Gao wrote:
This patch add support for disassembling via option '-d in_asm'.
Signed-off-by: Song Gao
---
MAINTAINERS |1 +
disas/loongarch.c | 2511 +++
disas/meson.build |1 +
include/disas
On 7/20/21 11:53 PM, Song Gao wrote:
+/* Branch Instructions translation */
+static bool trans_beqz(DisasContext *ctx, arg_beqz *a)
+{
+TCGv t0, t1;
+int bcond_flag = 0;
+
+t0 = tcg_temp_new();
+t1 = tcg_const_i64(0);
+
+if (a->rj != 0) {
+gen_load_gpr(t0, a->rj);
+
On 7/20/21 11:53 PM, Song Gao wrote:
+static bool trans_fldx_d(DisasContext *ctx, arg_fldx_d *a)
+{
+TCGv t0;
+TCGv_i64 fp0;
+TCGv Rj = cpu_gpr[a->rj];
+TCGv Rk = cpu_gpr[a->rk];
+
+t0 = tcg_temp_new();
+fp0 = tcg_temp_new_i64();
+
+if (a->rj == 0 && a->rk == 0) {
+
On Thu, Jul 22, 2021 at 03:44:54PM +0100, Dr. David Alan Gilbert wrote:
> * Gerd Hoffmann (kra...@redhat.com) wrote:
> > Since commit 551dbd0846d2 ("migration: check pre_save return in
> > vmstate_save_state") the pre_save hook can fail. So lets finally
> > use that to drop the guest-triggerable a
On 7/20/21 11:53 PM, Song Gao wrote:
This patch implement floationg point move instruction translation.
This includes:
- FMOV.{S/D}
- FSEL
- MOVGR2FR.{W/D}, MOVGR2FRH.W
- MOVFR2GR.{S/D}, MOVFRH2GR.S
- MOVGR2FCSR, MOVFCSR2GR
- MOVFR2CF, MOVCF2FR
- MOVGR2CF, MOVCF2GR
Signed-off-by: Song Gao
---
Hi,
> --- a/accel/accel-softmmu.c
> +++ b/accel/accel-softmmu.c
> @@ -79,7 +79,10 @@ void accel_init_ops_interfaces(AccelClass *ac)
> * all accelerators need to define ops, providing at least a mandatory
> * non-NULL create_vcpu_thread operation.
> */
> -g_assert(ops != NUL
> > +if config_host.has_key('CONFIG_USB_LIBUSB')
>
> The problem is in this condition as it's evaluated as false. When I
> replace it with libusb.found(), everything works as it used to.
Correct fix, paolo has a pending pull request containing it.
> Unfortunately I don't know what the real goa b
On 7/20/21 11:53 PM, Song Gao wrote:
+uint64_t helper_fp_tintrm_l_d(CPULoongArchState *env, uint64_t src)
+{
+uint64_t dest;
+
+set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
+dest = float64_to_int64(src, &env->active_fpu.fp_status);
+restore_rounding_mode(
On 7/20/21 11:53 PM, Song Gao wrote:
+void helper_movreg2cf_i32(CPULoongArchState *env, uint32_t cd, uint32_t src)
+{
+env->active_fpu.cf[cd & 0x7] = src & 0x1;
+}
+
+void helper_movreg2cf_i64(CPULoongArchState *env, uint32_t cd, uint64_t src)
+{
+env->active_fpu.cf[cd & 0x7] = src & 0x1;
From: Marc-André Lureau
Before commit 49afbca3b00e8e517d54964229a794b51768deaf ("virtio-gpu: drop
use_virgl_renderer"), use_virgl_renderer was preventing calling GL
functions from non-GL context threads. The innocuously looking
g->parent_obj.use_virgl_renderer = false;
was set the first time
From: Marc-André Lureau
Do not instantiate an extra default VGA device if -device virtio-vga-gl
is provided.
Related to commit b36eb8860f8f4a9c6f131c3fd380116a3017e022 ("virtio-gpu:
add virtio-vga-gl")
Signed-off-by: Marc-André Lureau
Message-Id: <20210701062421.721414-1-marcandre.lur...@redha
From: Marc-André Lureau
This avoids failing to initialize virgl and crashing later on, and clear
the user expectations.
Signed-off-by: Marc-André Lureau
Reviewed-by: Mark Cave-Ayland
Message-Id: <20210705104218.1161101-1-marcandre.lur...@redhat.com>
Signed-off-by: Gerd Hoffmann
---
hw/displa
This reverts commit 86dbcdd9c7590d06db89ca256c5eaf0b4aba8858.
The pre-save assert is gone now, so the migration blocker
is not needed any more.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Marc-André Lureau
Message-Id: <20210721093347.338536-3-kra...@redhat.com>
---
hw/display/qxl.h | 1 -
hw/di
Since commit 551dbd0846d2 ("migration: check pre_save return in
vmstate_save_state") the pre_save hook can fail. So lets finally
use that to drop the guest-triggerable assert in qxl_pre_save().
Signed-off-by: Gerd Hoffmann
Reviewed-by: Marc-André Lureau
Message-Id: <20210721093347.338536-2-kra.
The following changes since commit e77c8b8b8e933414ef07dbed04e02973fccffeb0:
Update version for v6.1.0-rc0 release (2021-07-21 17:10:15 +0100)
are available in the Git repository at:
git://git.kraxel.org/qemu tags/vga-20210723-pull-request
for you to fetch changes up to 8a13b9bc0f283caff433
From: Philippe Mathieu-Daudé
To avoid leaking memory on the error path, reorder the
code as:
- check the parameters first
- check resource already existing
- finally allocate memory
Reported-by: Coverity (CID 1453811: RESOURCE_LEAK)
Fixes: e0933d91b1c ("virtio-gpu: Add virtio_gpu_resource_create
On 7/20/21 11:53 PM, Song Gao wrote:
+uint64_t helper_fp_sqrt_d(CPULoongArchState *env, uint64_t fp)
+{
+fp = float64_sqrt(fp, &env->active_fpu.fp_status);
+update_fcsr0(env, GETPC());
+return fp;
+}
+
+uint32_t helper_fp_sqrt_s(CPULoongArchState *env, uint32_t fp)
+{
+fp = float3
On Wed, Jul 21, 2021 at 4:31 AM Joe Komlodi wrote:
>
> Changelog:
> v2 -> v3
> - 1/2: register block init should also be uint64_t
> v1 -> v2
> - 2/2: Use uint64_t for 64-bit value
>
> Hi all,
>
> This adds more utilities for 64-bit registers.
> As part of it, it also fixes FIELD_DP64 to work wit
On 7/20/21 11:53 PM, Song Gao wrote:
+target_ulong helper_cpucfg(CPULoongArchState *env, target_ulong rj)
+{
+target_ulong r = 0;
+
+switch (rj) {
+case 0:
+r = env->CSR_MCSR0 & 0x;
+break;
+case 1:
+r = (env->CSR_MCSR0 & 0x) >> 32;
On Wed, Jul 21, 2021 at 4:31 AM Joe Komlodi wrote:
>
> We already have some utilities to handle 64-bit wide registers, so this just
> adds some more for:
> - Initializing 64-bit registers
> - Extracting and depositing to an array of 64-bit registers
>
> Signed-off-by: Joe Komlodi
Reviewed-by: Al
On Fri, Jul 9, 2021 at 2:52 PM Richard Henderson
wrote:
>
> Exit early if check_access fails.
> Split out do_hlv, do_hsv, do_hlvx subroutines.
> Use gpr_src, gpr_dst in the new subroutines.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/insn3
On Fri, Jul 9, 2021 at 2:46 PM Richard Henderson
wrote:
>
> Introduce csrr and csrw helpers, for read-only and write-only insns.
>
> Note that we do not properly implement this in riscv_csrrw, in that
> we cannot distinguish true read-only (rs1 == 0) from any other zero
> write_mask another source
There was a bit of a thinko in the state calculation where every odd pin
in was reported in e.g. "pwm0" mode rather than "off". This was the
result of an incorrect bit shift for the 2-bit field representing each
LED state.
Fixes: a90d8f84674d ("misc/pca9552: Add qom set and get")
Signed-off-by: An
On Wed, Jul 14, 2021 at 11:41 AM Alistair Francis wrote:
>
> On Tue, Jul 13, 2021 at 2:06 PM Anup Patel wrote:
> >
> > On Fri, Jul 9, 2021 at 9:01 AM Alistair Francis
> > wrote:
> > >
> > > Instead of using riscv_cpu_update_mip() let's instead use the new RISC-V
> > > CPU GPIO lines to set the t
在 2021/7/19 下午5:00, Zhang Chen 写道:
Hi Jason,
Please help to queue COLO-proxy patches to net branch.
Thanks
Chen
Queued for 6.2
Thanks
The following changes since commit fd79f89c76c8e2f409dd9db5d7a367b1f64b6dc6:
Merge remote-tracking branch
'remotes/pmaydell/tags/pull-target-arm-20
In the SMP configuration, we should either specify a topology
parameter with a reasonable value (equal to or greater than 1)
or just leave it omitted and QEMU will calculate its value.
Configurations which explicitly specify the topology parameters
as zero like "sockets=0" are meaningless, so disal
In the SMP configuration, we should either specify a topology
parameter with a reasonable value (equal to or greater than 1)
or just leave it omitted and QEMU will calculate its value.
Configurations which explicitly specify the topology parameters
as zero like "sockets=0" are meaningless, so disal
Hi Cleber,
On 2021/7/23 6:25, Cleber Rosa wrote:
Yanan Wang writes:
In the SMP configuration, we should either specify a topology
parameter with a reasonable value (equal to or greater than 1)
or just leave it omitted and QEMU will calculate its value.
Configurations which explicitly specify t
On 7/20/21 11:53 PM, Song Gao wrote:
+#define TRANS_AM_W(name, op) \
+static bool trans_ ## name(DisasContext *ctx, arg_ ## name * a) \
+{ \
+TCGv addr, val, ret;
On 7/20/21 11:53 PM, Song Gao wrote:
This patch implement fixed point load/store instruction translation.
This includes:
- LD.{B[U]/H[U]/W[U]/D}, ST.{B/H/W/D}
- LDX.{B[U]/H[U]/W[U]/D}, STX.{B/H/W/D}
- LDPTR.{W/D}, STPTR.{W/D}
- PRELD
- LD{GT/LE}.{B/H/W/D}, ST{GT/LE}.{B/H/W/D}
- DBAR, IBAR
Signe
On 7/20/21 11:53 PM, Song Gao wrote:
This patch implement fixed point bit instruction translation.
This includes:
- EXT.W.{B/H}
- CL{O/Z}.{W/D}, CT{O/Z}.{W/D}
- BYTEPICK.{W/D}
- REVB.{2H/4H/2W/D}
- REVH.{2W/D}
- BITREV.{4B/8B}, BITREV.{W/D}
- BSTRINS.{W/D}, BSTRPICK.{W/D}
- MASKEQZ, MASKNEZ
Sig
On 7/20/21 11:53 PM, Song Gao wrote:
+/* Fixed point shift operation instruction translation */
+static bool trans_sll_w(DisasContext *ctx, arg_sll_w *a)
+{
+TCGv t0, t1;
+TCGv Rd = cpu_gpr[a->rd];
+
+if (a->rd == 0) {
+/* Nop */
+return true;
+}
+
+t0 = tcg_te
On 7/20/21 11:53 PM, Song Gao wrote:
+/* Fixed point arithmetic operation instruction translation */
+static bool trans_add_w(DisasContext *ctx, arg_add_w *a)
+{
+TCGv Rd = cpu_gpr[a->rd];
+TCGv Rj = cpu_gpr[a->rj];
+TCGv Rk = cpu_gpr[a->rk];
+
+if (a->rd == 0) {
+/* Nop *
On 7/20/21 11:53 PM, Song Gao wrote:
+/* General purpose registers moves. */
+void gen_load_gpr(TCGv t, int reg)
+{
+if (reg == 0) {
+tcg_gen_movi_tl(t, 0);
+} else {
+tcg_gen_mov_tl(t, cpu_gpr[reg]);
+}
+}
Please have a look at
https://patchew.org/QEMU/202107090426
On 7/20/21 11:53 PM, Song Gao wrote:
This patch introduces one memory-management-related functions
- loongarch_cpu_tlb_fill()
Signed-off-by: Song Gao
---
target/loongarch/cpu.c| 1 +
target/loongarch/cpu.h| 9
target/loongarch/tlb_helper.c | 103
On 7/20/21 11:53 PM, Song Gao wrote:
+bool loongarch_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
+{
+if (interrupt_request & CPU_INTERRUPT_HARD) {
+LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+CPULoongArchState *env = &cpu->env;
+
+if (cpu_loongarch_hw_interrupt
On 7/20/21 11:52 PM, Song Gao wrote:
This patch add target state header, target definitions
and initialization routines.
Signed-off-by: Song Gao
---
target/loongarch/cpu-param.h | 21
target/loongarch/cpu-qom.h | 40 ++
target/loongarch/cpu.c | 293 +++
Yanan Wang writes:
> In the SMP configuration, we should either specify a topology
> parameter with a reasonable value (equal to or greater than 1)
> or just leave it omitted and QEMU will calculate its value.
> Configurations which explicitly specify the topology parameters
> as zero like "sock
May I get feedback for this bugfix?
So far the "info lapic " returns stale data and could not accurate reflect
the status in KVM.
Thank you very much!
Dongli Zhang
On 7/1/21 2:40 PM, Dongli Zhang wrote:
> While the default "info lapic" always synchronizes cpu state ...
>
> mon_get_cpu()
> -> m
When a module is not found, specially accelerators, QEMU displays
a error message that not easy to understand[1]. This patch improves
the readability by offering a user-friendly message[2].
This patch also moves the accelerator ops check to runtine (instead
of the original g_assert) because it wor
v1 -> v2:
* Moved the code to module.c
* Simplified a lot by using current module DB to get info
The main objective is to improve the error message when trying to
load a not found/not installed module TCG.
For example:
$ qemu-system-x86_64 -accel tcg
ERROR:../accel/accel-softmmu.c:82:accel_init_
Philippe Mathieu-Daudé writes:
> First, all jobs depending on 'docker-opensbi' job must use at most
> all the rules that triggers it. The simplest way to ensure that is
> to always use the same rules. Extract all the rules to a reusable
> section, and include this section (with the 'extends' key
Peter Maydell writes:
> Our built HTML documentation now has a standard footer which
> gives the license for QEMU (and its documentation as a whole).
> In almost all pages, we either don't bother to state the
> copyright/license for the individual rST sources, or we put
> it in an rST comment. T
Peter Maydell writes:
> Since commits 13f934e79fa and 3a50c8f3067aaf, our HTML docs include a
> footer to all pages stating the license and version. We can
> therefore delete the TODO comments suggesting we should do that from
> our .rst files.
>
> Signed-off-by: Peter Maydell
> ---
> docs/in
On 7/22/21 7:52 AM, Peter Maydell wrote:
Peter Maydell (3):
docs: Add documentation of Arm 'mainstone' board
docs: Add documentation of Arm 'kzm' board
docs: Add documentation of Arm 'imx25-pdk' board
Reviewed-by: Richard Henderson
r~
On 7/22/21 8:09 AM, Peter Maydell wrote:
Andrzej Zaborowski is listed as an "Odd Fixes" maintainer for the
nSeries, Palm and PXA2XX boards, as well as the "Maintained" status
Arm 32-bit TCG backend.
Andrzej's last email to qemu-devel was back in 2017, and the email
before that was all the way ba
On Thu, Jul 22, 2021 at 11:23 PM Peter Maydell
wrote:
> This patchset makes a couple of followon cleanups now that
> commits 13f934e79fa and 3a50c8f3067aaf are in master and our HTML
> documentation has a footer to all pages stating the QEMU license
> and version:
> * it removes the TODO comment
On Thu, Jul 22, 2021 at 01:58:38PM -0400, Peter Xu wrote:
> Accessing from_dst_file is potentially racy in current code base like below:
>
> if (s->from_dst_file)
> do_something(s->from_dst_file);
>
> Because from_dst_file can be reset right after the check in another
> thread (rp_thread).
This patchset makes a couple of followon cleanups now that
commits 13f934e79fa and 3a50c8f3067aaf are in master and our HTML
documentation has a footer to all pages stating the QEMU license
and version:
* it removes the TODO comments, because we've now done them
* three .rst files were rendering
Our built HTML documentation now has a standard footer which
gives the license for QEMU (and its documentation as a whole).
In almost all pages, we either don't bother to state the
copyright/license for the individual rST sources, or we put
it in an rST comment. There are just three pages which ren
Since commits 13f934e79fa and 3a50c8f3067aaf, our HTML docs include a
footer to all pages stating the license and version. We can
therefore delete the TODO comments suggesting we should do that from
our .rst files.
Signed-off-by: Peter Maydell
---
docs/interop/qemu-ga-ref.rst |
* Richard Henderson (richard.hender...@linaro.org) wrote:
> On 7/22/21 12:02 AM, Dr. David Alan Gilbert wrote:
> > Hi Richard,
> >I think you were the last person to fiddle with the prefetching
> > in buffer_zero_avx2 and friends; Joe (cc'd) wondered if explicit
> > prefetching still made sense
This patch adds the remote I2C device, which supports the usage of
external I2C devices.
Signed-off-by: Shengtan Mao
---
hw/arm/Kconfig| 1 +
hw/i2c/Kconfig| 4 +
hw/i2c/meson.build| 1 +
hw/i2c/remote-i2c.c | 117 ++
tes
This patch implements the remote I2C device.
The remote I2C device allows an external I2C device to communicate with the I2C
controller in QEMU through the remote I2C protocol.
Users no longer have to directly modify QEMU to add new I2C devices and can
instead implement the emulated device extern
On 7/22/21 12:02 AM, Dr. David Alan Gilbert wrote:
Hi Richard,
I think you were the last person to fiddle with the prefetching
in buffer_zero_avx2 and friends; Joe (cc'd) wondered if explicit
prefetching still made sense on modern CPUs, and that their hardware
generally figures stuff out bette
* Peter Xu (pet...@redhat.com) wrote:
> It's efficient, but hackish to call yank unregister calls in channel_close(),
> especially it'll be hard to debug when qemu crashed with some yank function
> leaked.
>
> Remove that hack, but instead explicitly unregister yank functions at the
> places where
Andrzej Zaborowski is listed as an "Odd Fixes" maintainer for the
nSeries, Palm and PXA2XX boards, as well as the "Maintained" status
Arm 32-bit TCG backend.
Andrzej's last email to qemu-devel was back in 2017, and the email
before that was all the way back in 2013. We don't really need to
fill h
It's efficient, but hackish to call yank unregister calls in channel_close(),
especially it'll be hard to debug when qemu crashed with some yank function
leaked.
Remove that hack, but instead explicitly unregister yank functions at the
places where needed, they are:
(on src)
- migrate_fd_clea
22.07.2021 15:26, Max Reitz wrote:
We largely have two cancel modes for jobs:
First, there is actual cancelling. The job is terminated as soon as
possible, without trying to reach a consistent result.
Second, we have mirror in the READY state. Technically, the job is not
really cancelled, but
Accessing from_dst_file is potentially racy in current code base like below:
if (s->from_dst_file)
do_something(s->from_dst_file);
Because from_dst_file can be reset right after the check in another
thread (rp_thread). One example is migrate_fd_cancel().
Use the same qemu_file_lock to pro
On 22/07/2021 19:49, Michael S. Tsirkin wrote:
> On Thu, Jul 22, 2021 at 06:59:45AM -0400, Igor Mammedov wrote:
...
>>
>> Fixes: 17858a169508609ca9063c544833e5a1adeb7b52
>
> use short hash and include subject within ("subject here") please
Tips:
some people use
.gitconfig
[pretty]
First, all jobs depending on 'docker-opensbi' job must use at most
all the rules that triggers it. The simplest way to ensure that is
to always use the same rules. Extract all the rules to a reusable
section, and include this section (with the 'extends' keyword) in
both 'docker-opensbi' and 'build-
It's possible that the migration thread skip the join() of the rp_thread in
below race and crash on src right at finishing migration:
migration_thread rp_thread
-
migration_completion()
v3:
- Use WITH_QEMU_LOCK_GUARD() for patch 2 [Eric]
(potentially I can also replace other existing uses of qemu_file_lock into
WITH_QEMU_LOCK_GUARD, but I decided to took Dave's r-b first and leave that
for later)
- Added r-bs for Dave on patch 2/4
- Add a comment in patch 5 to explain why
I would add a description: we want to scan all functions
not just function 0 to describe hotplug into bridges
at function != 0. in preparation for this, refactor code to not
skip functions != 0.
On Thu, Jul 22, 2021 at 06:59:44AM -0400, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov
> ---
>
* David Gibson (da...@gibson.dropbear.id.au) wrote:
> On Tue, Jul 20, 2021 at 07:30:16AM +0200, Markus Armbruster wrote:
> > "Dr. David Alan Gilbert" writes:
> >
> > > * Markus Armbruster (arm...@redhat.com) wrote:
> > >> We appear to use migration blockers in two ways:
> > >>
> > >> (1) Prevent
On Wed, Jul 21, 2021 at 09:14:31PM +0100, Alex Bennée wrote:
>
> Mathieu Poirier writes:
>
> > This patch provides the vhost-user backend implementation to work
> > in tandem with the vhost-user-rng implementation of the QEMU VMM.
> >
> > It uses the vhost-user API so that other VMM can re-use t
On 7/7/21 7:54 PM, isaku.yamah...@gmail.com wrote:
From: Xiaoyao Li
Reuse -cpu,tsc-frequency= to get user wanted tsc frequency and pass it
to KVM_TDX_INIT_VM.
Besides, sanity check the tsc frequency to be in the legal range and
legal granularity (required by SEAM module).
Signed-off-by: Xiaoy
On 7/22/21 5:49 PM, Daniel P. Berrangé wrote:
> On Tue, Jul 20, 2021 at 06:48:29PM +0200, Philippe Mathieu-Daudé wrote:
>> All jobs depending on 'docker-opensbi' job must use at most all
>> the rules that triggers it. The simplest way to ensure that
>> is to always use the same rules. Extract all t
migration uses QIOChannel typed qemufiles. In follow up patches, we'll need
the capability to identify this fact, so that we can get the backing QIOChannel
from a QEMUFile.
We can also define types for QEMUFile but so far since we only need to be able
to identify QIOChannel, introduce a boolean w
On 7/7/21 7:54 PM, isaku.yamah...@gmail.com wrote:
From: Xiaoyao Li
Invoke KVM_TDX_FINALIZEMR to finalize the TD's measurement and make
the TD vCPUs runnable once machine initialization is complete.
Signed-off-by: Xiaoyao Li
Signed-off-by: Isaku Yamahata
---
target/i386/kvm/kvm.c | 7
On 7/7/21 7:54 PM, isaku.yamah...@gmail.com wrote:
From: Xiaoyao Li
Introduce a machine property, kvm-type, to allow the user to create a
Trusted Domain eXtensions (TDX) VM, a.k.a. a Trusted Domain (TD), e.g.:
# $QEMU \
-machine ...,kvm-type=tdx \
...
Only two types are supp
22.07.2021 15:26, Max Reitz wrote:
Most callers of job_is_cancelled() actually want to know whether the job
is on its way to immediate termination. For example, we refuse to pause
jobs that are cancelled; but this only makes sense for jobs that are
really actually cancelled.
A mirror job that i
There're plenty of places in migration/* that checks against either socket or
tls typed ioc for yank operations. Provide two helpers to hide all these
information.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
---
migration/channel.c | 15 ++-
migration/mult
On 7/7/21 7:54 PM, isaku.yamah...@gmail.com wrote:
From: Isaku Yamahata
Make kvm_synchronize_all_tsc() nop for TD-guest.
s/nop/noop
TDX module specification, 9.11.1 TSC Virtualization
This appears in 9.12.1 of the latest revision as of this writing.
https://software.intel.com/content/da
On Thu, Jul 22, 2021 at 06:59:43AM -0400, Igor Mammedov wrote:
> For full description see 2/2.
> Tested hotplug on Q35 (see 2/2 for reproducer) and PC (with pci-bridge)
> machines
>
> Igor Mammedov (2):
> acpi: x86: pcihp: cleanup devfn usage in
> build_append_pci_bus_devices()
> acpi: x8
On 7/13/21 3:37 AM, Peter Maydell wrote:
+const int off[4] = { O1, O2, O3, O4 }; \
static? uint8_t?
Otherwise, with the help of your little print program, I can confirm that these offsets
match what the pseudocode produces. I hope this while beat execution t
On 7/7/21 7:55 PM, isaku.yamah...@gmail.com wrote:
From: Isaku Yamahata
Signed-off-by: Isaku Yamahata
---
include/sysemu/tdx.h | 1 +
target/i386/kvm/kvm.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/include/sysemu/tdx.h b/include/sysemu/tdx.h
index 70eb01348f..f3eced10f9 10
Add brief documentation of the Arm 'kzm' board.
Signed-off-by: Peter Maydell
---
docs/system/arm/kzm.rst| 18 ++
docs/system/target-arm.rst | 1 +
MAINTAINERS| 1 +
3 files changed, 20 insertions(+)
create mode 100644 docs/system/arm/kzm.rst
diff --git a/d
On 7/7/21 7:55 PM, isaku.yamah...@gmail.com wrote:
From: Isaku Yamahata
In TDX CPU state is also protected, thus vcpu state can't be reset by VMM.
It assumes -action reboot=shutdown instead of silently ignoring vcpu reset.
TDX module spec version 344425-002US doesn't support vcpu reset by VMM.
On 7/7/21 7:54 PM, isaku.yamah...@gmail.com wrote:
From: Isaku Yamahata
Introduce a new notifier, machine_init_done_late, that is notified after
machine_init_done. This will be used by TDX to generate the HOB for its
virtual firmware, which needs to be done after all guest memory has been
adde
On 7/7/21 7:54 PM, isaku.yamah...@gmail.com wrote:
From: Sean Christopherson
Expose x86_cpu_get_supported_feature_word() outside of cpu.c so that it
can be used by TDX to setup the VM-wide CPUID configuration.
Signed-off-by: Sean Christopherson
Signed-off-by: Isaku Yamahata
Reviewed-by: Co
Add brief documentation of the Arm 'mainstone' board.
Signed-off-by: Peter Maydell
---
docs/system/arm/mainstone.rst | 25 +
docs/system/target-arm.rst| 1 +
MAINTAINERS | 1 +
3 files changed, 27 insertions(+)
create mode 100644 docs/system/arm/m
On 7/7/21 7:54 PM, isaku.yamah...@gmail.com wrote:
From: Isaku Yamahata
Switch to making a VM ioctl() call for KVM_CAP_READONLY_MEM, which may
be conditional on VM type in recent versions of KVM, e.g. when TDX is
supported.
kvm_vm_check_extension() has fallback from kvm_vm_ioctl() to
kvm_check
This patchset adds brief documentation for another set of Arm
boards. As usual, people familiar with these boards are welcome
to provide more detail for the docs -- I just did the minimum
"name the board and list emulated devices identified from a
quick scan through the source code".
(After this w
Add brief documentation of the Arm 'imx25-pdk' board.
Signed-off-by: Peter Maydell
---
docs/system/arm/imx25-pdk.rst | 19 +++
docs/system/target-arm.rst| 1 +
MAINTAINERS | 1 +
3 files changed, 21 insertions(+)
create mode 100644 docs/system/arm/imx25-p
On Thu, Jul 22, 2021 at 06:59:45AM -0400, Igor Mammedov wrote:
> Commit 17858a1695 (hw/acpi/ich9: Set ACPI PCI hot-plug as default on Q35)
> switched PCI hotplug from native to ACPI one by default.
>
> That however breaks ihotplug on following CLI that used to work:
s/ihotplug/hotplug/ ?
>-n
We use new objects to have a dynamic administration of the CPU topology.
The highier level object is the S390 book. In a first implementation
we will have only a single S390 book.
The book is built as a SYSBUS bridge during the CPU initialisation.
Every object under this single book will be build
Just as information, the linux header update patch is inside the
Linux patch series.
Signed-off-by: Pierre Morel
---
linux-headers/linux/kvm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index bcaf66cc4d..38e96ea6f7 100644
--- a/linux
Hi,
This series is a first part of the implementation of CPU topology
for S390 greatly reduced from the first spin.
In particular, we reduced the scope to the S390x specificities, removing
all code touching to SMP or NUMA, with the goal to:
- facilitate review and acceptance
- let for later the S
On Thu, Jul 22, 2021 at 04:51:48PM +0200, David Hildenbrand wrote:
> I'll give it a churn.
Thanks, David.
--
Peter Xu
We define the CPU type Topology List Entry and the
Container type Topology List Entry to implement SYSIB 15.1.x
This patch will be squatched with the next patch.
Signed-off-by: Pierre Morel
---
target/s390x/cpu.h | 44
1 file changed, 44 insertions(+
The handling of STSI is enhenced with the interception of the
function code 15 for storing CPU topology.
Using the objects built during the pluging of CPU, we build the
SYSIB 15_1_x structures.
With this patch the maximum MNEST level is 2, this is also
the only level allowed and only SYSIB 15_1_2
Interception of the PTF instruction depending on the new
KVM_CAP_S390_CPU_TOPOLOGY KVM extension.
Signed-off-by: Pierre Morel
---
hw/s390x/s390-virtio-ccw.c | 45 ++
include/hw/s390x/s390-virtio-ccw.h | 7 +
target/s390x/kvm/kvm.c | 21 +++
On Thu, Jul 22, 2021 at 06:09:03PM +0100, Dr. David Alan Gilbert wrote:
> * Peter Xu (pet...@redhat.com) wrote:
> > On Thu, Jul 22, 2021 at 04:27:35PM +0100, Dr. David Alan Gilbert wrote:
> > > > @@ -3352,6 +3355,8 @@ static MigThrError postcopy_pause(MigrationState
> > > > *s)
> > > >
> > > >
On 7/22/21 5:36 PM, Paolo Bonzini wrote:
> The chardev-spicevmc class was not listed in chardev/spice.c, causing
> "-chardev spicevmc" to fail when modules are enabled.
>
> Reported-by: Frederic Bezies
> Fixes: 9f4a0f0978 ("modules: use modinfo for qom load", 2021-07-09)
> Resolves: //gitlab.com/
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