On Wed, Jul 14, 2021 at 5:04 AM Jason Wang wrote:
>
>
> 在 2021/6/1 下午4:15, Eugenio Perez Martin 写道:
> > On Mon, May 31, 2021 at 11:40 AM Jason Wang wrote:
> >>
> >> 在 2021/5/20 上午12:28, Eugenio Pérez 写道:
> >>> This tree is able to look for a translated address from a IOVA address.
> >>>
> >>> At
On Tue, Jul 13, 2021 at 8:44 PM Peter Maydell wrote:
>
> On Tue, 14 Jul 2020 at 01:44, Alistair Francis
> wrote:
> >
> > From: Atish Patra
> >
> > Currently, the fdt is copied to the ROM after the reset vector. The firmware
> > has to copy it to DRAM. Instead of this, directly copy the device t
On 08.07.2021 16:02, Denis Plotnikov wrote:
On 08.07.2021 15:04, Michael S. Tsirkin wrote:
On Thu, Jul 08, 2021 at 11:28:40AM +0300, Denis Plotnikov wrote:
On vhost-user-blk migration, qemu normally sends a number of commands
to enable logging if VHOST_USER_PROTOCOL_F_LOG_SHMFD is negotiated
Hi Michael,
qga-vss.dll has many dependencies. Please check that all DLLs are present
in the same directory.
Also, I have a similar problem in my setup. In my case, libgcc_s_seh-1.dll
was renamed in MinGW which I used.
Best wishes,
Kostiantyn Kostiuk
On Tue, Jul 13, 2021 at 9:40 PM Michael Rot
Hi Markus,
On 7/13/21 10:46 PM, Markus Armbruster wrote:
> Dongli Zhang writes:
>
>> This patch is to add the HMP interface to dump MSI-X table and PBA, in
>> order to help diagnose the loss of IRQ issue in VM (e.g., if an MSI-X
>> vector is erroneously masked permanently). Here is the example w
On 14/07/2021 00:10, Alex Williamson wrote:
On Tue, 13 Jul 2021 13:43:47 -0600
Alex Williamson wrote:
On Tue, 6 Jul 2021 12:01:37 +0200
Paolo Bonzini wrote:
Switch from QemuOpts to keyval. This enables the introduction
of non-scalar machine properties, and JSON syntax in the future.
For
On Tue, Jul 13, 2021 at 2:06 PM Anup Patel wrote:
>
> On Fri, Jul 9, 2021 at 9:01 AM Alistair Francis
> wrote:
> >
> > Instead of using riscv_cpu_update_mip() let's instead use the new RISC-V
> > CPU GPIO lines to set the timer and soft MIP bits.
> >
> > Signed-off-by: Alistair Francis
> > ---
>
From: Klaus Jensen
The new PMR test unearthed a long-standing issue with MMIO reads on
big-endian hosts.
Fix this by unconditionally storing all controller registers in little
endian.
Cc: Gollu Appalanaidu
Reported-by: Peter Maydell
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 300 +
On Wed, Jul 14, 2021 at 12:53 PM Jason Wang wrote:
>
>
> 在 2021/7/14 上午11:42, Bin Meng 写道:
> > On Wed, Jul 14, 2021 at 11:10 AM Jason Wang wrote:
> >>
> >> 在 2021/7/13 下午5:11, Bin Meng 写道:
> >>> On Tue, Jul 13, 2021 at 5:02 PM Jason Wang wrote:
> 在 2021/7/13 下午4:36, Bin Meng 写道:
> > On
From: Klaus Jensen
Add a regression test for mmio read on big-endian hosts.
Signed-off-by: Klaus Jensen
---
tests/qtest/nvme-test.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/tests/qtest/nvme-test.c b/tests/qtest/nvme-test.c
index 47e757d7e2af..f8bafb5d70fb
From: Klaus Jensen
Add the NvmeBarRegs enum and use these instead of explicit register
offsets.
Signed-off-by: Klaus Jensen
---
include/block/nvme.h | 29 -
hw/nvme/ctrl.c | 44 ++--
2 files changed, 50 insertions(+), 23
From: Klaus Jensen
Peter noticed that mmio access may read into the NvmeParams member in
the NvmeCtrl struct.
Fix the bounds check.
Reported-by: Peter Maydell
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 27 +++
1 file changed, 15 insertions(+), 12 deletions(-)
d
From: Klaus Jensen
Fix mmio read issues on big-endian hosts. The core issue is that values
in the BAR is not stored in little endian as required.
Fix that and add a regression test for this. This required a bit of
cleanup, so it blew up into a series.
v2:
* "hw/nvme: use symbolic names for r
From: Klaus Jensen
The specification uses a set of 32 bit PMRMSCL and PMRMSCU registers to
make up the 64 bit logical PMRMSC register.
Make it so.
Signed-off-by: Klaus Jensen
---
include/block/nvme.h | 31 ---
hw/nvme/ctrl.c | 9 +
2 files changed, 2
Some code in ui/spice used CONFIG_OPENGL for OpenGL conditionals, but
SPICE also depends on CONFIG_GBM and SPICE server whose version is
0.13.1 or later for OpenGL. Always use HAVE_SPICE_GL, which defines the
precise condition.
Signed-off-by: Akihiko Odaki
---
ui/spice-app.c | 3 ++-
ui/spice-c
ui/egl-headless is only built when CONFIG_OPENGL is defined because it
depends on CONFIG_OPENGL without condition. Remove a redundant
conditonal in ui/egl-headless.c
Signed-off-by: Akihiko Odaki
---
ui/egl-headless.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/ui/egl-headless.c b/ui/egl
Dongli Zhang writes:
> This patch is to add the HMP interface to dump MSI-X table and PBA, in
> order to help diagnose the loss of IRQ issue in VM (e.g., if an MSI-X
> vector is erroneously masked permanently). Here is the example with
> vhost-scsi:
>
> (qemu) info msix /machine/peripheral/vscsi0
Philippe Mathieu-Daudé writes:
> +Alex
>
> On 7/13/21 11:31 AM, Thomas Huth wrote:
>> A typo prevents that many features get disabled when the user
>> runs "configure" with the --without-default-features switch.
>>
>> Reported-by: Cole Robinson
>> Signed-off-by: Thomas Huth
>> ---
>> configur
On Jul 14 00:18, Philippe Mathieu-Daudé wrote:
> On 7/13/21 9:24 PM, Klaus Jensen wrote:
> > From: Klaus Jensen
> >
> > The new PMR test unearthed a long-standing issue with MMIO reads on
> > big-endian hosts.
> >
> > Fix this by unconditionally storing all controller registers in little
> > end
On Jul 14 00:21, Philippe Mathieu-Daudé wrote:
> On 7/14/21 12:12 AM, Philippe Mathieu-Daudé wrote:
> > On 7/13/21 9:24 PM, Klaus Jensen wrote:
> >> From: Klaus Jensen
> >>
> >> Add the NvmeBarRegs enum and use these instead of explicit register
> >> offsets.
> >>
> >> Signed-off-by: Klaus Jensen
Dear Sean,
Thanks for the comments!
> Heh, because the MMUs are all per-vCPU, it actually wouldn't be that much
> effort
> beyond supporting !TDP and TDP for different VMs...
>
Sorry, may I know what do you mean by "MMUs are all per-vCPU"? Do you
mean the MMUs walk the page tables of each vCPU
Dear Maxim,
Thanks for your reply!
> For same VM, I don't think it is feasable.
>
> For multiple VMs make some use NPT/EPT and some don't,
> this should be possible to implement.
>
> Why do you need it?
>
I am just curious about it :).
Best,
Harry
On Tuesday, July 13, 2021 11:59 PM, Peter Xu wrote:
> On Tue, Jul 13, 2021 at 08:40:21AM +, Wang, Wei W wrote:
>
> Didn't get a chance to document it as it's in a pull now; but as long as
> you're okay
> with no-per-page lock (which I still don't agree with), I can follow this up.
>
> Are be
On Tuesday, July 13, 2021 6:22 PM, David Hildenbrand wrote:
> Can you send an official patch for the free page hinting clean_bmap handling I
> reported?
>
> I can then give both tests in combination a quick test (before/after this
> patch
> here).
>
Yes, I'll send, thanks!
Best,
Wei
在 2021/7/14 上午11:42, Bin Meng 写道:
On Wed, Jul 14, 2021 at 11:10 AM Jason Wang wrote:
在 2021/7/13 下午5:11, Bin Meng 写道:
On Tue, Jul 13, 2021 at 5:02 PM Jason Wang wrote:
在 2021/7/13 下午4:36, Bin Meng 写道:
On Tue, Jul 13, 2021 at 3:03 PM Jason Wang wrote:
在 2021/7/13 上午7:06, Bin Meng 写道:
O
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
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devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1921082
Title:
VM crash wh
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1918084
Title:
Build fails
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1920211
Title:
shrink opti
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1918149
Title:
qemu-user r
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1920871
Title:
netperf UDP
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1921280
Title:
OpenIndiana
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1921444
Title:
Q35 doesn't
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1921635
Title:
ESP SCSI ad
On Wed, Jul 14, 2021 at 11:10 AM Jason Wang wrote:
>
>
> 在 2021/7/13 下午5:11, Bin Meng 写道:
> > On Tue, Jul 13, 2021 at 5:02 PM Jason Wang wrote:
> >>
> >> 在 2021/7/13 下午4:36, Bin Meng 写道:
> >>> On Tue, Jul 13, 2021 at 3:03 PM Jason Wang wrote:
> 在 2021/7/13 上午7:06, Bin Meng 写道:
> > On Mo
> The initial CPU count number is not required, if any of the topology
> options are given, since it can be computed.
>
> Reviewed-by: Andrew Jones
> Reviewed-by: Yanan Wang
> Signed-off-by: Daniel P. Berrangé
> ---
> qemu-options.hx | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
在 2021/7/13 下午5:11, Bin Meng 写道:
On Tue, Jul 13, 2021 at 5:02 PM Jason Wang wrote:
在 2021/7/13 下午4:36, Bin Meng 写道:
On Tue, Jul 13, 2021 at 3:03 PM Jason Wang wrote:
在 2021/7/13 上午7:06, Bin Meng 写道:
On Mon, Jul 5, 2021 at 1:57 PM Bin Meng wrote:
On Mon, Jul 5, 2021 at 12:21 PM Jason Wa
> The -smp option help is peculiarly specific about mentioning the CPU
> upper limits, but these are wrong. The "PC" target has varying max
> CPU counts depending on the machine type picked. Notes about guest
> OS limits are inappropriate for QEMU docs. There are way too many
> machine types for it
在 2021/6/1 下午4:15, Eugenio Perez Martin 写道:
On Mon, May 31, 2021 at 11:40 AM Jason Wang wrote:
在 2021/5/20 上午12:28, Eugenio Pérez 写道:
This tree is able to look for a translated address from a IOVA address.
At first glance is similar to util/iova-tree. However, SVQ working on
devices with l
> Reviewed-by: Andrew Jones
> Reviewed-by: Yanan Wang
> Signed-off-by: Daniel P. Berrangé
> ---
> docs/system/cpu-models-x86.rst.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/docs/system/cpu-models-x86.rst.inc
> b/docs/system/cpu-models-x86.rst.inc
> index f40ee0
> The list of CPU topology options are presented in a fairly arbitrary
> order currently. Re-arrange them so that they're ordered from largest to
> smallest unit
>
> Reviewed-by: Andrew Jones
> Reviewed-by: Yanan Wang
> Signed-off-by: Daniel P. Berrangé
> ---
> qemu-options.hx | 12 ++--
在 2021/7/12 下午6:35, Jonah Palmer 写道:
Dump the information of the head element of the third queue of
virtio-scsi:
(qemu) virtio queue-element
/machine/peripheral-anon/device[3]/virtio-backend 3
index: 122
ndescs: 3
descs: addr 0x7302d000 len 4096 (
在 2021/7/12 下午6:35, Jonah Palmer 写道:
+void hmp_virtio_queue_status(Monitor *mon, const QDict *qdict)
+{
+Error *err = NULL;
+const char *path = qdict_get_try_str(qdict, "path");
+int queue = qdict_get_int(qdict, "queue");
+VirtQueueStatus *s = qmp_x_debug_virtio_queue_status(pat
在 2021/7/12 下午6:35, Jonah Palmer 写道:
From: Laurent Vivier
This new command shows internal status of a VirtQueue.
(vrings and indexes).
Signed-off-by: Laurent Vivier
Signed-off-by: Jonah Palmer
---
hw/virtio/virtio-stub.c | 6 +++
hw/virtio/virtio.c | 37 ++
qapi
Gentle ping.
Add qemu-disc...@nongnu.org
On 7/9/21 5:27 PM, Xu, Yanfei wrote:
Hi experts，
When I used qemu6.0 to boot a VM, then I found that it will hang after I
execute "reboot" command. With a long time waiting, It didn't reboot and
leave the message as blow:
cut here---
在 2021/7/13 下午11:53, Michael S. Tsirkin 写道:
On Tue, Jul 13, 2021 at 10:34:50AM +0800, Jason Wang wrote:
On Mon, Jul 12, 2021 at 9:15 PM Michael S. Tsirkin wrote:
On Mon, Jul 12, 2021 at 01:44:45PM +0800, Jason Wang wrote:
在 2021/7/6 下午4:26, Jason Wang 写道:
Hi All:
This patch implements the
While the previous patch is to dump the MSI-X table, sometimes we may
need to dump device specific data, e.g., to help match the vector with
the specific device queue.
This patch is to add the PCI device specific interface to help dump
those information. Any PCI device class may implement this
PCI
This patch is to add the HMP interface to dump MSI-X table and PBA, in
order to help diagnose the loss of IRQ issue in VM (e.g., if an MSI-X
vector is erroneously masked permanently). Here is the example with
vhost-scsi:
(qemu) info msix /machine/peripheral/vscsi0
Msg L.Addr Msg U.Addr Msg Data
This patch is to implement the device specific interface to dump the
mapping between virtio queues and vectors.
(qemu) info msix -d /machine/peripheral/vscsi0
Msg L.Addr Msg U.Addr Msg Data Vect Ctrl
0xfee0 0x 0x4041 0x
0xfee0 0x 0x4051 0x
0xfee000
This is v3 to add msix_present() to pci-stub.c to avoid build error.
Changed since RFC v1:
- Add heading to MSI-X table (suggested by David Alan Gilbert)
- Add device specific interface, e.g., to dump virtio-pci queue-to-vector
mapping (Suggested By Jason)
Changed since v2:
- Add msix_p
On Tue, 13 Jul 2021 13:43:47 -0600
Alex Williamson wrote:
> On Tue, 6 Jul 2021 12:01:37 +0200
> Paolo Bonzini wrote:
>
> > Switch from QemuOpts to keyval. This enables the introduction
> > of non-scalar machine properties, and JSON syntax in the future.
> >
> > For JSON syntax to be supporte
From: Gustavo Noronha Silva
On Mac OS X the Option key maps to Alt and Command to Super/Meta. This change
swaps them around so that Alt is the key closer to the space bar and Meta/Super
is between Control and Alt, like on non-Mac keyboards.
It is a cocoa display option, disabled by default.
Ack
From: Gustavo Noronha Silva
Applications such as Gnome may use Alt-Tab and Super-Tab for different
purposes, some use Ctrl-arrows so we want to allow qemu to handle
everything when it captures the mouse/keyboard.
However, Mac OS handles some combos like Command-Tab and Ctrl-arrows
at an earlier
From: Gustavo Noronha Silva
v5 addresses the casting issue pointed out by Akihiko Odaki.
Sorry it took me so long to update the patches, but here
they are! Hopefully we can get them in now ;D
Btw I also changed my email address slightly (.dev.br
instead of .eti.br).
-
This series adds two
On 7/13/21 1:59 PM, Michael S. Tsirkin wrote:
> On Mon, Jul 12, 2021 at 04:58:09PM -0700, Dongli Zhang wrote:
>> I have just rebased the v2 patchset on top of most recent qemu to resend.
>>
>> This patch is to introduce the new HMP command to dump the MSI-X table/PBA.
>>
>> Here is the RFC v1:
>
On 7/14/21 12:12 AM, Philippe Mathieu-Daudé wrote:
> On 7/13/21 9:24 PM, Klaus Jensen wrote:
>> From: Klaus Jensen
>>
>> Add the NvmeBarRegs enum and use these instead of explicit register
>> offsets.
>>
>> Signed-off-by: Klaus Jensen
>> ---
>> include/block/nvme.h | 27 +
From: Mathieu Poirier
Add description and example for the vhost-user based RNG implementation.
Tailored on Viresh Kumar's vhost-user-i2c documentation.
Signed-off-by: Mathieu Poirier
Message-Id: <20210710005929.1702431-5-mathieu.poir...@linaro.org>
Reviewed-by: Michael S. Tsirkin
Signed-off-by
From: Julia Suvorova
All DSDT Q35 tables will be modified because ACPI hot-plug is enabled
by default.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
Reviewed-by: Marcel Apfelbaum
Message-Id: <20210713004205.775386-5-jus...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by:
On 7/13/21 9:24 PM, Klaus Jensen wrote:
> From: Klaus Jensen
>
> The new PMR test unearthed a long-standing issue with MMIO reads on
> big-endian hosts.
>
> Fix this by unconditionally storing all controller registers in little
> endian.
>
> Cc: Gollu Appalanaidu
> Reported-by: Peter Maydell
From: Julia Suvorova
Add ACPI hot-plug registers to DSDT Q35 tables.
Changes in the tables:
+Scope (_SB.PCI0)
+{
+OperationRegion (PCST, SystemIO, 0x0CC4, 0x08)
+Field (PCST, DWordAcc, NoLock, WriteAsZeros)
+{
+PCIU, 32,
+PCID, 32
+
On 7/13/21 9:24 PM, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Add the NvmeBarRegs enum and use these instead of explicit register
> offsets.
>
> Signed-off-by: Klaus Jensen
> ---
> include/block/nvme.h | 27 +++
> hw/nvme/ctrl.c | 44 ++-
From: Xingang Wang
Add a default_bus_bypass_iommu machine option to enable/disable
bypass_iommu for default root bus. The option is disabled by
default and can be enabled with:
$QEMU -machine virt,iommu=smmuv3,default_bus_bypass_iommu=true
Signed-off-by: Xingang Wang
Message-Id: <1625748919-524
From: Xingang Wang
This helps to get the min and max bus number of a PCI bus hierarchy.
Signed-off-by: Xingang Wang
Reviewed-by: Eric Auger
Message-Id: <1625748919-52456-6-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/h
From: Xingang Wang
Signed-off-by: Xingang Wang
Message-Id: <1625748919-52456-10-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
docs/bypass-iommu.txt | 89 +++
1 file changed, 89 insertions(+
From: Mathieu Poirier
Following in the footsteps of what whas done for vhost-user-i2c
and virtiofsd, introduce a random number generator (RNG) backend
that communicates with a vhost-user server to retrieve entropy.
That way another VMM could be using the same vhost-user daemon and
avoid having to
From: Xingang Wang
Add a bypass_iommu property for pci_expander_bridge, the property
is used to indicate whether pxb root bus will bypass iommu. By
default the bypass_iommu is disabled, and it can be enabled with:
qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true
Signed-off-by: Xingan
From: Xingang Wang
When we build IORT table with SMMUv3 and bypass iommu feature enabled,
we can no longer setup one map from RC to SMMUv3 covering the whole RIDs.
We need to walk the PCI bus and check whether the root bus will bypass
iommu, setup RC -> SMMUv3 -> ITS map for RC which will not byp
From: Arseny Krasnov
This adds processing of VIRTIO_VSOCK_F_SEQPACKET features bit. Guest
negotiates it with vhost, thus both will know that SOCK_SEQPACKET
supported by peer.
Signed-off-by: Arseny Krasnov
Message-Id: <20210622144747.2949134-1-arseny.kras...@kaspersky.com>
Reviewed-by: Stefano G
From: Peter Xu
The parameters of intel-iommu device are non-trivial to understand. Add an
entry for it so that people can reference to it when using.
There're actually a few more options there, but I hide them explicitly because
they shouldn't be used by normal QEMU users.
Cc: Chao Yang
Cc: L
From: Julia Suvorova
Add acpi_pcihp to ich9_pm as part of
'acpi-pci-hotplug-with-bridge-support' option. Set default to false.
Signed-off-by: Julia Suvorova
Signed-off-by: Marcel Apfelbaum
Reviewed-by: Igor Mammedov
Message-Id: <20210713004205.775386-3-jus...@redhat.com>
Reviewed-by: Michael
From: Xingang Wang
Check bypass_iommu to exclude the devices which will bypass iommu.
Signed-off-by: Xingang Wang
Message-Id: <1625748919-52456-9-git-send-email-wangxinga...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/i386/acpi-build.c | 2 +-
1 file
From: Viresh Kumar
This allows is to instantiate a vhost-user-i2c device as part of a PCI
bus. It is mostly boilerplate which looks pretty similar to the
vhost-user-fs-pci device.
Reviewed-by: Alex Bennée
Signed-off-by: Viresh Kumar
Message-Id:
<8a083eaa57d93feaab12acd1f94b225879212f20.162580
From: Xingang Wang
Add a default_bus_bypass_iommu pc machine option to enable/disable
bypass_iommu for default root bus. The option is disabled by default
and can be enabled with:
$QEMU -machine q35,default_bus_bypass_iommu=true
Signed-off-by: Xingang Wang
Message-Id: <1625748919-52456-5-git-se
The following changes since commit 708f50199b59476ec4b45ebcdf171550086d6292:
Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2021-07-09-v2' into
staging (2021-07-13 14:32:20 +0100)
are available in the Git repository at:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_
From: Xingang Wang
In DMAR table, the drhd is set to cover all PCI devices when intel_iommu
is on. To support bypass iommu feature, we need to walk the PCI bus with
bypass_iommu disabled and add explicit scope data in DMAR drhd structure.
/mnt/sdb/wxg/qemu-next/qemu/build/x86_64-softmmu/qemu-sys
From: Viresh Kumar
This creates the QEMU side of the vhost-user-i2c device which connects
to the remote daemon. It is based of vhost-user-fs code.
Signed-off-by: Viresh Kumar
Message-Id:
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/virtio/vhost-user-i2c.
From: Xingang Wang
Add a new bypass_iommu property for PCI host and use it to check
whether devices attached to the PCI root bus will bypass iommu.
In pci_device_iommu_address_space(), check the property and
avoid getting iommu address space for devices bypass iommu.
Signed-off-by: Xingang Wang
On Thu, Jul 8, 2021 at 8:50 AM John Snow wrote:
>
>
> On Fri, Jul 2, 2021 at 5:26 PM G S Niteesh Babu
> wrote:
>
>> Added a draft of AQMP TUI.
>>
>> Implements the follwing basic features:
>> 1) Command transmission/reception.
>> 2) Shows events asynchronously.
>> 3) Shows server status in the b
From: Julia Suvorova
Q35 has three different types of PCI devices hot-plug: PCIe Native,
SHPC Native and ACPI hot-plug. This patch changes the default choice
for cold-plugged bridges from PCIe Native to ACPI Hot-plug with
ability to use SHPC and PCIe Native for hot-plugged bridges.
This is a lis
From: Mathieu Poirier
This patch provides the vhost-user backend implementation to work
in tandem with the vhost-user-rng implementation of the QEMU VMM.
It uses the vhost-user API so that other VMM can re-use the interface
without having to write the driver again.
Signed-off-by: Mathieu Poirie
From: Mathieu Poirier
This patch provides a PCI bus interface to the vhost-user-rng backed.
The implentation is similar to what was done for vhost-user-i2c-pci and
vhost-user-fs-pci.
Signed-off-by: Mathieu Poirier
Message-Id: <20210710005929.1702431-3-mathieu.poir...@linaro.org>
Reviewed-by: Mi
Added dependencies for the upcoming AQMP TUI under the optional
'tui' group.
The same dependencies have also been added under the devel group
since no work around has been found for optional groups to imply
other optional groups.
Signed-off-by: G S Niteesh Babu
---
python/Pipfile.lock | 12
From: Julia Suvorova
Instead of changing the hot-plug type in _OSC register, do not
set the 'Hot-Plug Capable' flag. This way guest will choose ACPI
hot-plug if it is preferred and leave the option to use SHPC with
pcie-pci-bridge.
The ability to control hot-plug for each downstream port is reta
From: Julia Suvorova
Implement notifications and gpe to support q35 ACPI PCI hot-plug.
Use 0xcc4 - 0xcd7 range for 'acpi-pci-hotplug' io ports.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
Reviewed-by: Marcel Apfelbaum
Message-Id: <20210713004205.775386-2-jus...@redhat.com>
Review
GitLab: https://gitlab.com/niteesh.gs/qemu/-/commits/aqmp-tui-prototype-v1/
Based-on: <20210701041313.1696009-1-js...@redhat.com>
[PATCH 00/20] python: introduce Asynchronous QMP package
Updates in V2:
1) Moved loop related initialization to 'run' function in 'App' class
2) Added a module log
Add an entry point for aqmp-tui. This will allow it to be run from
the command line using "aqmp-tui localhost:1234"
More options available in the TUI can be found using "aqmp-tui -h"
Signed-off-by: G S Niteesh Babu
---
python/setup.cfg | 1 +
1 file changed, 1 insertion(+)
diff --git a/python/s
Add syntax highlighting for the incoming and outgoing QMP messages.
This is achieved using the pygments module which was added in a
previous commit.
The current implementation is a really simple one which doesn't
allow for any configuration. In future this has to be improved
to allow for easier th
Added pygments as optional dependency for AQMP TUI.
This is required for the upcoming syntax highlighting feature
in AQMP TUI.
The dependency has also been added in the devel optional group.
Added mypy 'ignore_missing_imports' for pygments since it does
not have any type stubs.
Signed-off-by: G S
Added a draft of AQMP TUI.
Implements the follwing basic features:
1) Command transmission/reception.
2) Shows events asynchronously.
3) Shows server status in the bottom status bar.
Also added necessary pylint, mypy configurations
Signed-off-by: G S Niteesh Babu
---
python/qemu/aqmp/aqmp_tui.
Disable missing-docstring and fixme pylint warnings.
This is because since the AQMP is just a prototype
it is currently not documented properly and lot
of todo and fixme's are still in place.
Signed-off-by: G S Niteesh Babu
---
python/setup.cfg | 2 ++
1 file changed, 2 insertions(+)
diff --git
all.tbl to Linux v5.13 (2021-07-13 13:59:59 +0200)
>
>
> Linux-user pull request 20210713
>
> Update headers to linux v5.13
> cleanup errno target headers
> Fix race condition on fd translation table
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/6.1
for any user-visible changes.
-- PMM
From: David Hildenbrand
CID 1458134: Integer handling issues (BAD_SHIFT)
In expression "1 << ctz64(container->pgsizes)", left shifting by more
than 31 bits has undefined behavior. The shift amount,
"ctz64(container->pgsizes)", is 64.
Commit 5e3b981c330c ("vfio: Support for RamDi
From: Cai Huoqing
Fix pba_offset initialization value for BAIDU KUNLUN Virtual
Function device. The KUNLUN hardware returns an incorrect
value for the VF PBA offset, and add a quirk to instead
return a hardcoded value of 0xb400.
Signed-off-by: Cai Huoqing
Link: https://lore.kernel.org/r/2021071
From: Cai Huoqing
Make use of vfio_pci_is() helper function.
Signed-off-by: Cai Huoqing
Link: https://lore.kernel.org/r/20210713014831.742-1-caihuoq...@baidu.com
[aw: commit log wording]
Signed-off-by: Alex Williamson
---
hw/vfio/pci.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions
The following changes since commit 961fef0ace0b2a997544deec2f01981b9c9c96e3:
Merge remote-tracking branch
'remotes/alistair/tags/pull-riscv-to-apply-20210712' into staging (2021-07-13
17:51:50 +0100)
are available in the Git repository at:
git://github.com/awilliam/qemu-vfio.git tags/vfio-
From: Wainer dos Santos Moschetta
The tests that are already tagged with "cpu:VALUE" don't need to add
"-cpu VALUE" to the list of arguments of the vm object because the avocado_qemu
framework is able to handle it automatically.
Reviewed-by: Cleber Rosa
Tested-by: Cleber Rosa
Reviewed-by: Will
The test contains methods for the proper log of test related
information. Let's use that and remove the print and the unused
logging import.
Reference:
https://avocado-framework.readthedocs.io/en/87.0/api/test/avocado.html#avocado.Test.log
Signed-off-by: Cleber Rosa
Message-Id: <20210415215141.
These tests' setUp do not do anything beyong what their base class do.
And while they do decorate the setUp() we can decorate the classes
instead, so no functionality is lost here.
This is possible because since Avocado 76.0 we can decorate setUp()
directly.
Signed-off-by: Cleber Rosa
Message-Id
From: Wainer dos Santos Moschetta
The set_vm_arg method is added to avocado_qemu.Test class on this
change. Use that method to set (or replace) an argument to the list of
arguments given to the QEMU binary.
Suggested-by: Cleber Rosa
Signed-off-by: Wainer dos Santos Moschetta
Reviewed-by: Willi
From: Philippe Mathieu-Daudé
Avocado allows us to select set of tests using tags.
When wanting to run all tests using a NetBSD guest OS,
it is convenient to have them tagged, add the 'os:netbsd'
tag.
It allows one to run the NetBSD tests with:
$ avocado --show=app,console run -t os:netbsd test
From: Wainer dos Santos Moschetta
Some test cases on x86_cpu_model_versions.py are corner cases because they
need to pass extra options to the -cpu argument. Once the avocado_qemu
framework will set -cpu automatically, the value should be reset. This changed
those tests so to call set_vm_arg() to
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