On 3/3/21 2:22 AM, Joel Stanley wrote:
> Test MTD images from the OpenBMC project on AST2400 and AST2500 SoCs
> from ASPEED, by booting Palmetto and Romulus BMC machines.
>
> The images are fetched from OpenBMC's release directory on github.
>
> Co-developed-by: Cédric Le Goater
> Signed-off-by:
On 3/3/21 2:22 AM, Joel Stanley wrote:
> This tests a Debian multi-soc arm32 Linux kernel on the AST2600 based
> Tacoma BMC machine.
>
> There is no root file system so the test terminates when boot reaches
> the stage where it attempts and fails to mount something.
because of that, the test alwa
On Feb 14 23:28, Minwoo Im wrote:
> Set CRDT1(Command Retry Delay Time 1) in the Identify controller data
> structure to milliseconds units of 100ms by the given value of
> 'cmd-retry-delay' parameter which is newly added. If
> cmd-retry-delay=1000, it will be set CRDT1 to 10. This patch only
> c
On Wed, 3 Mar 2021 at 07:28, Cédric Le Goater wrote:
>
> Firmware images can be found on the OpenBMC jenkins site and on the
> OpenBMC GitHub release page.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Firmware images can be found on the OpenBMC jenkins site and on the
OpenBMC GitHub release page.
Signed-off-by: Cédric Le Goater
---
docs/system/arm/aspeed.rst | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.r
On Tue, Mar 02, 2021 at 07:00:23PM +0100, Paolo Bonzini wrote:
> The functionality of -writeconfig is limited and the code
> does not even try to detect cases where it prints incorrect
> syntax (for example if values have a quote in them, since
> qemu_config_parse does not support any kind of escap
Hi,
> JACK clients with consumer purpose often auto connect to system ports by
> default because their users mostly use JACK just as a consumer desktop sound
> server. And I assume this applies to José as well.
Hmm, ok. I'd suggest to simply change the default for connect-ports
then, that'll
Quote docs/devel/style.rst (section "Automatic memory deallocation"):
* Variables declared with g_auto* MUST always be initialized,
otherwise the cleanup function will use uninitialized stack memory
Initialize @name properly to get rid of the compilation error:
../hw/remote/proxy.c: In functio
Add the hash and crypto engine model to the aspeed socs.
Signed-off-by: Joel Stanley
[ clg: documentation update ]
Signed-off-by: Cédric Le Goater
---
docs/system/arm/aspeed.rst | 2 +-
include/hw/arm/aspeed_soc.h | 3 +++
hw/arm/aspeed_ast2600.c | 14 ++
hw/arm/aspeed_soc.c
Hi,
> The only approaches I can think of to make type_register_mayfail()
> "work" involve adding a dependency check in type_register_internal()
> before the call to type_table_add() is made. This can "work" for modules,
> because for types loaded from we can hope, that all dependencies are
> alr
The HACE (Hash and Crpyto Engine) is a device that offloads MD5, SHA1,
SHA2, RSA and other cryptographic algorithms.
This initial model implements a subset of the device's functionality;
currently only direct access (non-scatter gather) hashing.
Signed-off-by: Joel Stanley
Signed-off-by: Cédric
This adds a model for the ASPEED hash and crypto engine (HACE) found on
all supported ASPEED SoCs.
The model uses Qemu's gcrypto API to perform the SHA and MD5 hashing
directly in the machine's emulated memory space, which I found a neat
use of Qemu's features.
It has been tested using u-boot and
On Tue, Mar 02, 2021 at 05:55:23PM +, Daniel P. Berrangé wrote:
> Currently the -audiodev accepts any audiodev type regardless of what is
> built in to QEMU. An error only occurs later at runtime when a sound
> device tries to use the audio backend.
>
> With this change QEMU will immediately r
Paolo Bonzini writes:
> The functionality of -writeconfig is limited and the code
> does not even try to detect cases where it prints incorrect
> syntax (for example if values have a quote in them, since
> qemu_config_parse does not support any kind of escaping)
> so remove it.
>
> Signed-off-by:
On 03/03/2021 03.44, Richard Henderson wrote:
If the CCO bit is set, MVPG should not generate an exception but
report page translation faults via a CC code.
Create a new helper, access_prepare_nf, which can use probe_access_flags
in non-faulting mode, and then handle watchpoints.
Cc: David Hild
** Description changed:
The issue is happening on all versions I tried after the following
commit. I can also remove this individual change from master and it
starts to work.
+
+ OVMF_CODE.fd is what comes with Ubuntu 20.04 through package manager.
+
git diff af1b80ae56c9495999e8ccf7b
** Description changed:
The issue is happening on all versions I tried after the following
- commit.
+ commit. I can also remove this individual from master and it starts to
+ work.
git diff af1b80ae56c9495999e8ccf7b70ef894378de642~
af1b80ae56c9495999e8ccf7b70ef894378de642
diff --git a/h
On 3/2/21 6:57 AM, Philippe Mathieu-Daudé wrote:
+static struct SysemuCPUOps alpha_sysemu_ops = {
const, for all of them.
r~
Patchew URL:
https://patchew.org/QEMU/161474788220.8516.15014999465847517073.malone...@gac.canonical.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 161474788220.8516.15014999465847517073.malone...@gac.canonical.co
Public bug reported:
The issue is happening on all versions I tried after the following
commit.
git diff af1b80ae56c9495999e8ccf7b70ef894378de642~
af1b80ae56c9495999e8ccf7b70ef894378de642
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b7bc2a..7a5a8b3521 100644
--- a/hw/i386/a
From: Zhang Chen
Use connection protocol,src port,dst port,src ip,dst ip as the key
to bypass certain network traffic in COLO compare.
Signed-off-by: Zhang Chen
---
net/net.c | 147 ++
1 file changed, 147 insertions(+)
diff --git a/net/net.c
From: Zhang Chen
Add passthrough list for each CompareState.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 25 +
net/colo-compare.h | 10 ++
2 files changed, 35 insertions(+)
diff --git a/net/colo-compare.c b/net/colo-compare.c
index a803f8b888..80cea32c20
From: Zhang Chen
Since the real user scenario does not need to monitor all traffic.
This series give user ability to bypass kinds of network stream.
V2:
- Add some qapi definitions.
- Support multi colo-compare objects.
- Support setup each rules for each objects individually.
From: Zhang Chen
Make other modules can reuse COLO code.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 106 -
net/colo-compare.h | 106 +
2 files changed, 106 insertions(+), 106 deletions(-)
diff --gi
From: Zhang Chen
Add hmp_colo_passthrough_add and hmp_colo_passthrough_del make user
can maintain COLO network passthrough list in human monitor.
Signed-off-by: Zhang Chen
---
hmp-commands.hx | 26 ++
include/monitor/hmp.h | 2 ++
monitor/hmp-cmds.c| 34 +
From: Zhang Chen
Add L4_Connection struct for other QMP commands.
Except protocol field is necessary, other fields are optional.
Signed-off-by: Zhang Chen
---
qapi/net.json | 26 ++
1 file changed, 26 insertions(+)
diff --git a/qapi/net.json b/qapi/net.json
index dc4c8
From: Zhang Chen
Add IP_PROTOCOL as enum include TCP,UDP, ICMP... for other QMP commands.
Signed-off-by: Zhang Chen
---
qapi/net.json | 30 ++
1 file changed, 30 insertions(+)
diff --git a/qapi/net.json b/qapi/net.json
index c31748c87f..dc4c87dc7b 100644
--- a/qapi
From: Zhang Chen
Since the real user scenario does not need COLO to monitor all traffic.
Add colo-passthrough-add and colo-passthrough-del to maintain
a COLO network passthrough list.
Signed-off-by: Zhang Chen
---
net/net.c | 10 ++
qapi/net.json | 40 ++
Hi Cedric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Monday, March 1, 2021 4:32 PM
> To: Sai Pavan Boddu ; Markus Armbruster
> ; Kevin Wolf ; Max Reitz
> ; Vladimir Sementsov-Ogievskiy
> ; Eric Blake ; Joel Stanley
> ; Vincent Palatin ; Dr. David Alan
> Gilbert ; Thomas Huth ;
Hi David,
> -Original Message-
> From: Dr. David Alan Gilbert
> Sent: Monday, March 1, 2021 4:12 PM
> To: Sai Pavan Boddu
> Cc: Markus Armbruster ; Kevin Wolf
> ; Max Reitz ; Vladimir Sementsov-
> Ogievskiy ; Eric Blake ;
> Joel Stanley ; Cédric Le Goater ; Vincent
> Palatin ; Thomas Hut
Guys, when I run with valgrind, I always get this when segfault occurs:
==74885== Invalid read of size 8
==74885==at 0x1DC87D: curl_multi_do (curl.c:410)
==74885==by 0x23B949: aio_dispatch_handler (aio-posix.c:329)
==74885==by 0x23C0A1: aio_dispatch_handlers (aio-posix.c:372)
==74885==
Since Linux 5.10, write zeros to a multipath device using
ioctl(fd, BLKZEROOUT, range) with cache none or directsync return -EBUSY
permanently.
Similar to handle_aiocb_write_zeroes_unmap, handle_aiocb_write_zeroes_block
allow -EBUSY and -EINVAL errors during ioctl(fd, BLKZEROOUT, range).
Referenc
On 2021/3/3 12:21 上午, David Hildenbrand wrote:
Similar to VFIO, vDPA will go ahead an map+pin all guest memory. Memory
that used to be discarded will get re-populated and if we
discard+re-access memory after mapping+pinning, the pages mapped into the
vDPA IOMMU will go out of sync with the actu
If the CCO bit is set, MVPG should not generate an exception but
report page translation faults via a CC code.
Create a new helper, access_prepare_nf, which can use probe_access_flags
in non-faulting mode, and then handle watchpoints.
Cc: David Hildenbrand
Reported-by: Thomas Huth
Signed-off-by
On 3/2/21 5:39 PM, Richard Henderson wrote:
+ok = probe_access_flags(env, vaddr1, access_type, mmu_idx,
+nofault, &haddr1, ra);
Bah, I confused myself and remembered the wrong interface.
Expect a v3.
r~
On 3/2/21 5:39 PM, Richard Henderson wrote:
If the CCO bit is set, MVPG should not generate an exception
but report page translation faults via a CC code. Create a new
helper, access_prepare_nf, which can use probe_access_flags in
non-faulting mode.
Cc: David Hildenbrand
Reported-by: Thomas Hut
If the CCO bit is set, MVPG should not generate an exception
but report page translation faults via a CC code. Create a new
helper, access_prepare_nf, which can use probe_access_flags in
non-faulting mode.
Cc: David Hildenbrand
Reported-by: Thomas Huth
Signed-off-by: Richard Henderson
---
tar
On Tue, Mar 02, 2021 at 10:13:19AM +0100, BALATON Zoltan wrote:
> On Tue, 2 Mar 2021, Philippe Mathieu-Daudé wrote:
> > On 2/25/21 8:47 PM, BALATON Zoltan wrote:
> > > Add new machine called pegasos2 emulating the Genesi/bPlan Pegasos II,
> > > a PowerPC board based on the Marvell MV64361 system co
Public bug reported:
1. Symptom
$ qemu-img create -f qcow2 disk.qcow2 10G
[1] 72373 killed qemu-img create -f qcow2 disk.qcow2 10G
2. System environment
CPU: Apple M1
OS: Big Sur 11.2.2
qemu: stable 5.2.0 (Binary installed by homebrew)
3. Kernel logs
$ sudo log show --predicate ‘eventMessage LI
This tests a Debian multi-soc arm32 Linux kernel on the AST2600 based
Tacoma BMC machine.
There is no root file system so the test terminates when boot reaches
the stage where it attempts and fails to mount something.
Signed-off-by: Joel Stanley
---
tests/acceptance/boot_linux_console.py | 26 +
This adds tests for the Aspeed ARM SoCs. The AST2400 and AST2500 tests
use OpenBMC images from that project, fetched from github releases. The
AST2600 test uses a Debian arm32 kernel.
Note that the ast2600 test will fail if [1] is not applied. I have
tested locally and all seems good.
I note that
Test MTD images from the OpenBMC project on AST2400 and AST2500 SoCs
from ASPEED, by booting Palmetto and Romulus BMC machines.
The images are fetched from OpenBMC's release directory on github.
Co-developed-by: Cédric Le Goater
Signed-off-by: Joel Stanley
---
tests/acceptance/boot_linux_conso
The ast2600 machines do not have PSCI firmware, so this property should
have never been set. Removing this node fixes SMP booting Linux kernels
that have PSCI enabled, as Linux fails to find PSCI in the device tree
and falls back to the soc-specific method for enabling secondary CPUs.
The comment
On 3/2/21 10:55 PM, Alex Williamson wrote:
> On Fri, 5 Feb 2021 18:18:17 +0100
> Philippe Mathieu-Daudé wrote:
>
>> Follow the inclusive terminology from the "Conscious Language in your
>> Open Source Projects" guidelines [*] and replace the word "blacklist"
>> appropriately.
>>
>> [*] https://g
On Fri, 4 Dec 2020 09:42:40 +0800
Zenghui Yu wrote:
> There is an obvious typo in the function name of the .log_sync() callback.
> Spell it correctly.
>
> Signed-off-by: Zenghui Yu
> ---
> hw/vfio/common.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/vfio/co
> Am 02.03.2021 um 22:46 schrieb Richard Henderson
> :
>
> On 3/2/21 11:25 AM, David Hildenbrand wrote:
>>> On 02.03.21 20:12, Thomas Huth wrote:
>>> If the CCO bit is set, MVPG should not generate an exception
>>> but report page translation faults via a CC code, so we have
>>> to check the t
Le 09/02/2021 à 20:30, Mark Cave-Ayland a écrit :
> The MacOS toolbox ROM performs 4 byte reads/writes when transferring data to
> and from the target. Since the SCSI bus is 16-bits wide, use the memory API
> to split a 4 byte access into 2 x 2 byte accesses.
>
> Signed-off-by: Mark Cave-Ayland
>
Le 09/02/2021 à 20:30, Mark Cave-Ayland a écrit :
> Now that all data is transferred via the FIFO (ti_buf) there is no need to
> track
> the source buffer being used for the data transfer. This also eliminates the
> need for a separate subsection for PDMA state migration.
>
> Signed-off-by: Mark
Le 09/02/2021 à 20:30, Mark Cave-Ayland a écrit :
> PDMA as implemented on the Quadra 800 uses DREQ to load data into the FIFO
> up to a maximum of 16 bytes at a time. The MacOS toolbox ROM requires this
> because it mixes FIFO and PDMA transfers whilst checking the FIFO status
> and counter regist
Le 09/02/2021 à 20:30, Mark Cave-Ayland a écrit :
> Currently the target selection for PDMA is done after the SCSI command has
> been
> delivered which is not correct. Perform target selection as part of the
> initial
> get_cmd() call when the command is submitted: if no target is present, don't
On Mon, 22 Feb 2021 09:26:17 +0100
Philippe Mathieu-Daudé wrote:
> ping?
>
> On 2/2/21 4:56 PM, Philippe Mathieu-Daudé wrote:
> > Signed-off-by: Philippe Mathieu-Daudé
> > ---
> > MAINTAINERS | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index bc
On Fri, 5 Feb 2021 18:18:17 +0100
Philippe Mathieu-Daudé wrote:
> Follow the inclusive terminology from the "Conscious Language in your
> Open Source Projects" guidelines [*] and replace the word "blacklist"
> appropriately.
>
> [*] https://github.com/conscious-lang/conscious-lang-docs/blob/mai
Le 09/02/2021 à 20:30, Mark Cave-Ayland a écrit :
> The cmdbuf is really just a copy of FIFO data (including extra message phase
> bytes) so its pdma_origin is effectively TI. Fortunately we already know when
> we are receiving a SCSI command since do_cmd == 1 which enables us to
> distinguish betw
Le 09/02/2021 à 20:30, Mark Cave-Ayland a écrit :
> This better describes the purpose of the function.
>
> Signed-off-by: Mark Cave-Ayland
> Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/scsi/esp.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/hw/scsi/esp
Le 09/02/2021 à 20:29, Mark Cave-Ayland a écrit :
> This eliminates the last user of the PDMA-specific pdma_cur variable which can
> now be removed.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/scsi/esp.c | 23 ---
> include/hw/scsi/esp.h | 1 -
> 2 files changed,
Le 09/02/2021 à 20:30, Mark Cave-Ayland a écrit :
> Real hardware simply counts down using the in-built TC to determine when the
> the PDMA request is complete. Use the TC to determine the PDMA transfer length
> which then enables us to remove the redundant pdma_len variable.
>
> Signed-off-by: Ma
On 3/2/21 11:25 AM, David Hildenbrand wrote:
On 02.03.21 20:12, Thomas Huth wrote:
If the CCO bit is set, MVPG should not generate an exception
but report page translation faults via a CC code, so we have
to check the translation in this case before calling the
access_prepare() function.
Signed
Le 09/02/2021 à 20:29, Mark Cave-Ayland a écrit :
> Here the updates to async_len and ti_size are moved into the corresponding
> esp_pdma_read()/esp_pdma_write() function to eliminate the reference to
> pdma_cur in do_dma_pdma_cb().
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/scsi/esp.c | 24
Note: this is using the rump ahci driver.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1917442
Title:
[AHCI] crash when running a GNU/Hurd guest
Status in QEMU:
New
Bug description:
QEMU git
On Tue, Mar 02, 2021 at 08:01:11PM +0100, David Hildenbrand wrote:
> On 02.03.21 18:51, Peter Xu wrote:
> > On Tue, Feb 09, 2021 at 02:49:38PM +0100, David Hildenbrand wrote:
> > > +#define OVERCOMMIT_MEMORY_PATH "/proc/sys/vm/overcommit_memory"
> > > +static bool map_noreserve_effective(int fd, bo
Found the following cpu feature bits missing from EPYC-Rome model.
ibrs: Indirect Branch Restricted Speculation
ssbd: Speculative Store Bypass Disable
These new features will be added in EPYC-Rome-v2. The -cpu help output
after the change.
x86 EPYC-Rome (alias configured by ma
Add new machine called pegasos2 emulating the Genesi/bPlan Pegasos II,
a PowerPC board based on the Marvell MV64361 system controller and the
VIA VT8231 integrated south bridge/superio chips. It can run Linux,
AmigaOS and a wide range of MorphOS versions. Currently a firmware ROM
image is needed to
To allow reusing ISA bridge emulation for vt8231_isa move the device
state of vt82c686b_isa emulation in an abstract via_isa class.
Signed-off-by: BALATON Zoltan
---
hw/isa/vt82c686.c| 70 ++--
include/hw/pci/pci_ids.h | 2 +-
2 files changed, 40 inse
The VT8231 south bridge is very similar to VT82C686B but there are
some differences in register addresses and functionality, e.g. the
VT8231 only has one serial port. This commit adds VT8231_SUPERIO
subclass based on the abstract VIA_SUPERIO class to emulate the
superio part of VT8231.
Signed-off-
From: Philippe Mathieu-Daudé
TYPE_VIA_PM calls apm_init() in via_pm_realize(), so
requires APM to be selected.
Reported-by: BALATON Zoltan
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: BALATON Zoltan
---
hw/isa/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/isa/Kconfig
MST/Marcel,
Do you have an Ack or objection to exporting msix_masked() as below?
Thanks,
Alex
On Tue, 23 Feb 2021 10:22:25 +0800
Shenming Lu wrote:
> In VFIO migration resume phase and some guest startups, there are
> already unmasked vectors in the vector table when calling
> vfio_msix_enab
The Marvell Discovery II aka. MV64361 is a PowerPC system controller
chip that is used on the pegasos2 PPC board. This adds emulation of it
that models the device enough to boot guests on this board. The
mv643xx.h header with register definitions is taken from Linux 4.15.10
only fixing white space
Add emulation of VT8231 south bridge ISA part based on the similar
VT82C686B but implemented in a separate subclass that holds the
differences while reusing parts that can be shared.
Signed-off-by: BALATON Zoltan
---
hw/isa/vt82c686.c | 84 +++
include
Collect superio functionality and its controlling config registers
handling in an abstract VIA_SUPERIO class that is a subclass of
ISA_SUPERIO and put vt82c686b specific parts in a subclass of this
abstract class.
Signed-off-by: BALATON Zoltan
---
hw/isa/vt82c686.c | 240
In VIA super south bridge the io ranges of superio components
(parallel and serial ports and FDC) can be controlled by superio
config registers to set their base address and enable/disable them.
This is not easy to implement in QEMU because ISA emulation is only
designed to set io base address once
Hello,
This is adding a new PPC board called pegasos2. More info on it can be
found at:
https://osdn.net/projects/qmiga/wiki/SubprojectPegasos2
Currently it needs a firmware ROM image that I cannot include due to
original copyright holder (bPlan) did not release it under a free
licence but I hav
Hello,
Le 02/03/2021 à 12:08, Paolo Bonzini a écrit :
> On 02/03/21 11:22, Thomas Huth wrote:
>> On 26/02/2021 23.07, Romain Naour wrote:
>>> tests/fp/fp-bench.c use fenv.h that is not always provided
>>> by the libc (uClibc).
>>
>> For such problem it might be better to check for the availabilit
Patchew URL:
https://patchew.org/QEMU/20210302204822.81901-1-dovmu...@linux.vnet.ibm.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210302204822.81901-1-dovmu...@linux.vnet.ibm.com
Subject: [RFC PATCH 00/26] Con
Le 09/02/2021 à 20:29, Mark Cave-Ayland a écrit :
> ESP SCSI commands are already accumulated in cmdbuf and so there is no need to
> keep a separate pdma_buf buffer. Accumulate SCSI commands for PDMA transfers
> in
> cmdbuf instead of pdma_buf so update cmdlen accordingly and change pdma_origin
>
On 3/2/21 6:55 PM, Daniel P. Berrangé wrote:
> Way back in QEMU 4.0, the -audiodev command line option was introduced
> for configuring audio backends. This CLI option does not use QemuOpts
> so it is not visible for introspection in 'query-command-line-options',
> instead using the QAPI Audiodev t
Le 09/02/2021 à 20:29, Mark Cave-Ayland a écrit :
> Now that PDMA SCSI commands are accumulated in cmdbuf in the same way as
> normal
> commands, the existing logic for locating the start of the SCSI command in
> cmdbuf via cmdlen can be used. This enables the PDMA-specific pdma_start and
> also g
Le 02/03/2021 à 20:29, Mark Cave-Ayland a écrit :
> On 02/03/2021 17:59, Laurent Vivier wrote:
>
>> Le 02/03/2021 à 18:34, Mark Cave-Ayland a écrit :
>>> On 02/03/2021 17:02, Laurent Vivier wrote:
>>>
Le 09/02/2021 à 20:29, Mark Cave-Ayland a écrit :
> ESP SCSI commands are already accumu
Aaron Lindsay writes:
> On Mar 02 16:06, Alex Bennée wrote:
>>
>> Aaron Lindsay writes:
>>
>> > On Feb 23 15:53, Aaron Lindsay wrote:
>> >> On Feb 22 15:48, Aaron Lindsay wrote:
>> >> > On Feb 22 19:30, Alex Bennée wrote:
>> >> > > Aaron Lindsay writes:
>> >> > > That said I think we could
On 3/2/21 10:10 PM, Philippe Mathieu-Daudé wrote:
> On 3/2/21 6:55 PM, Daniel P. Berrangé wrote:
>> Way back in QEMU 4.0, the -audiodev command line option was introduced
>> for configuring audio backends. This CLI option does not use QemuOpts
>> so it is not visible for introspection in 'query-com
On Tue, 2 Mar 2021, Philippe Mathieu-Daudé wrote:
On 2/25/21 8:47 PM, BALATON Zoltan wrote:
The Marvell Discovery II aka. MV64361 is a PowerPC system controller
chip that is used on the pegasos2 PPC board. This adds emulation of it
that models the device enough to boot guests on this board. The
This will be used during migration on the target.
Signed-off-by: Dov Murik
---
include/sysemu/cpus.h | 1 +
softmmu/cpus.c| 11 +++
2 files changed, 12 insertions(+)
diff --git a/include/sysemu/cpus.h b/include/sysemu/cpus.h
index 868f1192de..dc24e38254 100644
--- a/include/sys
On 3/2/21 6:55 PM, Daniel P. Berrangé wrote:
> If printing a QAPI schema object for debugging we get the classname and
> a hex value for the instance. With this change we instead get the
> classname and the human friendly name of the QAPI type instance.
>
> Signed-off-by: Daniel P. Berrangé
> ---
If auxiliary vcpus are defined, they are used for running the migration
helper inside the guest. We want to keep them running and not sync
their state.
This behaves exactly like cpu_synchronize_all_post_init() when there are
no auxiliary vcpus.
Signed-off-by: Dov Murik
---
migration/savevm.c |
On 3/2/2021 11:40 AM, Daniel P. Berrangé wrote:
The CFI protection is something I'd say is relevant to virtualization
use cases, not to emulation use cases
https://qemu-project.gitlab.io/qemu/system/security.html
IOW, the targets that are important to test are the ones where KVM
is availabl
On 3/2/21 1:14 PM, Cornelia Huck wrote:
On Mon, 1 Mar 2021 20:51:43 +0100
Eric Farman wrote:
A pwrite() call returns the number of bytes written (or -1 on error),
and vfio-ccw compares this number with the size of the region to
determine if an error had occurred or not. If they are equal,
On 02.03.21 21:54, Peter Xu wrote:
On Tue, Mar 02, 2021 at 08:02:34PM +0100, David Hildenbrand wrote:
@@ -174,12 +175,18 @@ void *qemu_ram_mmap(int fd,
size_t align,
bool readonly,
bool shared,
-bool is_pmem
When saving RAM pages of a confidential guest, check whether a page is
encrypted. If it is, ask the in-guest migration helper to encrypt the
page for transmission.
This relies on ability to track the encryption status of each page
according to guest's reports, and thus requires the relevant patch
Mark the last aux_cpus vcpus in the machine state's possible_cpus as
auxiliary.
Signed-off-by: Dov Murik
---
hw/i386/x86.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index 6329f90ef9..be23fad650 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -448,6 +44
On x86 machines, when initializing the CPUState structs, set the aux
flag to true for auxiliary vcpus.
Signed-off-by: Dov Murik
---
include/hw/i386/x86.h | 2 +-
hw/i386/x86.c | 8 ++--
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/include/hw/i386/x86.h b/include/hw/
On Tue, Mar 02, 2021 at 08:02:34PM +0100, David Hildenbrand wrote:
> > > @@ -174,12 +175,18 @@ void *qemu_ram_mmap(int fd,
> > > size_t align,
> > > bool readonly,
> > > bool shared,
> > > -bool is_pmem)
> > > +
The new page is linked from the main index, otherwise sphinx complains
that "document isn't included in any toctree"; I assume there would be a
better place for it in the documentation tree.
Signed-off-by: Dov Murik
---
docs/confidential-guest-live-migration.rst | 142 +
docs
From: Tobin Feldman-Fitzthum
Signed-off-by: Tobin Feldman-Fitzthum
Signed-off-by: Dov Murik
---
migration/ram.c | 8
1 file changed, 8 insertions(+)
diff --git a/migration/ram.c b/migration/ram.c
index 82a1d13f5f..ce551c1d2f 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -3054
From: Tobin Feldman-Fitzthum
Co-Author: Dov Murik
Signed-off-by: Dov Murik
Signed-off-by: Tobin Feldman-Fitzthum
---
migration/migration.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/migration/migration.c b/migration/migration.c
index a5ddf43559..7ec25bd0
Register a dummy device state (EndOfConfidentialRAMState) with high
priority so it is the first device which is loaded in the target. The
post_load handler of this device stops the VM, which makes things easier
when loading devices' states which expect the VM not to be running at
the same time.
S
This is an RFC series for fast migration of confidential guests using an
in-guest migration helper that lives in OVMF. QEMU VM live migration
needs to read source VM's RAM and write it in the target VM; this
mechanism doesn't work when the guest memory is encrypted or QEMU is
prevented from readin
The post_load function crashed when we were loading the device state in
to an already-running guest. This was because an existing memory region
as not deleted in ich9_lpc_rcba_update.
Signed-off-by: Dov Murik
---
hw/isa/lpc_ich9.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --
QEMU cannot write directly to the memory of memory-encrypted guests;
this breaks normal RAM-load in the migration target. Instead, QEMU
asks a migration helper running on an auxiliary vcpu in the guest to
restore encrypted pages as they were received from the source to a
specific GPA.
The migrati
This command forces a running VM into a migrate-incoming state. When
using guest-assisted migration (for confidential guests), the target
must be started so that its auxiliary vcpu is running the migration
helper; after it is ready we can start receiving the incoming migration
connection.
Signed-
The gpa_inside_migration_helper_shared_area will be used to skip
migrating RAM pages that are used by the migration helper at the target.
Signed-off-by: Dov Murik
---
migration/confidential-ram.h | 2 ++
migration/confidential-ram.c | 6 ++
2 files changed, 8 insertions(+)
diff --git a/migr
If confidential guest support is active, set TSC to 0 on the target when
loading the CPU state. This causes the guest OS to re-sync with
kvm-clock.
Without this change, the guest clocks after migration are stuck (don't
advance), except the *_COARSE clocks which advance normally.
Signed-off-by: D
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