Re: [PATCH v3 02/24] tcg/tci: Remove TCG_TARGET_HAS_* ifdefs

Am 30.01.21 um 07:47 schrieb Richard Henderson: On 1/29/21 1:16 PM, Peter Maydell wrote: On Fri, 29 Jan 2021 at 20:13, Richard Henderson wrote: The opcodes always exist, regardless of whether or not they are enabled. Remove the unnecessary ifdefs. Signed-off-by: Richard Henderson --- tcg

Re: [PATCH v3 04/24] tcg/i386: Tidy register constraint definitions

On 1/29/21 1:20 PM, Peter Maydell wrote: > On Fri, 29 Jan 2021 at 20:14, Richard Henderson > wrote: >> >> Create symbolic constants for all low-byte-addressable >> and second-byte-addressable registers. Create a symbol >> for the registers that need reserving for softmmu. >> >> There is no functi

Re: [PATCH v3 02/24] tcg/tci: Remove TCG_TARGET_HAS_* ifdefs

On 1/29/21 1:16 PM, Peter Maydell wrote: > On Fri, 29 Jan 2021 at 20:13, Richard Henderson > wrote: >> >> The opcodes always exist, regardless of whether or not they >> are enabled. Remove the unnecessary ifdefs. >> >> Signed-off-by: Richard Henderson >> --- >> tcg/tci/tcg-target.c.inc | 82 ---

Re: [PATCH] vfio/migrate: Move switch of dirty tracking into vfio_memory_listener

Hi Kirti, On 2021/1/28 5:03, Kirti Wankhede wrote: > > > On 1/11/2021 1:04 PM, Keqian Zhu wrote: >> For now the switch of vfio dirty page tracking is integrated into >> the vfio_save_handler, it causes some problems [1]. >> > > Sorry, I missed [1] mail, somehow it didn't landed in my inbox. >

Re: [PATCH v3] tcg: Fix execution on Apple Silicon

On 1/29/21 10:50 AM, Roman Bolshakov wrote: > On Fri, Jan 29, 2021 at 10:18:58AM -1000, Richard Henderson wrote: >> On 1/21/21 8:34 AM, Richard Henderson wrote: >>> On 1/12/21 5:28 PM, Roman Bolshakov wrote: @@ -1083,6 +1083,12 @@ static bool alloc_code_gen_buffer_anon(size_t size, int p

[PATCH v2] hw/arm/smmuv3: Fix addr_mask for range-based invalidation

When handling guest range-based IOTLB invalidation, we should decode the TG field into the corresponding translation granule size so that we can pass the correct invalidation range to backend. Set @granule to (tg * 2 + 10) to properly emulate the architecture. Fixes: d52915616c05 ("hw/arm/smmuv3:

Detecting Faulting Instructions From Plugins

Hello, I appear to be seeing that if I register a callback for an instruction via `qemu_plugin_register_vcpu_insn_exec_cb` I receive a callback even if the instruction faults. For example, if an instruction attempts to load memory from a page which isn't currently mapped by the OS, I receive two c

[PATCH 1/3] hw/arm/Kconfig: Add missing dependency STM32F405 -> OR_IRQ

The STM32F405 SoC uses an OR gate on its ADC IRQs. Fixes: 529fc5fd3e1 ("hw/arm: Add the STM32F4xx SoC") Signed-off-by: Philippe Mathieu-Daudé --- Cc: alist...@alistair23.me --- hw/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 13cc42dcc84..a

[PATCH 3/3] hw/arm: Display CPU type in machine description

Most of ARM machines display their CPU when QEMU list the available machines (-M help). Some machines do not. Fix to unify the help output. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/digic_boards.c | 2 +- hw/arm/microbit.c | 2 +- hw/arm/netduino2.c | 2 +- hw/arm/netduinoplus2.

[PATCH 0/3] hw/arm: Misc trivial fixes/cleanups

A pair of bugfixes and cleanup patches noticed while rebasing my "Support disabling TCG on ARM (part 2)" series. Philippe Mathieu-Daudé (3): hw/arm/Kconfig: Add missing dependency STM32F405 -> OR_IRQ hw/arm/Kconfig: Add missing dependency EXYNOS4210 -> OR_IRQ hw/arm: Display CPU type in mach

[PATCH v5 10/11] target/arm: Do not build TCG objects when TCG is off

From: Samuel Ortiz We can now safely turn all TCG dependent build off when CONFIG_TCG is off. This allows building ARM binaries with --disable-tcg. Signed-off-by: Samuel Ortiz [PMD: Heavily rebased during more than 2 years then finally rewritten] Reviewed-by: Richard Henderson Signed-off-by: P

[PATCH v5 11/11] .travis.yml: Add a KVM-only Aarch64 job

From: Philippe Mathieu-Daudé Add a job to build QEMU on Aarch64 with TCG disabled, so this configuration won't bitrot over time. We explicitly modify default-configs/aarch64-softmmu.mak to only select the 'virt' and 'SBSA-REF' machines. Signed-off-by: Philippe Mathieu-Daudé --- Job ran for 7 m

[PATCH v5 07/11] target/arm: Restrict ARMv7 M-profile cpus to TCG accel

A KVM-only build won't be able to run M-profile cpus. Only enable the following ARMv7 M-Profile CPUs when TCG is available: - Cortex-M0 - Cortex-M3 - Cortex-M4 - Cortex-M33 The following machines are no more built when TCG is disabled: - emcraft-sf2 SmartFusion2 SOM kit from

[PATCH v5 04/11] target/arm: Restrict ARMv5 cpus to TCG accel

KVM requires a cpu based on (at least) the ARMv7 architecture. Only enable the following ARMv5 CPUs when TCG is available: - ARM926 - ARM946 - ARM1026 - XScale (PXA250/255/260/261/262/270) The following machines are no more built when TCG is disabled: - akitaSharp SL-C

[PATCH v5 06/11] target/arm: Restrict ARMv7 R-profile cpus to TCG accel

A KVM-only build won't be able to run R-profile cpus. Only enable the following ARMv7 R-Profile CPUs when TCG is available: - Cortex-R5 - Cortex-R5F The following machine is no more built when TCG is disabled: - xlnx-zcu102 Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs Signe

[PATCH v5 02/11] default-configs: Remove unnecessary SEMIHOSTING selection

Commit 56b5170c87e ("semihosting: Move ARM semihosting code to shared directories") selected ARM_COMPATIBLE_SEMIHOSTING which already selects SEMIHOSTING. No need to select it again. Signed-off-by: Philippe Mathieu-Daudé --- default-configs/devices/arm-softmmu.mak | 1 - 1 file changed, 1 deleti

[PATCH 2/3] hw/arm/Kconfig: Add missing dependency EXYNOS4210 -> OR_IRQ

The Exynos4210 SoC uses an OR gate on the PL330 IRQ lines. Fixes: dab15fbe2ab ("hw/arm/exynos4210: Fix DMA initialization") Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index a320a124855..223016bb4e8

[PATCH v5 05/11] target/arm: Restrict ARMv6 cpus to TCG accel

KVM requires a cpu based on (at least) the ARMv7 architecture. Only enable the following ARMv6 CPUs when TCG is available: - ARM1136 - ARM1176 - ARM11MPCore - Cortex-M0 The following machines are no more built when TCG is disabled: - kzm ARM KZM Emulation Baseboard (A

[PATCH v5 01/11] exec: Restrict TCG specific headers

Fixes when building with --disable-tcg: In file included from target/arm/helper.c:16: include/exec/helper-proto.h:42:10: fatal error: tcg-runtime.h: No such file or directory 42 | #include "tcg-runtime.h" | ^~~ Signed-off-by: Philippe Mathieu-Daudé --- inc

[PATCH v5 09/11] target/arm: Reorder meson.build rules

From: Philippe Mathieu-Daudé Reorder the rules to make this file easier to modify. No logical change introduced in this commit. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/arm/meson.build | 19 --- 1 file changed, 12 insertions(+), 7 deletio

[PATCH v5 08/11] target/arm: Make m_helper.c optional via CONFIG_ARM_V7M

From: Thomas Huth We've already got the CONFIG_ARM_V7M switch, but it currently can not be disabled yet. The m_helper.c code should not be compiled into the binary if the switch is not enabled. We also have to provide some stubs in a separate file to make sure that we still can link the other cod

[PATCH v5 03/11] target/arm: Restrict ARMv4 cpus to TCG accel

KVM requires a cpu based on (at least) the ARMv7 architecture. Only enable the following ARMv4 CPUs when TCG is available: - StrongARM (SA1100/1110) - OMAP1510 (TI925T) The following machines are no more built when TCG is disabled: - cheetah Palm Tungsten|E aka. Cheetah PDA (

[PATCH v5 00/11] Support disabling TCG on ARM (part 2)

Cover from Samuel Ortiz from (part 1) [1]: This patchset allows for building and running ARM targets with TCG disabled. [...] The rationale behind this work comes from the NEMU project where we're trying to only support x86 and ARM 64-bit architectures, without including the TCG code ba

Re: [PATCH v3 23/24] tcg/tci: Split out constraint sets to tcg-target-con-set.h

On Fri, 29 Jan 2021 at 20:26, Richard Henderson wrote: > > This requires finishing the conversion to tcg_target_op_def. > > Signed-off-by: Richard Henderson > --- > tcg/tci/tcg-target-con-set.h | 25 > tcg/tci/tcg-target.h | 2 + > tcg/tci/tcg-target.c.inc | 279 +

Re: [PATCH v3 13/24] tcg/sparc: Split out target constraints to tcg-target-con-str.h

On Fri, 29 Jan 2021 at 20:25, Richard Henderson wrote: > > Signed-off-by: Richard Henderson > --- > tcg/sparc/tcg-target-con-str.h | 23 ++ > tcg/sparc/tcg-target.h | 5 +-- > tcg/sparc/tcg-target.c.inc | 81 +- > 3 files changed, 55 insertion

Re: [PATCH v3 11/24] tcg/riscv: Split out target constraints to tcg-target-con-str.h

On Fri, 29 Jan 2021 at 20:23, Richard Henderson wrote: > > Signed-off-by: Richard Henderson > --- > tcg/riscv/tcg-target-con-str.h | 21 ++ > tcg/riscv/tcg-target.h | 1 + > tcg/riscv/tcg-target.c.inc | 52 +- > 3 files changed, 35 inserti

Re: [PATCH v3 05/24] tcg/i386: Split out target constraints to tcg-target-con-str.h

On Fri, 29 Jan 2021 at 20:17, Richard Henderson wrote: > > This eliminates the target-specific function target_parse_constraint > and folds it into the single caller, process_op_defs. Since this is > done directly into the switch statement, duplicates are compilation > errors rather than silently

Re: [PATCH v3 04/24] tcg/i386: Tidy register constraint definitions

On Fri, 29 Jan 2021 at 20:14, Richard Henderson wrote: > > Create symbolic constants for all low-byte-addressable > and second-byte-addressable registers. Create a symbol > for the registers that need reserving for softmmu. > > There is no functional change for 's', as this letter is > only used

Re: [PATCH v3 02/24] tcg/tci: Remove TCG_TARGET_HAS_* ifdefs

On Fri, 29 Jan 2021 at 20:13, Richard Henderson wrote: > > The opcodes always exist, regardless of whether or not they > are enabled. Remove the unnecessary ifdefs. > > Signed-off-by: Richard Henderson > --- > tcg/tci/tcg-target.c.inc | 82 > 1 file chan

Re: [PATCH v3 03/24] tcg/i386: Move constraint type check to tcg_target_const_match

On Fri, 29 Jan 2021 at 20:13, Richard Henderson wrote: > > Rather than check the type when filling in the constraint, > check it when matching the constant. This removes the only > use of the type argument to target_parse_constraint. > > Signed-off-by: Richard Henderson > --- > tcg/i386/tcg-tar

RE: [PATCH v7 12/35] Hexagon (target/hexagon) instruction attributes

> -Original Message- > From: Philippe Mathieu-Daudé On > Behalf Of Philippe Mathieu-Daudé > Sent: Monday, January 25, 2021 10:21 AM > To: Taylor Simpson ; qemu-devel@nongnu.org; > Paolo Bonzini > Cc: a...@rev.ng; alex.ben...@linaro.org; richard.hender...@linaro.org; > laur...@vivier.eu;

Re: [PULL 00/13] Misc patches

On Fri, 29 Jan 2021 at 17:27, Daniel P. Berrangé wrote: > > The following changes since commit 5101d00d2f1138a73344dc4833587f76d7a5fa5c: > > Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-p= > ull-request' into staging (2021-01-29 10:10:43 +) > > are available in t

Re: [PATCH v2 1/2] pci: reject too large ROMs

On Fri, Jan 29, 2021 at 08:28:37PM +0100, Paolo Bonzini wrote: > get_image_size() returns an int64_t, which pci_add_option_rom() assigns > to an "int" without any range checking. A 32-bit BAR could be up to > 2 GiB in size, so reject anything above it. In order to accomodate > a rounded-up size o

[RFC 09/10] vhost: Route guest->host notification through shadow virtqueue

Shadow virtqueue notifications forwarding is disabled when vhost_dev stops. Signed-off-by: Eugenio Pérez --- hw/virtio/vhost-shadow-virtqueue.h | 5 ++ include/hw/virtio/vhost.h | 4 + hw/virtio/vhost-shadow-virtqueue.c | 123 +- hw/virtio/vhost.c

[RFC 08/10] vhost: Add x-vhost-enable-shadow-vq qmp

Command to enable shadow virtqueue looks like: { "execute": "x-vhost-enable-shadow-vq", "arguments": { "name": "dev0", "enable": true } } Signed-off-by: Eugenio Pérez --- qapi/net.json | 23 +++ hw/virtio/vhost.c | 6 ++ 2 files changed, 29 insertions(+) diff --gi

[RFC 06/10] vhost: Save masked_notifier state

It will be used to recover call eventfd. Signed-off-by: Eugenio Pérez --- include/hw/virtio/vhost.h | 1 + hw/virtio/vhost.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/include/hw/virtio/vhost.h b/include/hw/virtio/vhost.h index fca076e3f0..2be782cefd 100644 --- a/include/hw/v

[RFC 04/10] virtio: Add virtio_queue_host_notifier_status

Signed-off-by: Eugenio Pérez --- include/hw/virtio/virtio.h | 1 + hw/virtio/virtio.c | 5 + 2 files changed, 6 insertions(+) diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h index 9013c03424..c5fcd9b169 100644 --- a/include/hw/virtio/virtio.h +++ b/include/hw/vir

[RFC 10/10] vhost: Route host->guest notification through shadow virtqueue

Signed-off-by: Eugenio Pérez --- hw/virtio/vhost-shadow-virtqueue.h | 2 ++ hw/virtio/vhost-shadow-virtqueue.c | 55 ++ hw/virtio/vhost.c | 5 ++- 3 files changed, 61 insertions(+), 1 deletion(-) diff --git a/hw/virtio/vhost-shadow-virtqueue.h b/hw

[RFC 07/10] vhost: Add VhostShadowVirtqueue

Vhost shadow virtqueue is an intermediate jump for virtqueue notifications and buffers, allowing qemu to track them. Signed-off-by: Eugenio Pérez --- hw/virtio/vhost-shadow-virtqueue.h | 24 hw/virtio/vhost-shadow-virtqueue.c | 60 ++ hw/virtio/meson.buil

[RFC 05/10] vhost: Add vhost_dev_from_virtio

Signed-off-by: Eugenio Pérez --- include/hw/virtio/vhost.h | 1 + hw/virtio/vhost.c | 17 + 2 files changed, 18 insertions(+) diff --git a/include/hw/virtio/vhost.h b/include/hw/virtio/vhost.h index 4a8bc75415..fca076e3f0 100644 --- a/include/hw/virtio/vhost.h +++ b/incl

[RFC 02/10] virtio: Add set_vq_handler

So other subsystem can override vq handler and device can reset it. Signed-off-by: Eugenio Pérez --- include/hw/virtio/virtio.h | 5 + hw/net/virtio-net.c| 26 ++ 2 files changed, 31 insertions(+) diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/v

[RFC 03/10] virtio: Add virtio_queue_get_idx

Signed-off-by: Eugenio Pérez --- include/hw/virtio/virtio.h | 2 ++ hw/virtio/virtio.c | 5 + 2 files changed, 7 insertions(+) diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h index 9988c6d5c9..9013c03424 100644 --- a/include/hw/virtio/virtio.h +++ b/include/hw/vi

[RFC 00/10] vDPA shadow virtqueue - notifications forwarding

This series enable vhost (And vhost-vdpa) notifications forwarding for software assisted live migration, implemented through a shadow virtqueue. Shadow virtqueue is a new method of tracking memory for migration: Instead of relay on vDPA device's dirty logging capability, SW assisted LM intercepts

[RFC 01/10] virtio: Add virtqueue_set_handler

This allows qemu to override vq handler. Signed-off-by: Eugenio Pérez --- include/hw/virtio/virtio.h | 6 +++--- hw/virtio/virtio.c | 14 ++ 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h index b7ece7a6

Re: [PATCH v3] tcg: Fix execution on Apple Silicon

On Fri, Jan 29, 2021 at 10:18:58AM -1000, Richard Henderson wrote: > On 1/21/21 8:34 AM, Richard Henderson wrote: > > On 1/12/21 5:28 PM, Roman Bolshakov wrote: > >> @@ -1083,6 +1083,12 @@ static bool alloc_code_gen_buffer_anon(size_t size, > >> int prot, > >> { > >> void *buf; > >> > >> +

Re: [PATCH v3 00/24] tcg: backend constraints cleanup

Patchew URL: https://patchew.org/QEMU/20210129201028.787853-1-richard.hender...@linaro.org/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20210129201028.787853-1-richard.hender...@linaro.org Subject: [PATCH v3 00/24]

[PATCH v3 24/24] tcg: Remove TCG_TARGET_CON_SET_H

All backends have now been converted to tcg-target-con-set.h, so we can remove the fallback code. Reviewed-by: Peter Maydell Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 1 - tcg/arm/tcg-target.h | 1 - tcg/i386/tcg-target.h| 1 - tcg

[PATCH v3 21/24] tcg/s390: Split out constraint sets to tcg-target-con-set.h

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/s390/tcg-target-con-set.h | 29 tcg/s390/tcg-target.h | 1 + tcg/s390/tcg-target.c.inc | 121 ++ 3 files changed, 81 insertions(+), 70 deletions(-) create mode 100644 tcg/

Re: [PATCH v3] tcg: Fix execution on Apple Silicon

On 1/21/21 8:34 AM, Richard Henderson wrote: > On 1/12/21 5:28 PM, Roman Bolshakov wrote: >> @@ -1083,6 +1083,12 @@ static bool alloc_code_gen_buffer_anon(size_t size, >> int prot, >> { >> void *buf; >> >> +#if defined(MAC_OS_VERSION_11_0) && \ >> +MAC_OS_X_VERSION_MAX_ALLOWED >= MAC_O

[PATCH v3 17/24] tcg/arm: Split out constraint sets to tcg-target-con-set.h

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/arm/tcg-target-con-set.h | 35 ++ tcg/arm/tcg-target.h | 1 + tcg/arm/tcg-target.c.inc | 94 3 files changed, 68 insertions(+), 62 deletions(-) create mode 100644 tc

Re: [PATCH v2 2/2] pci: add romsize property

On 29/01/21 21:06, BALATON Zoltan wrote: The empty property value configures the device not to have a ROM file at all. The commit message says that ROM files (if they exist) cannot be empty, corresponding to this code in pci_add_option_rom:    } else if (size == 0) {    error_setg(errp, "r

[PATCH v3 16/24] tcg/aarch64: Split out constraint sets to tcg-target-con-set.h

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target-con-set.h | 36 + tcg/aarch64/tcg-target.h | 1 + tcg/aarch64/tcg-target.c.inc | 86 +++- 3 files changed, 65 insertions(+), 58 deletions(-) create mode 10

[PATCH v3 19/24] tcg/ppc: Split out constraint sets to tcg-target-con-set.h

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target-con-set.h | 42 +++ tcg/ppc/tcg-target.h | 1 + tcg/ppc/tcg-target.c.inc | 136 +++ 3 files changed, 99 insertions(+), 80 deletions(-) create mode 100644 tcg

[PATCH v3 23/24] tcg/tci: Split out constraint sets to tcg-target-con-set.h

This requires finishing the conversion to tcg_target_op_def. Signed-off-by: Richard Henderson --- tcg/tci/tcg-target-con-set.h | 25 tcg/tci/tcg-target.h | 2 + tcg/tci/tcg-target.c.inc | 279 +-- 3 files changed, 161 insertions(+), 145 deletio

[PATCH v3 14/24] tcg: Remove TCG_TARGET_CON_STR_H

All backends have now been converted to tcg-target-con-str.h, so we can remove the fallback code. Reviewed-by: Peter Maydell Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 1 - tcg/arm/tcg-target.h | 1 - tcg/i386/tcg-target.h| 1 - tcg

[PATCH v3 18/24] tcg/mips: Split out constraint sets to tcg-target-con-set.h

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/mips/tcg-target-con-set.h | 36 + tcg/mips/tcg-target.h | 1 + tcg/mips/tcg-target.c.inc | 96 +++ 3 files changed, 66 insertions(+), 67 deletions(-) create mode 100644 t

[PATCH v3 22/24] tcg/sparc: Split out constraint sets to tcg-target-con-set.h

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target-con-set.h | 32 +++ tcg/sparc/tcg-target.h | 1 + tcg/sparc/tcg-target.c.inc | 75 +++--- 3 files changed, 56 insertions(+), 52 deletions(-) create mode 1006

[PATCH v3 13/24] tcg/sparc: Split out target constraints to tcg-target-con-str.h

Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target-con-str.h | 23 ++ tcg/sparc/tcg-target.h | 5 +-- tcg/sparc/tcg-target.c.inc | 81 +- 3 files changed, 55 insertions(+), 54 deletions(-) create mode 100644 tcg/sparc/tcg-target-con-str

[PATCH v3 10/24] tcg/mips: Split out target constraints to tcg-target-con-str.h

Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/mips/tcg-target-con-str.h | 24 +++ tcg/mips/tcg-target.h | 1 + tcg/mips/tcg-target.c.inc | 77 ++- 3 files changed, 46 insertions(+), 56

[PATCH v3 15/24] tcg/i386: Split out constraint sets to tcg-target-con-set.h

This exports the constraint sets from tcg_target_op_def to a place we will be able to manipulate more in future. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target-con-set.h | 55 ++ tcg/i386/tcg-target.h | 1 + tcg/tcg.c |

[PATCH v3 11/24] tcg/riscv: Split out target constraints to tcg-target-con-str.h

Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target-con-str.h | 21 ++ tcg/riscv/tcg-target.h | 1 + tcg/riscv/tcg-target.c.inc | 52 +- 3 files changed, 35 insertions(+), 39 deletions(-) create mode 100644 tcg/riscv/tcg-target-con-s

[PATCH v3 08/24] tcg/ppc: Split out target constraints to tcg-target-con-str.h

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target-con-str.h | 30 +++ tcg/ppc/tcg-target.h | 1 + tcg/ppc/tcg-target.c.inc | 73 3 files changed, 46 insertions(+), 58 deletions(-) create mode 100644 t

[PATCH v3 20/24] tcg/riscv: Split out constraint sets to tcg-target-con-set.h

Reviewed-by: Peter Maydell Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target-con-set.h | 30 tcg/riscv/tcg-target.h | 1 + tcg/riscv/tcg-target.c.inc | 83 ++ 3 files changed, 54 insertions(+), 60 de

[PATCH v3 09/24] tcg/tci: Split out target constraints to tcg-target-con-str.h

Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/tci/tcg-target-con-str.h | 11 +++ tcg/tci/tcg-target.h | 2 ++ tcg/tci/tcg-target.c.inc | 14 -- 3 files changed, 13 insertions(+), 14 deletions(-) create m

[PATCH v3 12/24] tcg/s390: Split out target constraints to tcg-target-con-str.h

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/s390/tcg-target-con-str.h | 28 ++ tcg/s390/tcg-target.h | 1 + tcg/s390/tcg-target.c.inc | 53 +-- 3 files changed, 42 insertions(+), 40 deletions(-) create mode 100

[PATCH v3 07/24] tcg/aarch64: Split out target constraints to tcg-target-con-str.h

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target-con-str.h | 24 +++ tcg/aarch64/tcg-target.h | 1 + tcg/aarch64/tcg-target.c.inc | 51 +--- 3 files changed, 33 insertions(+), 43 deletions(-) create mode

[PATCH v3 06/24] tcg/arm: Split out target constraints to tcg-target-con-str.h

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/arm/tcg-target-con-str.h | 22 +++ tcg/arm/tcg-target.h | 1 + tcg/arm/tcg-target.c.inc | 74 +--- 3 files changed, 41 insertions(+), 56 deletions(-) create mode 100644 tcg/a

[PATCH v3 01/24] tcg/tci: Drop L and S constraints

These are identical to the 'r' constraint. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.c.inc | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 15981265db..9c45f5f88f 100

[PATCH v3 05/24] tcg/i386: Split out target constraints to tcg-target-con-str.h

This eliminates the target-specific function target_parse_constraint and folds it into the single caller, process_op_defs. Since this is done directly into the switch statement, duplicates are compilation errors rather than silently ignored at runtime. Signed-off-by: Richard Henderson --- tcg/i

[PATCH v3 04/24] tcg/i386: Tidy register constraint definitions

Create symbolic constants for all low-byte-addressable and second-byte-addressable registers. Create a symbol for the registers that need reserving for softmmu. There is no functional change for 's', as this letter is only used for i386. The BYTEL name is correct for the action we wish from the

[PATCH v3 02/24] tcg/tci: Remove TCG_TARGET_HAS_* ifdefs

The opcodes always exist, regardless of whether or not they are enabled. Remove the unnecessary ifdefs. Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.c.inc | 82 1 file changed, 82 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/t

[PATCH v3 03/24] tcg/i386: Move constraint type check to tcg_target_const_match

Rather than check the type when filling in the constraint, check it when matching the constant. This removes the only use of the type argument to target_parse_constraint. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 28 +--- 1 file changed, 17 inserti

[PATCH v3 00/24] tcg: backend constraints cleanup

This pulls out constraints to a couple of headers, which reduces the boilerplate just a little. I have a longer term goal, which this aids, in which I move some of the startup-time debug-only validation into build/compile-time validation. But not yet. Changes for v3: * Split out tci ifdef remo

Re: [PATCH v2 2/2] pci: add romsize property

On Fri, 29 Jan 2021, Paolo Bonzini wrote: On 29/01/21 20:51, BALATON Zoltan wrote: otherwise the BIOS emulator in the guest firmware crashes and this works so I think romfile can be empty and it's a useful feature to have in this case for example. I don't know if this patch changes anything abo

Re: [RFC PATCH 3/4] hw/xen/Kconfig: Introduce XEN_PV config

On 29/01/21 20:44, Philippe Mathieu-Daudé wrote: xenpv machine requires USB, IDE_PIIX and PCI: /usr/bin/ld: libcommon.fa.p/hw_xen_xen-legacy-backend.c.o: in function `xen_be_register_common': hw/xen/xen-legacy-backend.c:757: undefined reference to `xen_usb_ops' libqemu-i386-softmmu.

Re: [RFC PATCH 2/4] hw/ide/Kconfig: IDE_PIIX requires IDE_ISA

On 29/01/21 20:44, Philippe Mathieu-Daudé wrote: hw/ide/piix.c has a strong dependency on hw/isa/isa-bus.c: /usr/bin/ld: libcommon.fa.p/hw_ide_piix.c.o: in function `pci_piix_init_ports': /usr/bin/ld: hw/ide/piix.c:141: undefined reference to `isa_get_irq' Signed-off-by: Philippe Mathieu

Re: [RFC PATCH 1/4] hw/ide/Kconfig: IDE_ISA requires ISA_BUS

On 29/01/21 20:44, Philippe Mathieu-Daudé wrote: hw/ide/ioport.c has a strong dependency on hw/isa/isa-bus.c: /usr/bin/ld: libcommon.fa.p/hw_ide_ioport.c.o: in function `ide_init_ioport': /usr/bin/ld: hw/ide/ioport.c:61: undefined reference to `isa_register_portio_list' Signed-off-by: Ph

Re: [PATCH v2 2/2] pci: add romsize property

On 29/01/21 20:51, BALATON Zoltan wrote: otherwise the BIOS emulator in the guest firmware crashes and this works so I think romfile can be empty and it's a useful feature to have in this case for example. I don't know if this patch changes anything about that but the commit message saying that

[PATCH] chardev/char-io: Fix polling by not removing polls when buffers are full

Currently, the chardev backend code will prepare for IO polling to occur by potentially adding or removing a watch of the backing channel for the chardev. The chardev poll is added if the fd_can_read() function reports more than 0 byte of buffer space, if a poll handler is already setup and the buf

Re: [PULL 00/36] Misc patches (buildsys, i386, fuzzing) for 2021-01-29

On 29/01/21 20:49, Peter Maydell wrote: On Fri, 29 Jan 2021 at 11:33, Paolo Bonzini wrote: The following changes since commit 0bcd12fb1513bad44f05f2d3a8eef2a99b3077b6: Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (2021-01-28 12:30:30 +) are available in

Re: [PATCH v2 2/2] pci: add romsize property

On Fri, 29 Jan 2021, Paolo Bonzini wrote: This property can be useful for distros to set up known-good ROM sizes for migration purposes. The VM will fail to start if the ROM is too large, and migration compatibility will not be broken if the ROM is too small. Note that even though romsize is a

Re: [PULL 00/36] Misc patches (buildsys, i386, fuzzing) for 2021-01-29

On Fri, 29 Jan 2021 at 11:33, Paolo Bonzini wrote: > > The following changes since commit 0bcd12fb1513bad44f05f2d3a8eef2a99b3077b6: > > Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging > (2021-01-28 12:30:30 +) > > are available in the Git repository at: > > htt

[RFC PATCH 4/4] hw/xen: Have the xenpv machine select 9pfs

9pfs is not an accelerator feature but a machine one. Signed-off-by: Philippe Mathieu-Daudé --- accel/Kconfig | 1 - hw/xen/Kconfig | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/Kconfig b/accel/Kconfig index 461104c7715..b9e9a2d35b0 100644 --- a/accel/Kconfig +++ b/a

[RFC PATCH 3/4] hw/xen/Kconfig: Introduce XEN_PV config

xenpv machine requires USB, IDE_PIIX and PCI: /usr/bin/ld: libcommon.fa.p/hw_xen_xen-legacy-backend.c.o: in function `xen_be_register_common': hw/xen/xen-legacy-backend.c:757: undefined reference to `xen_usb_ops' libqemu-i386-softmmu.fa.p/hw_i386_xen_xen_platform.c.o: in function `unplug

[RFC PATCH 2/4] hw/ide/Kconfig: IDE_PIIX requires IDE_ISA

hw/ide/piix.c has a strong dependency on hw/isa/isa-bus.c: /usr/bin/ld: libcommon.fa.p/hw_ide_piix.c.o: in function `pci_piix_init_ports': /usr/bin/ld: hw/ide/piix.c:141: undefined reference to `isa_get_irq' Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/Kconfig | 1 + 1 file changed, 1

[RFC PATCH 1/4] hw/ide/Kconfig: IDE_ISA requires ISA_BUS

hw/ide/ioport.c has a strong dependency on hw/isa/isa-bus.c: /usr/bin/ld: libcommon.fa.p/hw_ide_ioport.c.o: in function `ide_init_ioport': /usr/bin/ld: hw/ide/ioport.c:61: undefined reference to `isa_register_portio_list' Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/Kconfig | 2 +- 1 f

[RFC PATCH 0/4] hw/xen: Fixes to only build the XEN_PV machine

Hi Alex, These are the Xen patches I'm carrying to build the xenpv machine alone. I haven't tried to build the xenfv one. Tagged as RFC because this was part of a draft, so must be think better, but I don't have much time to finish it. Anyhow quick review appreciated. Missing (out of scope of th

Re: [PULL v2 00/46] target-arm queue

h 'remotes/armbru/tags/pull-qapi-2021-01-28' > into staging (2021-01-28 22:43:18 +) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20210129-1 > > for you to fetch changes up to 147

Re: [PATCH v14 15/22] cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass

On Fri, Jan 29, 2021 at 09:19:00AM -1000, Richard Henderson wrote: > On 1/28/21 11:00 PM, Claudio Fontana wrote: > > Do you think I should redo the series anyway? I would have started this way > > in the first place, but I tried not to redo Eduardo's work. > I think that would be a good idea, yes.

[PATCH v2 1/2] pci: reject too large ROMs

get_image_size() returns an int64_t, which pci_add_option_rom() assigns to an "int" without any range checking. A 32-bit BAR could be up to 2 GiB in size, so reject anything above it. In order to accomodate a rounded-up size of 2 GiB, change pci_patch_ids's size argument to unsigned. Signed-off-

[PATCH v2 2/2] pci: add romsize property

This property can be useful for distros to set up known-good ROM sizes for migration purposes. The VM will fail to start if the ROM is too large, and migration compatibility will not be broken if the ROM is too small. Note that even though romsize is a uint32_t, it has to be between 1 (because em

[PATCH v2 0/2] pci: add romsize property

This property can be useful for distros to set up known-good ROM sizes for migration purposes. The VM will fail to start if the ROM is too large, and migration compatibility will not be broken if the ROM is too small. The main difference from v1 is the first patch, which fixes overflow issues in

Re: [PATCH] tests/acceptance: Re-enable the microblaze test

Hi Thomas, On 1/29/21 2:40 AM, Thomas Huth wrote: On 28/01/2021 20.34, Wainer dos Santos Moschetta wrote: Hi, On 1/28/21 12:28 PM, Thomas Huth wrote: The microblaze kernel sometimes gets stuck during boot (ca. 1 out of 200 times), so we disabled the corresponding acceptance tests some months

Re: [PATCH v14 15/22] cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass

On 1/28/21 11:00 PM, Claudio Fontana wrote: > Do you think I should redo the series anyway? I would have started this way > in the first place, but I tried not to redo Eduardo's work. I think that would be a good idea, yes. r~

Re: [PATCH v4 09/12] target/arm: Make m_helper.c optional via CONFIG_ARM_V7M

On 10/3/20 11:48 AM, Richard Henderson wrote: > On 9/29/20 5:43 PM, Philippe Mathieu-Daudé wrote: >> +arm_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('m_helper.c'), if_false: >> files('m_helper-stub.c')) >> + >> arm_ss.add(zlib) >> >> arm_ss.add(when: 'CONFIG_TCG', if_true: files('arm-semi.c

Re: [PULL 17/21] hw/adc: Add an ADC module for NPCM7XX

On 1/29/21 6:15 PM, wuhaotsh--- via wrote: > On Fri, Jan 29, 2021 at 6:41 AM Philippe Mathieu-Daudé > wrote: > > Hi Hao Wu, > > On 1/12/21 5:57 PM, Peter Maydell wrote: > > From: Hao Wu mailto:wuhao...@google.com>> > > > > The ADC is part of NPCM7XX Mo

[PATCH] docs/system: document an example booting the versatilepb machine

There is a bit more out there including Aurelien's excellent write up and older Debian images here: https://www.aurel32.net/info/debian_arm_qemu.php https://people.debian.org/~aurel32/qemu/armel/ However the web is transitory and git is forever so lets add something to the fine manual. Cc: A

Re: [PATCH] iotests/testrunner: fix recognition of python tests

On 1/29/21 4:06 AM, Vladimir Sementsov-Ogievskiy wrote: We should drop final '\n' before comparing with python3 shebang. Fixes: d74c754c924ca34e90b7c96ce2f5609d82c0e628 Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: John Snow --- tests/qemu-iotests/testrunner.py | 2 +- 1 file

Re: [PATCH] iotests/297: pylint: ignore too many statements

On 1/29/21 4:50 AM, Kevin Wolf wrote: Am 28.01.2021 um 21:08 hat Vladimir Sementsov-Ogievskiy geschrieben: 28.01.2021 23:04, Vladimir Sementsov-Ogievskiy wrote: Ignore two complains, which now lead to 297 failure on testenv.py and testrunner.py. Fixes: 2e5a2f57db481f18fcf70be2a36b1417370b8476

Re: [PATCH v2] iotests/297: pylint: ignore too many statements

On 1/29/21 11:13 AM, Vladimir Sementsov-Ogievskiy wrote: Ignore two complains, which now lead to 297 failure on testenv.py and testrunner.py. Fixes: 2e5a2f57db481f18fcf70be2a36b1417370b8476 Fixes: d74c754c924ca34e90b7c96ce2f5609d82c0e628 ^ Thanks for this Signed-off-by: Vladimir Sementsov-Og

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