Re: [PATCH v6 07/21] docs/sphinx: Add new qapi-doc Sphinx extension

Peter Maydell writes: > Some of our documentation is auto-generated from documentation > comments in the JSON schema. > > For Sphinx, rather than creating a file to include, the most natural > way to handle this is to have a small custom Sphinx extension which > processes the JSON file and insert

Re: [PATCH] target/i386: add -cpu,lbr=true support to enable guest LBR

Hi Eduardo, On 2020/9/28 23:41, Eduardo Habkost wrote: On Mon, Sep 28, 2020 at 10:51:03PM +0800, Xu, Like wrote: Hi Eduardo, Thanks for your detailed review. On 2020/9/25 6:05, Eduardo Habkost wrote: I've just noticed this on my review queue (apologies for the long delay). Comments below:

Re: [PATCH v2] hw/ide: check null block before _cancel_dma_sync

Hello Li, +-- On Fri, 18 Sep 2020, Li Qiang wrote --+ | P J P 篋\x8E2020綛\xB49\xE6\x9C\x8818\xE6\x97ュ\x91\xA8篋\x94 筝\x8B\xE5\x8D\x886:26\xE5\x86\x99\xE9\x81\x93鐚\x9A | > +-- On Fri, 18 Sep 2020, Li Qiang wrote --+ | > | Update v2: use an assert() call | > | ->https://lists.nongnu.org/archive

[Qemu-devel PATCH v2] target/i386: add "-cpu, lbr-fmt=*" support to enable guest LBR

The last branch recording (LBR) is a performance monitor unit (PMU) feature on Intel processors that records a running trace of the most recent branches taken by the processor in the LBR stack. The QEMU could configure whether it's enabled or not for each guest via CLI. The LBR feature would be en

Re: Outline for VHOST_USER_PROTOCOL_F_VDPA

Thanks for the post! I have one comment: On Mon, Sep 28, 2020 at 10:25:37AM +0100, Stefan Hajnoczi wrote: > Why extend vhost-user with vDPA? > > Reusing VIRTIO emulation code for vhost-user backends > - > It is a

RE: [PATCH v10 7/7] Versal: Connect DWC3 controller with virt-versal

Hi Edgar, > -Original Message- > From: Edgar E. Iglesias > Sent: Saturday, September 26, 2020 12:10 AM > To: Sai Pavan Boddu > Cc: Peter Maydell ; Markus Armbruster > ; 'Marc-André Lureau' > ; Paolo Bonzini ; > Gerd Hoffmann ; Edgar Iglesias ; > Francisco Eduardo Iglesias ; qemu-devel@no

[PATCH 2/2] aspeed: Add support for the g220a-bmc board

G220A is a 2 socket x86 motherboard supported by OpenBMC. Strapping configuration was obtained from hardware. Signed-off-by: John Wang --- hw/arm/aspeed.c | 60 + 1 file changed, 60 insertions(+) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c inde

[PATCH 1/2] hw/misc: add an EMC141{3,4} device model

Largely inspired by the TMP423 temperature sensor, here is a model for the EMC1413 temperature sensors. Specs can be found here : https://pdf1.alldatasheet.com/datasheet-pdf/view/533713/SMSC/EMC1413.html Signed-off-by: John Wang --- hw/arm/Kconfig | 1 + hw/misc/Kconfig | 4 + hw

Re: [External] Re: [PATCH] aspeed: Add support for the g220a-bmc board

On Mon, Sep 28, 2020 at 6:11 PM Cédric Le Goater wrote: > > >> Isn't it possible to add some default I2C devices ? temperature sensors ? > > > > hmm, G220A BMC uses emc1413 as the temperature sensor. I can not find > > it in qemu. > > Could it be compatible with the tm105 or TM421 ? It isn't, I t

Re: [RFC 0/3] QEMU as IPMI BMC emulator

On 9/29/20 2:39 AM, Havard Skinnemoen wrote: > This series briefly documents the existing IPMI device support for main > processor emulation, and goes on to propose a similar device structure to > emulate IPMI responder devices in BMC machines. This would allow a qemu > instance running BMC firmwar

Re: [PATCH v6 06/21] qapi/machine.json: Escape a literal '*' in doc comment

Peter Maydell writes: > For rST, '*' is a kind of inline markup (for emphasis), so > "*-softmmu" is a syntax error because of the missing closing '*'. > Escape the '*' with a '\'. > > The texinfo document generator will leave the '\' in the > output, which is not ideal, but that generator is goin

Re: [PATCH v3 31/47] qapi/gen.py: Fix edge-case of _is_user_module

On Thu, Sep 24, 2020 at 08:28:44PM -0400, John Snow wrote: > The edge case is that if the name is '', this expression returns a > string instead of a bool, which violates our declared type. > > Signed-off-by: John Snow Reviewed-by: Cleber Rosa signature.asc Description: PGP signature

Re: [PATCH v3 29/47] qapi/source.py: add type hint annotations

On Thu, Sep 24, 2020 at 08:28:42PM -0400, John Snow wrote: > Annotations do not change runtime behavior. > This commit *only* adds annotations. > > Signed-off-by: John Snow > Reviewed-by: Eduardo Habkost Reviewed-by: Cleber Rosa Tested-by: Cleber Rosa signature.asc Description: PGP signatur

Re: [PATCH v3 23/47] qapi: establish mypy type-checking baseline

On Thu, Sep 24, 2020 at 08:28:36PM -0400, John Snow wrote: > Fix two very minor issues, and then establish a mypy type-checking > baseline. > > Like pylint, this should be run from the folder above: > > > mypy --config-file=qapi/mypy.ini qapi/ > > This is designed and tested for mypy 0.770 or g

Re: [PATCH v3 12/47] qapi: enforce import order/styling with isort

On Thu, Sep 24, 2020 at 08:28:25PM -0400, John Snow wrote: > While we're mucking around with imports, we might as well formalize the > style we use. Let's use isort to do it for us. > > force_sort_within_sections: Intermingles "from x" and "import x" style > statements, such that sorting is always

Re: [PATCH v3 12/47] qapi: enforce import order/styling with isort

On Mon, Sep 28, 2020 at 10:34:42AM -0400, John Snow wrote: > On 9/28/20 8:13 AM, Markus Armbruster wrote: > > PEP 8: "Surround top-level function and class definitions with two blank > > lines." > > > > [...] > > > > > > Yep, but flake8 does not complain about the first definitions that occur >

Re: [PATCH 4/6 v3] KVM: VMX: Fill in conforming vmx_x86_ops via macro

On Tue, Jul 28, 2020 at 12:10:48AM +, Krish Sadhukhan wrote: > The names of some of the vmx_x86_ops functions do not have a corresponding > 'vmx_' prefix. Generate the names using a macro so that the names are > conformant. Fixing the naming will help in better readability and > maintenance of

Re: [PATCH 2/6 v3] KVM: SVM: Fill in conforming svm_x86_ops via macro

On Tue, Jul 28, 2020 at 12:10:46AM +, Krish Sadhukhan wrote: > The names of some of the svm_x86_ops functions do not have a corresponding > 'svm_' prefix. Generate the names using a macro so that the names are > conformant. Fixing the naming will help in better readability and > maintenance of

Re: [PATCH 1/6 v3] KVM: x86: Change names of some of the kvm_x86_ops functions to make them more semantical and readable

This needs a changelog. I would also split the non-x86 parts, i.e. the kvm_arch_* renames, to a separate patch. On Tue, Jul 28, 2020 at 12:10:45AM +, Krish Sadhukhan wrote: > Suggested-by: Vitaly Kuznetsov > Suggested-by: Paolo Bonzini > Signed-off-by: Sean Christopherson > Signed-off-by:

Re: [PATCH v3 07/47] qapi-gen: Separate arg-parsing from generation

On Thu, Sep 24, 2020 at 08:28:20PM -0400, John Snow wrote: > This is a minor re-work of the entrypoint script. It isolates a > generate() method from the actual command-line mechanism. > > The regex match error checking was modified slightly to check that we > actually got a regex match. > > Sign

Re: [PATCH v3 06/47] [DO-NOT-MERGE] docs: enable sphinx-autodoc for scripts/qapi

On Thu, Sep 24, 2020 at 08:28:19PM -0400, John Snow wrote: > Signed-off-by: John Snow > --- > docs/conf.py | 6 +- > docs/devel/index.rst | 1 + > docs/devel/python/index.rst | 7 +++ > docs/devel/python/qapi.commands.rst | 7 +

Re: [PATCH v3 05/47] qapi/doc.py: Change code templates from function to string

On Thu, Sep 24, 2020 at 08:28:18PM -0400, John Snow wrote: > For whatever reason, when these are stored as functions instead of > strings, it confuses sphinx-autodoc into believing them to be > docstrings, and it chokes on the syntax. > Interesting... > Keeping them as dumb strings instead avoids

Re: [PATCH v1 1/3] i386: Remove the limitation of IP payloads for Intel PT

On Tue, Sep 29, 2020 at 02:28:48AM +, Kang, Luwei wrote: > > > > No, it's not possible. KVM doesn't have a say on what the > > > > processor writes in the tracing packets. > > > > >>> Can KVM refuse to enable packet generation if CSbase is not zero > > > > >>> and CPUID.(EAX=14H,ECX=

Re: [PATCH v3 04/47] qapi: modify docstrings to be sphinx-compatible

On Thu, Sep 24, 2020 at 08:28:17PM -0400, John Snow wrote: > I did not say "sphinx beautiful", just "sphinx compatible". They will > not throw errors when parsed and interpreted as ReST. > > Signed-off-by: John Snow > --- > scripts/qapi/doc.py| 10 +- > scripts/qapi/gen.py| 6 ++

[PATCH v2 0/2] migration/dirtyrate: optimizations for showing of querying dirtyrate

This series include two optimizations showing of dirtyrate against v1 1) show start_time and calc_time when query while at the measuring state 2) do not show dirtyrate when measuring is not finished Chuan Zheng (2): migration/dirtyrate: record start_time and calc_time while at the measuring

Re: [PATCH v3 03/47] [DO-NOT-MERGE] docs/sphinx: change default role to "any"

On Thu, Sep 24, 2020 at 08:28:16PM -0400, John Snow wrote: > Signed-off-by: John Snow > --- > docs/conf.py | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/docs/conf.py b/docs/conf.py > index 0dbd90dc11..a68f616d5a 100644 > --- a/docs/conf.py > +++ b/docs/conf.py > @@ -81,6 +81,9 @@ >

[PATCH v2 2/2] migration/dirtyrate: present dirty rate only when querying the rate has completed

Make dirty_rate field optional, present dirty rate only when querying the rate has completed. The qmp results is shown as follow: @unstarted: {"return":{"status":"unstarted","start-time":0,"calc-time":0},"id":"libvirt-12"} @measuring: {"return":{"status":"measuring","start-time":102931,"calc-time":

[PATCH v2 1/2] migration/dirtyrate: record start_time and calc_time while at the measuring state

Querying could include both the start-time and the calc-time while at the measuring state, allowing a caller to determine when they should expect to come back looking for a result. Signed-off-by: Chuan Zheng --- migration/dirtyrate.c | 13 + 1 file changed, 9 insertions(+), 4 delet

PING: [PATCH 2/2] coroutine: take exactly one batch from global pool at a time

Hi, I'd like to know if there are any other problems with this patch, or if there is a better implement to improve coroutine pool. 王洪浩 于2020年8月26日周三 下午2:06写道： > > The purpose of this patch is to improve performance without increasing > memory consumption. > > My test case: > QEMU command line ar

Re: [PATCH v3 02/47] [DO-NOT-MERGE] docs: repair broken references

On Thu, Sep 24, 2020 at 08:28:15PM -0400, John Snow wrote: > Signed-off-by: John Snow > --- > docs/devel/multi-thread-tcg.rst | 2 +- > docs/devel/testing.rst | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/docs/devel/multi-thread-tcg.rst b/docs/devel/multi-t

Re: [RFC 0/3] QEMU as IPMI BMC emulator

Patchew URL: https://patchew.org/QEMU/20200929003916.4183696-1-hskinnem...@google.com/ Hi, This series failed the docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGI

Re: [RFC 0/3] QEMU as IPMI BMC emulator

Patchew URL: https://patchew.org/QEMU/20200929003916.4183696-1-hskinnem...@google.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20200929003916.4183696-1-hskinnem...@google.com Subject: [RFC 0/3] QEMU as IPMI BMC

Re: [PATCH v3 01/47] [DO-NOT-MERGE] docs: replace single backtick (`) with double-backtick (``)

On Thu, Sep 24, 2020 at 08:28:14PM -0400, John Snow wrote: > The single backtick in ReST is the "default role". Currently, Sphinx's > default role is called "content". Sphinx suggests you can use the "Any" > role instead to turn any single-backtick enclosed item into a > cross-reference. > > Befor

Re: [PATCH v3 02/47] [DO-NOT-MERGE] docs: repair broken references

On Thu, Sep 24, 2020 at 08:28:15PM -0400, John Snow wrote: > Signed-off-by: John Snow Reviewed-by: Cleber Rosa signature.asc Description: PGP signature

Re: [PATCH 00/16] hw/mips: Set CPU frequency

Patchew URL: https://patchew.org/QEMU/20200928171539.788309-1-f4...@amsat.org/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!

RE: [PATCH v1 1/3] i386: Remove the limitation of IP payloads for Intel PT

> >> No, if a feature cannot be emulated, that means it cannot be enabled > >> unless it matches the host. That's generally not a problem since > >> Intel PT is usually used only with "-cpu host". > >> > > The limitation of LIP in qemu will mask off the Intel PT in KVM guest > > even with "-cpu ho

RE: [PATCH v1 1/3] i386: Remove the limitation of IP payloads for Intel PT

> > > No, it's not possible. KVM doesn't have a say on what the > > > processor writes in the tracing packets. > > > >>> Can KVM refuse to enable packet generation if CSbase is not zero > > > >>> and CPUID.(EAX=14H,ECX=0)[bit 31] seen by guest is different from > host? > > > >> > > > >>

Re: [PATCH V1 0/3] Passthru device support under emulated amd-iommu

Patchew URL: https://patchew.org/QEMU/20200928200506.75441-1-wei.hua...@amd.com/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN ===

[PATCH 5/5] target/riscv: Add sifive_plic vmstate

Add sifive_plic vmstate for supporting sifive_plic migration. Current vmstate framework only supports one structure parameter as num field to describe variable length arrays, so introduce num_enables. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- hw/intc/sifive_plic.c | 26 ++

[PATCH 3/5] target/riscv: Add H extention state description

In the case of supporting H extention, add H extention description to vmstate_riscv_cpu. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- target/riscv/machine.c | 51 ++ 1 file changed, 51 insertions(+) diff --git a/target/riscv/machine.c b/targe

[PATCH 1/5] target/riscv: Add basic vmstate description of CPU

Add basic CPU state description to the newly created machine.c Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- target/riscv/cpu.c | 7 - target/riscv/cpu.h | 4 +++ target/riscv/machine.c | 59 target/riscv/meson.build | 3 +

[PATCH 0/5] Support RISC-V migration

This patches supported RISC-V migration based on tcg accel. And we have verified related migration features such as snapshot and live migration. A few weeks ago, we submitted RFC patches about supporting RISC-V migration based on kvm accel: https://www.spinics.net/lists/kvm/msg223605.html. And we

[PATCH 4/5] target/riscv: Add V extention state description

In the case of supporting V extention, add V extention description to vmstate_riscv_cpu. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- target/riscv/machine.c | 25 + 1 file changed, 25 insertions(+) diff --git a/target/riscv/machine.c b/target/riscv/machine.c

[PATCH 2/5] target/riscv: Add PMP state description

In the case of supporting PMP feature, add PMP state description to vmstate_riscv_cpu. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- target/riscv/machine.c | 49 ++ 1 file changed, 49 insertions(+) diff --git a/target/riscv/machine.c b/target/

Re: [PATCH v3 1/1] accel/tcg: Fix computing of is_write for MIPS

Thank you so much! On Mon, 28 Sep 2020 at 16:14, Aleksandar Markovic < aleksandar.qemu.de...@gmail.com> wrote: > > > On Sunday, September 27, 2020, Kele Huang wrote: > >> Sorry about that, I only got maintainers by './scripts/get_maintainer.pl >> -f accel/tcg/user-exec.c' and missed your advice

Re: I wanna fixes plugin on windows, any suggestion

On Mon, Sep 28, 2020 at 11:47 PM Alex Bennée wrote: > > > Paolo Bonzini writes: > > > On 25/09/20 21:12, 罗勇刚(Yonggang Luo) wrote: > >> currently the empty.c plugin are failed of linkage error > >> > >> The fowlloing are the failing message: > >> Compiling C object tests/plugin/libbb.dll.p/bb.c.ob

[PATCH v4] linux-user: Add most IFTUN ioctls

The three options handling `struct sock_fprog` (TUNATTACHFILTER, TUNDETACHFILTER, and TUNGETFILTER) are not implemented. Linux kernel keeps a user space pointer in them which we cannot correctly handle. Signed-off-by: Josh Kunz Signed-off-by: Shu-Chun Weng --- v2->v3: IOCTL_SPECIAL(TUNSETTXFIL

Re: [RFC PATCH v4 00/29] Hexagon patch series

Patchew URL: https://patchew.org/QEMU/1601314138-9930-1-git-send-email-tsimp...@quicinc.com/ Hi, This series failed the docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIP

Re: [RFC PATCH v4 00/29] Hexagon patch series

Patchew URL: https://patchew.org/QEMU/1601314138-9930-1-git-send-email-tsimp...@quicinc.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1601314138-9930-1-git-send-email-tsimp...@quicinc.com Subject: [RFC PATCH v4 0

[RFC 3/3] docs/specs: IPMI device emulation: BMC

The IPMI document is expanded with a proposal to emulate BMC-side IPMI devices. This allows a QEMU instance running server software to interact with a different QEMU instance running BMC firmware, which should closely model how a real server system works. The document as rendered by "make sphinxdo

[RFC 2/3] docs/specs: IPMI device emulation: main processor

This document is an attempt to briefly document the existing IPMI emulation support on the main processor. It provides the necessary background for the BMC-side IPMI emulation proposed by the next patch. Signed-off-by: Havard Skinnemoen --- docs/specs/index.rst | 1 + docs/specs/ipmi.rst | 10

[RFC 1/3] docs: enable sphinx blockdiag extension

Signed-off-by: Havard Skinnemoen --- docs/conf.py | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/docs/conf.py b/docs/conf.py index 0dbd90dc11..7c72f1a074 100644 --- a/docs/conf.py +++ b/docs/conf.py @@ -67,7 +67,10 @@ needs_sphinx = '1.6' # Add any Sphinx extension modul

[RFC 0/3] QEMU as IPMI BMC emulator

This series briefly documents the existing IPMI device support for main processor emulation, and goes on to propose a similar device structure to emulate IPMI responder devices in BMC machines. This would allow a qemu instance running BMC firmware to serve as an external BMC for a qemu instance run

Re: [PATCH v4 00/14] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set

On 2020/09/29 6:25, Keith Busch wrote: > On Mon, Sep 28, 2020 at 08:36:48AM +0200, Klaus Jensen wrote: >> On Sep 28 02:33, Dmitry Fomichev wrote: >>> You are making it sound like the entire WDC series relies on this approach. >>> Actually, the persistency is introduced in the second to last patch i

Re: [PATCH] migration: Truncate state file in xen-save-devices-state

On Mon, Sep 28, 2020 at 05:46:18PM +0100, Anthony PERARD wrote: > On Mon, Sep 21, 2020 at 12:17:23PM +0100, Dr. David Alan Gilbert wrote: > > * Dov Murik (dovmu...@linux.vnet.ibm.com) wrote: > > > When running the xen-save-devices-state QMP command, if the filename > > > already exists it will be t

Re: [PATCH v2 7/8] qemu/bswap: Use compiler __builtin_bswap() on NetBSD

On 28.09.2020 15:19, Philippe Mathieu-Daudé wrote: > Since commit efc6c070aca ("configure: Add a test for the minimum > compiler version") the minimum compiler version required for GCC > is 4.8, which supports __builtin_bswap(). > Remove the NetBSD specific ifdef'ry. > > This reverts commit 136067

[Bug 1857269] Re: Keyboard not fully working on Windows version

This bug is solved in last version of qemu for windows. Great work. Best regards. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1857269 Title: Keyboard not fully working on Windows version Statu

Re: [PATCH v4 00/14] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set

On Mon, Sep 28, 2020 at 08:36:48AM +0200, Klaus Jensen wrote: > On Sep 28 02:33, Dmitry Fomichev wrote: > > You are making it sound like the entire WDC series relies on this approach. > > Actually, the persistency is introduced in the second to last patch in the > > series and it only adds a couple

Re: [PATCH v2 6/8] qemu/bswap: Use compiler __builtin_bswap() on FreeBSD

On Mon, 28 Sep 2020 at 09:20, Philippe Mathieu-Daudé wrote: > > Since commit efc6c070aca ("configure: Add a test for the minimum > compiler version") the minimum compiler version required for GCC > is 4.8, which supports __builtin_bswap(). > Remove the FreeBSD specific ifdef'ry. > > This reverts c

Re: [PATCH] vhost-user: save features of multiqueues if chardev is closed

On Wed, Sep 23, 2020 at 11:44:41AM +0200, Adrian Moreno wrote: > Thanks Haibin, > > > On 9/22/20 5:27 AM, haibinzhang(张海斌) wrote: > > Fore-commit(c6beefd674) only saves features of queue0, > > this makes wrong features of other queues in multiqueues > > situation. > > For examples: > > qemu-sys

Re: [RFC PATCH v4 27/29] Hexagon (linux-user/hexagon) Linux user emulation

Le 28/09/2020 à 19:28, Taylor Simpson a écrit : > Implementation of Linux user emulation for Hexagon > Some common files modified in addition to new files in linux-user/hexagon > > Signed-off-by: Taylor Simpson > Reviewed-by: Richard Henderson > --- > linux-user/hexagon/sockbits.h | 18 +

Re: [PATCH v4 2/2] Mark Icelake-Client CPU models deprecated

On Tue, Sep 22, 2020 at 03:14:15PM +0800, Robert Hoo wrote: > Going to obsolete Icelake-Client CPU models in the future. > > Signed-off-by: Robert Hoo > --- > Change log > v4: > Deprecation note is general now. More detailed information is moved to > docs/system/deprecated.rst. > > v3: > Obsolet

Re: [PATCH v4 1/2] Introduce (x86) CPU model deprecation API

On Tue, Sep 22, 2020 at 03:14:14PM +0800, Robert Hoo wrote: > Complement versioned CPU model framework with the ability of marking some > versions deprecated. When that CPU model is chosen, get some warning. The > warning message is customized, e.g. telling in which future QEMU version will > it be

Re: [PATCH v9 0/9] Apply COR-filter to the block-stream permanently

Patchew URL: https://patchew.org/QEMU/1601298001-774096-1-git-send-email-andrey.shinkev...@virtuozzo.com/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally.

Re: [PATCH v9 0/9] Apply COR-filter to the block-stream permanently

Patchew URL: https://patchew.org/QEMU/1601298001-774096-1-git-send-email-andrey.shinkev...@virtuozzo.com/ Hi, This series failed the docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. =

Re: [PATCH 16/16] tests/acceptance: Test the MIPSsim machine

On Mon, Sep 28, 2020 at 2:31 PM Philippe Mathieu-Daudé wrote: > > Add a test for the mipssim machine, based on the recommended > test setup from Thomas Huth: > https://www.mail-archive.com/qemu-devel@nongnu.org/msg606846.html > > The test is quick and can be run as: > > $ avocado --show=console

[PATCH V1 0/3] Passthru device support under emulated amd-iommu

This patchset adds support for passthru devices to run inside VMs under the management of an emulated amd-iommu device (vIOMMU). This feature has a variety of benefits, including enhanced I/O security and user-mode driver support, for guest VMs. This patchset has been tested with both 1G and 10G N

[PATCH V1 3/3] amd-iommu: Fix amdvi_mmio_trace() to differentiate MMIO R/W

amd-iommu MMIO trace function does not differentiate MMIO writes from reads. Let us extend it to support both types. Co-developed-by: Wei Huang Signed-off-by: Suravee Suthikulpanit --- hw/i386/amd_iommu.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a

[PATCH V1 1/3] amd-iommu: Add address space notifier and replay support

Currently the emulated amd-iommu device does not support memory address space notifier and replay. These two functions are required to have I/O devices supported inside guest VMs as passthru devices. This patch adds basic as_notifier infrastructure and replay function in amd_iommu. Co-developed-by

[PATCH V1 2/3] amd-iommu: Sync IOVA-to-GPA translation during page invalidation

Add support to sync the IOVA-to-GPA translation at the time of IOMMU page invalidation. This function is called when two IOMMU commands, AMDVI_CMD_INVAL_AMDVI_PAGES and AMDVI_CMD_INVAL_AMDVI_ALL, are intercepted. Address space notifiers are called accordingly. Co-developed-by: Wei Huang Signed-of

Re: [PATCH v6] hw/i386/pc: add max combined fw size as machine configuration option

On 09/25/20 19:57, Erich Mcmillan wrote: > From: Erich McMillan > > At Hewlett Packard Inc. we have a need for increased fw size to enable > testing of our custom fw. > Move return statement for early return > > Signed-off-by: Erich McMillan > --- > > Changes since v5: > > Move return s

Re: [PATCH v6 05/21] scripts/qapi/parser.py: improve doc comment indent handling

Peter Maydell writes: > Make the handling of indentation in doc comments more sophisticated, > so that when we see a section like: > > Notes: some text >some more text > indented line 3 > > we save it for the doc-comment processing code as: > > some text > some more text >in

Re: [PULL 0/2] register queue

On Sun, 27 Sep 2020 at 14:58, Alistair Francis wrote: > > The following changes since commit 8d16e72f2d4df2c9e631393adf1669a1da7efe8a: > > Merge remote-tracking branch > 'remotes/dgilbert/tags/pull-migration-20200925a' into staging (2020-09-25 > 14:46:18 +0100) > > are available in the Git rep

Re: [PULL 0/5] Usb 20200928 patches

Patchew URL: https://patchew.org/QEMU/20200928131638.9486-1-kra...@redhat.com/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!

Re: [PATCH v5] hw/i386/pc: add max combined fw size as machine configuration option

Laszlo, Thanks double checking the archives. I did end up finding them the next day. With regards to PATCH v6, I missed removing the squash commit message, so that will need to be fixed in v7 apologies for that. -Erich From: Laszlo Ersek Sent: Monday, September

Re: [PATCH v5] hw/i386/pc: add max combined fw size as machine configuration option

On 09/25/20 19:14, McMillan, Erich wrote: > On an unrelated note, it seems that my patches are no longer appearing in > https://lists.nongnu.org/archive/html/qemu-devel/2020-09/index.html is this > because I need to cc qemu-devel@nongnu.org > rather than –to? Cc:

Re: SEV guest debugging support for Qemu

Il lun 28 set 2020, 15:26 Ashish Kalra ha scritto: > Hello Paolo, > > On Sat, Sep 26, 2020 at 02:02:20AM +0200, Paolo Bonzini wrote: > > On 26/09/20 01:48, Ashish Kalra wrote: > > > Thanks for your input, i have one additional query with reference to > this support : > > > > > > For all explicitl

Re: [PATCH v6 02/21] qapi/block.json: Add newline after "Example:" for block-latency-histogram-set

Peter Maydell writes: > On Mon, 28 Sep 2020 at 13:42, Markus Armbruster wrote: >> >> Peter Maydell writes: >> >> > The block-latency-histogram-set command is the only one which uses >> > the Example/Examples section with the first line of the documentation >> > immediately following the ':'. Br

Re: [PATCH v2 6/8] qemu/bswap: Use compiler __builtin_bswap() on FreeBSD

On 9/28/20 7:32 PM, Thomas Huth wrote: > On 28/09/2020 15.19, Philippe Mathieu-Daudé wrote: >> Since commit efc6c070aca ("configure: Add a test for the minimum >> compiler version") the minimum compiler version required for GCC >> is 4.8, which supports __builtin_bswap(). >> Remove the FreeBSD spec

Re: [PATCH 5/5] memory: Skip bad range assertion if notifier is DEVIOTLB_UNMAP type

On Mon, Sep 28, 2020 at 11:05:01AM +0200, Eugenio Perez Martin wrote: > On Fri, Sep 4, 2020 at 6:34 AM Jason Wang wrote: > > > > > > On 2020/9/4 上午12:14, Eugenio Pérez wrote: > > > Device IOTLB invalidations can unmap arbitrary ranges, eiter outside of > > > the memory region or even [0, ~0ULL] fo

Re: [PATCH v2 6/8] qemu/bswap: Use compiler __builtin_bswap() on FreeBSD

On 9/28/20 7:57 PM, Philippe Mathieu-Daudé wrote: > On 9/28/20 7:32 PM, Thomas Huth wrote: >> On 28/09/2020 15.19, Philippe Mathieu-Daudé wrote: >>> Since commit efc6c070aca ("configure: Add a test for the minimum >>> compiler version") the minimum compiler version required for GCC >>> is 4.8, whic

[RFC PATCH v4 24/29] Hexagon (target/hexagon) TCG generation

Include the generated files and set up the data structures Signed-off-by: Taylor Simpson --- target/hexagon/genptr.h | 25 ++ target/hexagon/genptr.c | 234 2 files changed, 259 insertions(+) create mode 100644 target/hexagon/genptr.h creat

[RFC PATCH v4 21/29] Hexagon (target/hexagon) opcode data structures

Signed-off-by: Taylor Simpson --- target/hexagon/opcodes.h | 66 target/hexagon/opcodes.c | 199 +++ 2 files changed, 265 insertions(+) create mode 100644 target/hexagon/opcodes.h create mode 100644 target/hexagon/opcodes.c diff --g

Re: [PATCH v2 6/8] qemu/bswap: Use compiler __builtin_bswap() on FreeBSD

On 28/09/2020 15.19, Philippe Mathieu-Daudé wrote: > Since commit efc6c070aca ("configure: Add a test for the minimum > compiler version") the minimum compiler version required for GCC > is 4.8, which supports __builtin_bswap(). > Remove the FreeBSD specific ifdef'ry. > > This reverts commit de03c

Re: [PATCH v2 5/8] qemu/bswap: Use compiler __builtin_bswap() on Haiku

On 28/09/2020 15.19, Philippe Mathieu-Daudé wrote: > Since commit efc6c070aca ("configure: Add a test for the minimum > compiler version") the minimum compiler version required for GCC > is 4.8, which supports __builtin_bswap(). > Remove the Haiku specific ifdef'ry. > > This reverts commit 652a46e

[RFC PATCH v4 18/29] Hexagon (target/hexagon) generator phase 2 - generate header files

Python scripts generate the following files helper_protos_generated.h For each instruction we create DEF_HELPER function prototype helper_funcs_generated.h For each instruction we create the helper function definition tcg_funcs_generated.h For each instruction we

[RFC PATCH v4 22/29] Hexagon (target/hexagon) macros

macros to interface with the generator macros referenced in instruction semantics Signed-off-by: Taylor Simpson --- target/hexagon/macros.h | 654 1 file changed, 654 insertions(+) create mode 100644 target/hexagon/macros.h diff --git a/target/h

[RFC PATCH v4 25/29] Hexagon (target/hexagon) TCG for instructions with multiple definitions

Helpers won't work if there are multiple definitions, so we override these instructions using #define fGEN_TCG_. Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h | 198 +++ 1 file changed, 198 insertions(+) create mode 100644 target/hexagon/

[RFC PATCH v4 29/29] Hexagon build infrastructure

Add file to default-configs Change configure Add hexagon to meson.build Add hexagon to target/meson.build Add target/hexagon/meson.build Change scripts/qemu-binfmt-conf.sh We can build a hexagon-linux-user target and run programs on the Hexagon scalar core. With hexagon-linux-clang installed, "ma

[RFC PATCH v4 27/29] Hexagon (linux-user/hexagon) Linux user emulation

Implementation of Linux user emulation for Hexagon Some common files modified in addition to new files in linux-user/hexagon Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson --- linux-user/hexagon/sockbits.h | 18 ++ linux-user/hexagon/syscall_nr.h | 343 +

[RFC PATCH v4 19/29] Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree

Run the C preprocessor across the instruction definition and encoding files to expand macros and prepare the iset.py file. The resulting fill contains python data structures used to build the decode tree. Signed-off-by: Taylor Simpson --- target/hexagon/gen_dectree_import.c | 191 ++

Re: [PATCH v2 3/8] qemu/bswap: Replace bswapXXs() by compiler __builtin_bswap()

On 28/09/2020 15.19, Philippe Mathieu-Daudé wrote: > Reviewed-by: Richard Henderson > Signed-off-by: Philippe Mathieu-Daudé > --- > include/qemu/bswap.h | 16 +--- > 1 file changed, 9 insertions(+), 7 deletions(-) > > diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h > index

[RFC PATCH v4 17/29] Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics

Run the C preprocessor across the instruction definition files and macro definitoin file to expand macros and prepare the semantics_generated.pyinc file. The resulting file contains one entry with the semantics for each instruction and one line with the instruction attributes associated with each

[RFC PATCH v4 26/29] Hexagon (target/hexagon) translation

Read the instruction memory Create a packet data structure Generate TCG code for the start of the packet Invoke the generate function for each instruction Generate TCG code for the end of the packet Signed-off-by: Taylor Simpson --- target/hexagon/translate.h | 89 ++ target/hexagon/transla

[RFC PATCH v4 09/29] Hexagon (target/hexagon) architecture types

Define types used in files imported from the Hexagon architecture library Signed-off-by: Taylor Simpson --- target/hexagon/hex_arch_types.h | 43 + 1 file changed, 43 insertions(+) create mode 100644 target/hexagon/hex_arch_types.h diff --git a/target/he

[RFC PATCH v4 10/29] Hexagon (target/hexagon) instruction and packet types

The insn_t and packet_t are the interface between instruction decoding and TCG code generation Signed-off-by: Taylor Simpson --- target/hexagon/insn.h | 74 +++ 1 file changed, 74 insertions(+) create mode 100644 target/hexagon/insn.h diff --git

[RFC PATCH v4 12/29] Hexagon (target/hexagon) instruction attributes

Signed-off-by: Taylor Simpson --- target/hexagon/attribs.h | 32 +++ target/hexagon/attribs_def.h | 98 2 files changed, 130 insertions(+) create mode 100644 target/hexagon/attribs.h create mode 100644 target/hexagon/attribs_def.h di

[RFC PATCH v4 11/29] Hexagon (target/hexagon) register fields

Declare bitfields within registers such as user status register (USR) Signed-off-by: Taylor Simpson --- target/hexagon/reg_fields.h | 36 target/hexagon/reg_fields_def.h | 41 + target/hexagon/reg_fields.c | 28

[RFC PATCH v4 15/29] Hexagon (target/hexagon) utility functions

Utility functions called by various instructions Signed-off-by: Taylor Simpson --- target/hexagon/arch.h | 42 +++ target/hexagon/conv_emu.h | 50 +++ target/hexagon/fma_emu.h | 27 ++ target/hexagon/arch.c | 354 + target/hexagon/conv_emu.c | 369

[RFC PATCH v4 23/29] Hexagon (target/hexagon) instruction classes

Determine legal VLIW slots for each instruction Signed-off-by: Taylor Simpson --- target/hexagon/iclass.h| 40 +++ target/hexagon/iclass.c| 80 ++ target/hexagon/imported/iclass.def | 52 + 3 file

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