Re: Moving to C11? (was Re: Redefinition of typedefs (C11 feature))

On 11/09/2020 22.06, Eduardo Habkost wrote: > On Fri, Sep 11, 2020 at 08:06:10PM +0100, Peter Maydell wrote: >> On Fri, 11 Sep 2020 at 19:49, Eduardo Habkost wrote: >>> >>> I'm wondering: do our supported build host platforms all include >>> compilers that are new enough to let us redefine typedef

Re: [PATCH v5 3/8] s390/sclp: read sccb from mem based on provided length

On 11/09/2020 20.16, Collin Walling wrote: > On 9/10/20 1:56 PM, Collin Walling wrote: >> On 9/10/20 1:50 PM, Thomas Huth wrote: >>> On 10/09/2020 11.36, Collin Walling wrote: The header contained within the SCCB passed to the SCLP service call contains the actual length of the SCCB. Inst

Re: [PATCH v5 0/2] hyperv: vmbus: ACPI various corrections

On 15/07/20 10:43, Jon Doron wrote: > After doing further tests and looking at the latest HyperV ACPI DSDT. > Do minor fix to our VMBus ACPI entry. > > v5: > * Rebased on latest master > * Added a patch to fix 32bit compliation on VMBus > > v4: > * Removed the patch which adds _ADR definition to

Re: [PATCH v2] Simplify the .gitignore file

On 09/09/20 18:07, Philippe Mathieu-Daudé wrote: > On 9/9/20 10:03 AM, Thomas Huth wrote: >> Now that we always do out-of-tree builds (and the in-tree builds are >> faked via a "build" directory), we can simplify out .gitignore file >> quite a bit. >> >> Signed-off-by: Thomas Huth Acked-by: Paolo

Re: [PATCH v2] Simplify the .gitignore file

On 09/09/20 18:07, Philippe Mathieu-Daudé wrote: > On 9/9/20 10:03 AM, Thomas Huth wrote: >> Now that we always do out-of-tree builds (and the in-tree builds are >> faked via a "build" directory), we can simplify out .gitignore file >> quite a bit. >> >> Signed-off-by: Thomas Huth Queued, thanks.

Re: [PATCH] vhost-scsi: support inflight io track

On 09/09/20 14:20, Li Feng wrote: > Qemu will send GET_INFLIGHT_FD and SET_INFLIGH_FD to backend, and > the backend setup the inflight memory to track the io. > > Change-Id: I805d6189996f7a1b44c65f0b12ef7473b1789510 > Signed-off-by: Li Feng > --- > hw/scsi/vhost-scsi-common.c | 27

Re: [PATCH] memory: Convert IOMMUMemoryRegionClass doc comment to kernel-doc

On 08/09/20 22:11, Eduardo Habkost wrote: > Convert the existing documentation comments of > IOMMUMemoryRegionClass to kernel-doc format so their contents > will appear in the API reference at docs/devel/memory.html. > > Signed-off-by: Eduardo Habkost > --- > include/exec/memory.h | 52 +

Re: [PATCH] target/i386: support KVM_FEATURE_ASYNC_PF_INT

On 08/09/20 16:12, Vitaly Kuznetsov wrote: > Linux-5.8 introduced interrupt based mechanism for 'page ready' events > delivery and disabled the old, #PF based one (see commit 2635b5c4a0e4 > "KVM: x86: interrupt based APF 'page ready' event delivery"). Linux > guest switches to using in in 5.9 (see

Re: [PATCH v2] scripts/git.orderfile: Display meson files along with buildsys ones

On 08/09/20 14:30, Laszlo Ersek wrote: > > The current working directory is the source tree. > > The working directory is pristine, as in: > $ git reset --hard > $ git clean -ffdx > $ git submodule deinit --force --all > > Then: > > $ git submodule update --init --force > $ make clean > $ git s

[Bug 1895363] [NEW] borland IDEs double up cursor key presses (need timing on PS2 port input)

Public bug reported: Most DOS-era IDEs from Borland (I have tried Borland C++ 2.0, Borland C++ 3.1 and Turbo Pascal 7.1) exhibit strange responses to the keyboard. Cursor keys are registered twice, so each press of a cursor key causes the cursor to move twice. Also the other keys occasionally are

Re: [PATCH] hw: usb: hcd-ohci: check len and frame_number variables

On 200911 1520, Alexander Bulekov wrote: > On 200911 2257, Li Qiang wrote: > > P J P 于2020年9月11日周五 下午8:30写道： > > > > > > From: Prasad J Pandit > > > > > > While servicing the OHCI transfer descriptors(TD), OHCI host > > > controller derives variables 'start_addr', 'end_addr', 'len' > > > etc. fro

Re: [PATCH v2 0/2] hw: Replace some impossible checks by assertions

On 9/10/20 12:23 AM, Philippe Mathieu-Daudé wrote: > Trivial patches removing unreachable code. > > Since v1: > - dropped patches queued > - replace dead code by assert (Peter) > - use PCI_NUM_PINS definition (Cédric) > > Philippe Mathieu-Daudé (2): > hw/gpio/max7310: Remove impossible check >

Re: [PATCH] hw/block/nand: Decommission the NAND museum

On 9/6/20 7:46 PM, Philippe Mathieu-Daudé wrote: > ping^2 > > On 8/22/20 10:03 PM, Philippe Mathieu-Daudé wrote: >> ping? >> >> On 8/14/20 3:23 PM, Philippe Mathieu-Daudé wrote: >>> I forgot to Cc qemu-arm@, doing it now since most of the users >>> of this are ARM machines. >>> >>> On 8/14/20 3:21

Re: [PATCH 6/7] hw/char/serial-isa: Alias QDEV properties from generic serial object

On 9/6/20 6:55 PM, Philippe Mathieu-Daudé wrote: > Instead of overwritting the properties of the generic 'state' > object, alias them. > Note we can now propagate the "baudbase" property. > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/char/serial-isa.c | 4 ++-- > 1 file changed, 2 inserti

Re: [PATCH 5/7] hw/char/serial: Make 'wakeup' property boolean

On 9/6/20 6:55 PM, Philippe Mathieu-Daudé wrote: > Make the "wakeup" property introduced in commit 9826fd597df > ("suspend: make serial ports wakeup the guest") a boolean. > > As we want to reuse the generic serial properties in the > ISA model (next commit), expose this property. > > Signed-off-

Re: [PATCH 4/7] hw/char/serial: Rename I/O read/write trace events

On 9/6/20 6:55 PM, Philippe Mathieu-Daudé wrote: > The serial_mm_read/write() handlers from the TYPE_SERIAL_MM device > call the serial_ioport_read/write() handlers with shifted offset. > > When looking at the trace events from this MMIO device, it is > confusing to read the accesses as I/O. Simpl

Re: [PATCH 1/7] hw/char/serial: Assert serial_ioport_read/write offset fits 8 bytes

On 9/6/20 6:55 PM, Philippe Mathieu-Daudé wrote: > The serial device has 8 registers, each 8-bit. The MemoryRegionOps > 'serial_io_ops' is initialized with max_access_size=1, and all > memory_region_init_io() callers correctly set the region size to > 8 bytes: > - serial_io_realize > - serial_isa_r

Re: [PATCH v2 0/2] hw/char: Remove TYPE_SERIAL_IO

On 9/6/20 6:15 PM, Philippe Mathieu-Daudé wrote: > Remove the TYPE_SERIAL_IO which is simply a superset of > TYPE_SERIAL_MM, as suggested by Paolo and Peter here: > https://www.mail-archive.com/qemu-devel@nongnu.org/msg721806.html > > Since v1: > - Reword migration comment (Marc-André) > > Philip

[REPORT] Nightly Performance Tests - Friday, September 11, 2020

Host CPU : Intel(R) Core(TM) i7-8750H CPU @ 2.20GHz Host Memory : 15.49 GB Start Time (UTC) : 2020-09-11 22:30:01 End Time (UTC) : 2020-09-11 23:03:04 Execution Time : 0:33:03.117362 Status : SUCCESS Note: Changes denoted by '-' are less than 0.01%. -

Re: [PATCH v5 7/7] hw/arm/tosa: Replace fprintf() calls by LED devices

On 9/10/20 1:54 PM, Philippe Mathieu-Daudé wrote: > The recently added LED device reports LED status changes with > the 'led_set_intensity' trace event. It is less invasive than > the fprintf() calls. We need however to have a binary built > with tracing support. > > Signed-off-by: Philippe Mathie

Re: [PATCH v5 6/7] hw/misc/mps2-scc: Use the LED device

On 9/10/20 1:54 PM, Philippe Mathieu-Daudé wrote: > Per the 'ARM MPS2 and MPS2+ FPGA Prototyping Boards Technical > Reference Manual' (100112_0200_07_en): > > 2.1 Overview of the MPS2 and MPS2+ hardware > >The MPS2 and MPS2+ FPGA Prototyping Boards contain the >following compon

Re: [PATCH v5 5/7] hw/misc/mps2-fpgaio: Use the LED device

On 9/10/20 1:54 PM, Philippe Mathieu-Daudé wrote: > Per the 'ARM MPS2 and MPS2+ FPGA Prototyping Boards Technical > Reference Manual' (100112_0200_07_en): > > 2.1 Overview of the MPS2 and MPS2+ hardware > >The MPS2 and MPS2+ FPGA Prototyping Boards contain the >following compon

Re: [PATCH v5 2/7] hw/misc/led: Allow connecting from GPIO output

On 9/10/20 1:54 PM, Philippe Mathieu-Daudé wrote: > Some devices expose GPIO lines. > > Add a GPIO qdev input to our LED device, so we can > connect a GPIO output using qdev_connect_gpio_out(). > > When used with GPIOs, the intensity can only be either > minium or maximum. This depends of the pol

Re: [PATCH v5 1/7] hw/misc/led: Add a LED device

On 9/10/20 1:54 PM, Philippe Mathieu-Daudé wrote: > +static const char *led_color_name[] = { const char * const Otherwise, Reviewed-by: Richard Henderson r~

Re: qemu disassembler status

On Sat, Sep 12, 2020 at 5:52 AM Richard Henderson < richard.hender...@linaro.org> wrote: > Taking this to the mailing list, since there are others who have expressed > interest in the topic. > > > On 9/7/20 11:36 AM, Peter Maydell wrote: > > Hi; I have a feeling we've discussed this on irc at some

Re: qemu disassembler status

Taking this to the mailing list, since there are others who have expressed interest in the topic. On 9/7/20 11:36 AM, Peter Maydell wrote: > Hi; I have a feeling we've discussed this on irc at some point > in the past, but I've forgotten the details, so I figured if I > wrote an email I might be

Re: [PATCH 7/8] tests/acceptance/boot_linux: Accept SSH pubkey

On Wed, Sep 9, 2020 at 3:46 PM Max Reitz wrote: > > Let download_cloudinit() take an optional pubkey, which subclasses of > BootLinux can pass through setUp(). > > Signed-off-by: Max Reitz > --- > tests/acceptance/boot_linux.py | 13 +++-- > 1 file changed, 7 insertions(+), 6 deletions(-

Re: [Virtio-fs] [PATCH v2 3/6] tools/virtiofsd: xattr name mappings: Add option

On Thu, Aug 27, 2020 at 04:36:54PM +0100, Dr. David Alan Gilbert (git) wrote: > From: "Dr. David Alan Gilbert" > > Add an option to define mappings of xattr names so that > the client and server filesystems see different views. > This can be used to have different SELinux mappings as > seen by th

Re: [PATCH v4 1/2] sifive_e: Rename memmap enum constants

On Fri, Sep 11, 2020 at 10:35 AM Eduardo Habkost wrote: > > Some of the enum constant names conflict with a QOM type check > macro (SIFIVE_E_PRCI). This needs to be addressed to allow us to > transform the QOM type check macros into functions generated by > OBJECT_DECLARE_TYPE(). > > Rename all t

Re: [PATCH v4 2/2] sifive_u: Rename memmap enum constants

On Fri, Sep 11, 2020 at 10:35 AM Eduardo Habkost wrote: > > Some of the enum constant names conflict with the QOM type check > macros (SIFIVE_U_OTP, SIFIVE_U_PRCI). This needs to be addressed > to allow us to transform the QOM type check macros into functions > generated by OBJECT_DECLARE_TYPE().

Re: [PATCH v5 6/7] hw/misc/mps2-scc: Use the LED device

On 9/10/20 10:54 PM, Philippe Mathieu-Daudé wrote: Per the 'ARM MPS2 and MPS2+ FPGA Prototyping Boards Technical Reference Manual' (100112_0200_07_en): 2.1 Overview of the MPS2 and MPS2+ hardware The MPS2 and MPS2+ FPGA Prototyping Boards contain the following components and

Re: [PATCH v5 5/7] hw/misc/mps2-fpgaio: Use the LED device

Hi Phil, On 9/10/20 10:54 PM, Philippe Mathieu-Daudé wrote: Per the 'ARM MPS2 and MPS2+ FPGA Prototyping Boards Technical Reference Manual' (100112_0200_07_en): 2.1 Overview of the MPS2 and MPS2+ hardware The MPS2 and MPS2+ FPGA Prototyping Boards contain the following comp

Re: Moving to C11? (was Re: Redefinition of typedefs (C11 feature))

On Fri, Sep 11, 2020 at 2:07 PM Eduardo Habkost wrote: > On Fri, Sep 11, 2020 at 08:06:10PM +0100, Peter Maydell wrote: > > On Fri, 11 Sep 2020 at 19:49, Eduardo Habkost > wrote: > > > > > > I'm wondering: do our supported build host platforms all include > > > compilers that are new enough to l

Moving to C11? (was Re: Redefinition of typedefs (C11 feature))

On Fri, Sep 11, 2020 at 08:06:10PM +0100, Peter Maydell wrote: > On Fri, 11 Sep 2020 at 19:49, Eduardo Habkost wrote: > > > > I'm wondering: do our supported build host platforms all include > > compilers that are new enough to let us redefine typedefs? > > > > The ability to redefine typedefs is

Re: [PATCH v5 4/7] hw/arm/aspeed: Add the 3 front LEDs drived by the PCA9552 #1

On 9/10/20 10:54 PM, Philippe Mathieu-Daudé wrote: The Witherspoon has 3 LEDs connected to a PCA9552. Add them. The names and reset values are taken from: https://github.com/open-power/witherspoon-xml/blob/master/witherspoon.xml Example booting obmc-phosphor-image: $ qemu-system-arm -M withe

Re: [PATCH v5 7/7] hw/arm/tosa: Replace fprintf() calls by LED devices

On 9/10/20 10:54 PM, Philippe Mathieu-Daudé wrote: The recently added LED device reports LED status changes with the 'led_set_intensity' trace event. It is less invasive than the fprintf() calls. We need however to have a binary built with tracing support. Signed-off-by: Philippe Mathieu-Daudé

Re: [PATCH v5 3/7] hw/misc/led: Emit a trace event when LED intensity has changed

On 9/10/20 10:54 PM, Philippe Mathieu-Daudé wrote: Track the LED intensity, and emit a trace event when it changes. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Luc Michel --- hw/misc/led.c| 4 hw/misc/trace-events | 1 + 2 files chang

Re: [PULL 00/33] QOM boilerplate cleanup (v4)

On Thu, 10 Sep 2020 at 19:21, Eduardo Habkost wrote: > > Hopefully the last respin. > > Changes v3 -> v4: > * Removed patch "chardev: Rename TYPE_CHARDEV_* to TYPE_*_CHARDEV" > * Removed all chardev/char-parallel.c changes > > The following changes since commit 6779038537360e957dbded830f76b08ef507

Re: [PATCH v5 2/7] hw/misc/led: Allow connecting from GPIO output

Hi Phil, On 9/10/20 10:54 PM, Philippe Mathieu-Daudé wrote: Some devices expose GPIO lines. Add a GPIO qdev input to our LED device, so we can connect a GPIO output using qdev_connect_gpio_out(). When used with GPIOs, the intensity can only be either minium or maximum. This depends of the pola

[PULL 17/18] util/hexdump: Reorder qemu_hexdump() arguments

From: Philippe Mathieu-Daudé qemu_hexdump()'s pointer to the buffer and length of the buffer are closely related arguments but are widely separated in the argument list order (also, the format of function prototypes is usually to have the FILE* argument coming first). Reorder the arguments as "

[PULL 10/18] meson.build: tweak sdl-image error message

From: Sergei Trofimovich Before the change missing SDL was reported as: ../meson.build:253:4: ERROR: Expected 1 arguments, got 2. After the error as: ../meson.build:258:4: ERROR: Problem encountered: sdl-image required, but SDL was not found CC: Paolo Bonzini CC: "Marc-André Lureau"

Re: [PATCH v5 1/7] hw/misc/led: Add a LED device

On 9/10/20 10:54 PM, Philippe Mathieu-Daudé wrote: Add a LED device which can be connected to a GPIO output. They can also be dimmed with PWM devices. For now we do not implement the dimmed mode, but in preparation of a future implementation, we start using the LED intensity. LEDs are limited to

[PULL 14/18] target/i386/kvm: Rename host_tsx_blacklisted() as host_tsx_broken()

From: Philippe Mathieu-Daudé In order to use inclusive terminology, rename host_tsx_blacklisted() as host_tsx_broken(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Acked-by: Paolo Bonzini Message-Id: <20200910070131.435543-7-phi...@redhat.com> Signed-off-by: Laurent Vivier

[PULL 16/18] util/hexdump: Convert to take a void pointer argument

From: Philippe Mathieu-Daudé Most uses of qemu_hexdump() do not take an array of char as input, forcing use of cast. Since we can use this helper to dump any kind of buffer, use a pointer to void argument instead. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by:

[PULL 09/18] hw/net/e1000e: Remove duplicated write handler for FLSWDATA register

From: Philippe Mathieu-Daudé The FLSWDATA register writeop handler is initialized twice: 3067 #define e1000e_putreg(x)[x] = e1000e_mac_writereg 3068 typedef void (*writeops)(E1000ECore *, int, uint32_t); 3069 static const writeops e1000e_macreg_writeops[] = { 3102 e1000e_p

Re: [PATCH 0/5] handle M-profile in fp16_arith isar_feature test

On 9/10/20 10:38 AM, Peter Maydell wrote: > This series leaves us with two different ways to check for "is this > M-profile?" -- the old ARM_FEATURE_M bit, and also the new > isar_feature_aa32_mprofile() test. We could in theory convert the > users of ARM_FEATURE_M, but I haven't, because there ar

[PULL 13/18] test-vmstate: remove unnecessary code in match_interval_mapping_node

From: Pan Nengyuan 'str' is not used in match_interval_mapping_node(), remove it. Signed-off-by: Pan Nengyuan Reviewed-by: Li Qiang Reviewed-by: Thomas Huth Message-Id: <20200910023818.11880-1-pannengy...@huawei.com> Signed-off-by: Laurent Vivier --- tests/test-vmstate.c | 3 --- 1 file cha

[PULL 18/18] target/i386/kvm: Add missing fallthrough comment

From: Thomas Huth Let's make this file compilable with -Werror=implicit-fallthrough : Looking at the code, it seems like the fallthrough is intended here, so we should add the corresponding "/* fallthrough */" comment here. Signed-off-by: Thomas Huth Acked-by: Paolo Bonzini Message-Id: <202009

[PULL 08/18] hw/net/e1000e: Remove overwritten read handler for STATUS register

From: Philippe Mathieu-Daudé The STATUS register readop handler is initialized first with the generic e1000e_mac_readreg() handler: 2861 #define e1000e_getreg(x)[x] = e1000e_mac_readreg 2862 typedef uint32_t (*readops)(E1000ECore *, int); 2863 static const readops e1000e_macreg_readops

[PULL 15/18] hw/arm/pxa2xx: Add missing fallthrough comment

From: Thomas Huth Let's make this file compilable with -Werror=implicit-fallthrough : Looking at the code, it seems like the fallthrough is intended here, so we should add the corresponding "/* fallthrough */" comment here. Signed-off-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé Tested-

[PULL 12/18] hw: hyperv: vmbus: Fix 32bit compilation

From: Jon Doron Fix 32-bit build error for vmbus: hw/hyperv/vmbus.c: In function ‘gpadl_iter_io’: hw/hyperv/vmbus.c:383:13: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] 383 | p = (void *)(((uintptr_t)iter->map & TARGET_PAGE_MASK) | off_in_pa

[PULL 11/18] kconfig: fix comment referring to old Makefiles

From: Paolo Bonzini Signed-off-by: Paolo Bonzini Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200908094244.26327-1-pbonz...@redhat.com> Signed-off-by: Laurent Vivier --- Kconfig.host | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Kconfig.host b/Kconfig.host inde

[PULL 06/18] Makefile: Drop extra phony cscope

From: Greg Kurz Commit d79864058a64 added a dedicated phony line for cscope. Fixes: d79864058a64 ("Makefile: Add back TAGS/ctags/cscope rules") Signed-off-by: Greg Kurz Reviewed-by: Laurent Vivier Message-Id: <159916246865.691541.16619858522304817323.st...@bahia.lan> Signed-off-by: Laurent Viv

[PULL 02/18] hw/isa/isa-bus: Replace hw_error() by assert()

From: Philippe Mathieu-Daudé As we can never have more than ISA_NUM_IRQS (16) ISA IRQs, replace the not very interesting hw_error() call by an assert() which is more useful to debug condition that can not happen. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id:

[PULL 04/18] hw/gpio/omap_gpio: Replace fprintf() by qemu_log_mask(GUEST_ERROR)

From: Philippe Mathieu-Daudé Replace fprintf() by qemu_log_mask(LOG_GUEST_ERROR). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier Message-Id: <20200901104234.92159-2-f4...@amsat.org> Signed-off-by: Laurent Vivier --- hw/gpio/omap_gpio.c | 6 -- 1 file changed, 4 inserti

[PULL 07/18] Makefile: Skip the meson subdir in cscope/TAGS/ctags

From: Greg Kurz If the meson submodule is present, we don't really want to index its source code. Consolidate the find command in a single place and use it for cscope, ctags and etags. Note that this now causes ctags and etags to also index assembly files, but this is okay since they both have be

[PULL 01/18] hw/mips/fuloong2e: Convert pointless error message to an assert()

From: Philippe Mathieu-Daudé Displaying "vt82c686b_init error" doesn't give any hint about why this call failed. As this message targets developers and not users, replace the pointless error message by a call to assert() which will provide more useful information. Signed-off-by: Philippe Mathieu

[PULL 05/18] hw/gpio/max7310: Replace disabled printf() by qemu_log_mask(UNIMP)

From: Philippe Mathieu-Daudé Replace disabled printf() by qemu_log_mask(UNIMP). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier Message-Id: <20200901104234.92159-3-f4...@amsat.org> Signed-off-by: Laurent Vivier --- hw/gpio/max7310.c | 11 +-- 1 file changed, 5 inser

[PULL 00/18] Trivial branch for 5.2 patches

gs/trivial-branch-for-5.2-pull-request for you to fetch changes up to 8821e21414468b1810f0ccf38bcbfa5c0bd1d56b: target/i386/kvm: Add missing fallthrough comment (2020-09-11 21:25:59 +0200) trivial patches pull reques

[PULL 03/18] hw/acpi/tco: Remove unused definitions

From: Philippe Mathieu-Daudé TCO_DEBUG() and DEBUG definitions are not used, remove them. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier Message-Id: <20200901101951.85892-1-f4...@amsat.org> Signed-off-by: Laurent Vivier --- hw/acpi/tco.c | 11 --- 1 file changed, 1

Re: [PATCH 5/5] target/arm: Make isar_feature_aa32_fp16_arith() handle M-profile

On 9/10/20 10:38 AM, Peter Maydell wrote: > +static inline bool isar_feature_aa32_mprofile(const ARMISARegisters *id) > +{ > +return FIELD_EX32(id->id_pfr1, ID_PFR1, MPROGMOD) != 0; > +} > + > static inline bool isar_feature_aa32_fp16_arith(const ARMISARegisters *id) > { > -return FIELD_E

Re: [PATCH 4/5] target/arm: Add ID register values for Cortex-M0

On 9/10/20 10:38 AM, Peter Maydell wrote: > Give the Cortex-M0 ID register values corresponding to its > implemented behaviour. These will not be guest-visible but will be > used to govern the behaviour of QEMU's emulation. We use the same > values that the Cortex-M3 does. > > Signed-off-by: Pet

Re: [PATCH 3/5] hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUs

On 9/10/20 10:38 AM, Peter Maydell wrote: > M-profile CPUs only implement the ID registers as guest-visible if > the CPU implements the Main Extension (all our current CPUs except > the Cortex-M0 do). > > Currently we handle this by having the Cortex-M0 leave the ID > register values in the ARMCPU

Re: [PATCH 2/5] target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters

On 9/10/20 10:38 AM, Peter Maydell wrote: > Move the id_pfr0 and id_pfr1 fields into the ARMISARegisters > sub-struct. We're going to want id_pfr1 for an isar_features > check, and moving both at the same time avoids an odd > inconsistency. > > Changes other than the ones to cpu.h and kvm64.c made

Re: [PATCH 1/5] target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check

On 9/10/20 10:38 AM, Peter Maydell wrote: > The ARM_FEATURE_PXN bit indicates whether the CPU supports the PXN > bit in short-descriptor translation table format descriptors. This > is indicated by ID_MMFR0.VMSA being at least 0b0100. Replace the > feature bit with an ID register check, in line w

Re: [PATCH] target/i386/kvm: Add missing fallthrough comment

Le 11/09/2020 à 14:53, Thomas Huth a écrit : > Let's make this file compilable with -Werror=implicit-fallthrough : > Looking at the code, it seems like the fallthrough is intended here, > so we should add the corresponding "/* fallthrough */" comment here. > > Signed-off-by: Thomas Huth > --- >

Re: [PATCH] hw: usb: hcd-ohci: check len and frame_number variables

On 200911 2257, Li Qiang wrote: > P J P 于2020年9月11日周五 下午8:30写道： > > > > From: Prasad J Pandit > > > > While servicing the OHCI transfer descriptors(TD), OHCI host > > controller derives variables 'start_addr', 'end_addr', 'len' > > etc. from values supplied by the host controller driver. > > Host

Re: Redefinition of typedefs (C11 feature)

On Fri, 11 Sep 2020 at 19:49, Eduardo Habkost wrote: > > I'm wondering: do our supported build host platforms all include > compilers that are new enough to let us redefine typedefs? > > The ability to redefine typedefs is a C11 feature which would be > very useful for simplifying our QOM boilerpl

Re: [PATCH V1 17/32] util: env var helpers

* Steve Sistare (steven.sist...@oracle.com) wrote: > Add functions for saving fd's and ram extents in the environment via > setenv, and for reading them back via getenv. > > Signed-off-by: Steve Sistare > Signed-off-by: Mark Kanda This is an awful lot of env stuff - how about dumping all this s

Re: [PATCH V1 16/32] oslib: add qemu_clr_cloexec

* Steve Sistare (steven.sist...@oracle.com) wrote: > Signed-off-by: Steve Sistare Seems same as set, so: Reviewed-by: Dr. David Alan Gilbert > --- > include/qemu/osdep.h | 1 + > util/oslib-posix.c | 9 + > util/oslib-win32.c | 4 > 3 files changed, 14 insertions(+) > > diff

Re: [PATCH V1 15/32] vl: QEMU_START_FREEZE env var

* Steve Sistare (steven.sist...@oracle.com) wrote: > For qemu upgrade and restart, we will re-exec() qemu with the same argv. > However, qemu must start in a paused state and wait for the cprload command, > and the original argv might not contain the -S option. To avoid modifying > argv, provide t

Redefinition of typedefs (C11 feature)

I'm wondering: do our supported build host platforms all include compilers that are new enough to let us redefine typedefs? The ability to redefine typedefs is a C11 feature which would be very useful for simplifying our QOM boilerplate code. The feature is supported by GCC since 2011 (v4.6.0)[1]

Re: [PATCH V1 14/32] savevm: VMS_RESTART and cprsave restart

* Steve Sistare (steven.sist...@oracle.com) wrote: > Add the VMS_RESTART variant of vmstate, for use when upgrading qemu in place > on the same host without a reboot. Invoke it using: > cprsave restart > > VMS_RESTART supports guest ram mapped by private anonymous memory, versus > VMS_REBOOT w

Re: [PATCH V1 13/32] gdbstub: gdb support for suspended state

* Steve Sistare (steven.sist...@oracle.com) wrote: > Modify the gdb server so a continue command appears to resume execution > when in RUN_STATE_SUSPENDED. Do not print the next gdb prompt, but do not > actually resume instruction fetch. While in this "fake" running mode, a > ctrl-C returns the u

Re: [PATCH v5 3/8] s390/sclp: read sccb from mem based on provided length

On 9/10/20 1:56 PM, Collin Walling wrote: > On 9/10/20 1:50 PM, Thomas Huth wrote: >> On 10/09/2020 11.36, Collin Walling wrote: >>> The header contained within the SCCB passed to the SCLP service call >>> contains the actual length of the SCCB. Instead of allocating a static >>> 4K size for the wo

[PATCH 9/9] piix4: don't reserve hw resources when hotplug is off globally

When acpi hotplug is turned off for both root pci bus as well as for pci bridges, we should not generate the related amls for DSDT table or initialize related hw ports or reserve hw resources. This change makes sure all those operations are turned off in the case acpi pci hotplug is off globally.

Re: [PATCH v1 0/3] unit tests for change 'do not add hotplug related amls for cold plugged bridges'

On Fri, Sep 11, 2020 at 9:51 PM Ani Sinha wrote: > > I can't repro the breakage. What test command line are you running > with? I am using " make check-qtest-x86_64 V=1" Ok I was working off v5.1.0 tag. Did not realize. I rebased all my patches to the latest master and reworked the unit tests. I

[PATCH 8/9] tests/acpi: add newly added acpi DSDT table blob for pci bridge hotplug flag

This patch adds a binary blob corresponding to the DSDT acpi table. It is used to unit test the flag 'acpi-pci-hotplug-with-bridge-support' used with pci bridges. This change also clears the file tests/qtest/bios-tables-test-allowed-diff.h so that future changes which affect the table can be caugh

Re: [PATCH v3] i440fx/acpi: do not add hotplug related amls for cold plugged bridges

On Fri, Sep 11, 2020 at 9:39 PM Michael S. Tsirkin wrote: > > On Fri, Sep 11, 2020 at 09:35:42PM +0530, Ani Sinha wrote: > > On Fri, Sep 11, 2020 at 9:22 PM Michael S. Tsirkin wrote: > > > > > > On Thu, Sep 10, 2020 at 12:19:19AM +0530, Ani Sinha wrote: > > > > On Sep 10, 2020, 00:00 +0530, Ani S

[PATCH 5/9] i440fx/acpi: do not add hotplug related amls for cold plugged bridges

Cold plugged bridges are not hot unpluggable, even when their hotplug property (acpi-pci-hotplug-with-bridge-support) is turned off. Please see the function acpi_pcihp_pc_no_hotplug() (thanks Julia). However, with the current implementaton, windows would try to hot-unplug a pci bridge when it's hot

[PATCH 6/9] tests/acpi: list added acpi table binary file for pci bridge hotplug test

The file 'tests/data/acpi/pc/DSDT.hpbridge' is a newly added acpi table file for testing the pci bridge option 'acpi-pci-hotplug-with-bridge-support' under i440fx. This change documents this fact. Signed-off-by: Ani Sinha --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + 1 file changed, 1

[PATCH 7/9] tests/acpi: unit test for 'acpi-pci-hotplug-with-bridge-support' bridge flag

This change adds a new unit test for the global flag 'acpi-pci-hotplug-with-bridge-support' which is available for cold plugged pci bridges in i440fx. The flag can be used to turn off acpi based hotplug support for all the slots of the pci bus. Tested on the upstream qemu master branch. Signed-of

[PATCH 2/9] tests/acpi: add a new unit test to test hotplug off/on feature on the root pci bus

Ability to turn hotplug off on the pci root bus for i440fx was added in commit: 3d7e78aaf0 ("Introduce a new flag for i440fx to disable PCI hotplug on the root bus") This change adds a unit test in order to test this feature. This change has been tested against upstream qemu master branch on

[PATCH 4/9] Fix a gap where acpi_pcihp_find_hotplug_bus() returns a non-hotpluggable bus

When ACPI hotplug for the root bus is disabled, the bsel property for that bus is not set. Please see the following commit: 3d7e78aaf ("Introduce a new flag for i440fx to disable PCI hotplug on the root bus"). As a result, when acpi_pcihp_find_hotplug_bus() is called with bsel set to 0, it m

[PATCH 3/9] tests/acpi: add a new ACPI table in order to test root pci hotplug on/off

A new binary ACPI table tests/data/acpi/pc/DSDT.roothp is added in order to unit test hotplug on/off capability on the root pci bus for i440fx. The diff between the table DSDT.bridge and DSDT.roothp is listed below: @@ -1,30 +1,30 @@ /* * Intel ACPI Component Architecture * AML/ASL+ Disassemb

[PATCH 1/9] tests/acpi: document addition of table DSDT.roothp for unit testing root pci hotplug on/off

A new binary acpi table tests/data/acpi/pc/DSDT.roothp is added in order to unit test the feature flag that can disable/enable root pci bus hotplug on i440fx. This feature was added with the commit: 3d7e78aaf0 ("Introduce a new flag for i440fx to disable PCI hotplug on the root bus") This c

Re: [PATCH V1 12/32] vl: pause option

* Steven Sistare (steven.sist...@oracle.com) wrote: > On 7/30/2020 1:03 PM, Alex Bennée wrote: > > > > Steve Sistare writes: > > > >> Provide the -pause command-line parameter and the QEMU_PAUSE environment > >> variable to briefly pause QEMU in main and allow a developer to attach gdb. > >> Us

Re: [PULL v3] Block layer patches

On Thu, 10 Sep 2020 at 10:15, Kevin Wolf wrote: > > The following changes since commit 7c37270b3fbe3d034ba80e488761461676e21eb4: > > Merge remote-tracking branch 'remotes/kraxel/tags/ui-20200904-pull-request' > into staging (2020-09-06 16:23:55 +0100) > > are available in the Git repository at:

Re: [PATCH V1 11/32] cpu: disable ticks when suspended

* Steve Sistare (steven.sist...@oracle.com) wrote: > After cprload, the guest console misbehaves. You must type 8 characters > before any are echoed to the terminal. Qemu was not sending interrupts > to the guest because the QEMU_CLOCK_VIRTUAL timers_state.cpu_clock_offset > was bad. The offset

Re: PATCH: Increase System Firmware Max Size

I’d be happy to rewrite as a property. Erich Get Outlook for iOS From: Dr. David Alan Gilbert Sent: Friday, September 11, 2020 11:59 AM To: Laszlo Ersek Cc: McMillan, Erich; qemu-devel@nongnu.org; m...@redhat.com; marcel.apfelb...@gmail.co

Re: [PATCH V1 10/32] kvmclock: restore paused KVM clock

* Steve Sistare (steven.sist...@oracle.com) wrote: > If the VM is paused when the KVM clock is serialized to a file, record > that the clock is valid, so the value will be reused rather than > overwritten after cprload with a new call to KVM_GET_CLOCK here: > > kvmclock_vm_state_change() > if

Re: [PATCH V1 09/32] savevm: prevent cprsave if memory is volatile

* Steve Sistare (steven.sist...@oracle.com) wrote: > cprsave and cprload require that guest ram be backed by an externally > visible shared file. Check that in cprsave. > > Signed-off-by: Steve Sistare > --- > exec.c| 32 > include/exec/memory.h

[PATCH v4 1/2] sifive_e: Rename memmap enum constants

Some of the enum constant names conflict with a QOM type check macro (SIFIVE_E_PRCI). This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to SIFIVE_E_DEV_*, to avoid conflicts. Signed-off-by: Ed

[PATCH v4 0/2] riscv: Rename memmap enum constants

Resending the enum constant rename patches from a previous QOM cleanup series[1] separately, because of conflicts with other sifive patches. Series based on tags/pull-riscv-to-apply-20200910 [2] [1] [PATCH v3 00/74] qom: Automated conversion of type checking boilerplate https://lore.kernel.o

[PATCH v4 2/2] sifive_u: Rename memmap enum constants

Some of the enum constant names conflict with the QOM type check macros (SIFIVE_U_OTP, SIFIVE_U_PRCI). This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to SIFIVE_U_DEV_*, to avoid conflicts.

Re: [RFC] QEMU as Xcode project on macOS

On Freitag, 11. September 2020 19:19:05 CEST Paolo Bonzini wrote: > On 10/09/20 16:40, Christian Schoenebeck wrote: > > If it turns out to work fine, then maybe I just push a branch of QEMU for > > Mac developers somewhere for a while, as I think it would lower the entry > > level for new developer

Re: [PATCH] MAINTAINERS: add Paolo Bonzini as RCU maintainer

On 09/09/20 11:08, Stefan Hajnoczi wrote: > The RCU code that Paolo maintains is missing a MAINTAINERS file entry. > > Signed-off-by: Stefan Hajnoczi > --- > MAINTAINERS | 8 > 1 file changed, 8 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 7d0a5e91e4..50296caac4 100

Re: [PATCH V1 08/32] savevm: HMP command for cprinfo

* Steve Sistare (steven.sist...@oracle.com) wrote: > Enable HMP access to the cprinfo QMP command. > > Usage: cprinfo > > Signed-off-by: Steve Sistare As with Eric's comment on the qemp I don't think you need it; for HMP alll you really need is something that lists it in the help. (Also I'd ex

Re: [PATCH v2] configure: Do not intent to build WHPX on 32-bit host

On 9/11/20 7:18 PM, Eric Blake wrote: > On 9/10/20 12:45 AM, Philippe Mathieu-Daudé wrote: > > In the subject, s/intent/attempt/ Oops thanks... Paolo can you fix that directly, or should I repost? > >> Hyper-V is available on 64-bit versions of Windows, >> do not try to build its support on 32-

Re: [PATCH 1/1] accel/tcg/user-exec: support computing is_write for mips32

On 9/11/20 6:55 PM, Richard Henderson wrote: > On 9/11/20 3:41 AM, Peter Maydell wrote: >>> +/* Detect store by reading the instruction at the program counter. */ >>> +uint32_t insn = *(uint32_t *)pc; >>> +switch(insn>>29) { >>> +case 0x5: >>> +switch((insn>>26) & 0x7) { >>

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