The device introspect test in qtest emits some warnings with the
the pnv machine types during the "nodefaults" phase:
TEST check-qtest-ppc64: tests/qtest/device-introspect-test
qemu-system-ppc64: warning: machine has no BMC device. Use '-device
ipmi-bmc-sim,id=bmc0 -device isa-ipmi-bt,bmc=bmc0,irq
> -Original Message-
> From: Dr. David Alan Gilbert
> Sent: Wednesday, June 17, 2020 8:26 PM
> To: Zhang, Chen
> Cc: qemu-dev ; Zhang Chen
> ; Zhanghailiang
> Subject: Re: [PATCH V3 0/3] migration/colo: Optimize COLO framework code
>
> * Zhang, Chen (chen.zh...@intel.com) wrote:
> >
On 6/21/20 12:58 AM, Philippe Mathieu-Daudé wrote:
> We have 2 distinct PCA9552 devices. Set their description
> to distinguish them when looking at the trace events.
It's nice and usefull but couldn't we do the same with a QOM object name ?
C.
>
> Description name taken from:
> https://githu
On 6/21/20 12:58 AM, Philippe Mathieu-Daudé wrote:
> Add a trivial representation of the PCA9552 GPIOs.
>
> Example booting obmc-phosphor-image:
>
> $ qemu-system-arm -M witherspoon-bmc -trace pca9552_gpio_status
> 1592689902.327837:pca9552_gpio_status pca-unspecified GPIOs 0-15
> [*
From: Bin Meng
The RISC-V generic platform is a flattened device tree (FDT) based
platform where all platform specific functionality is provided based
on FDT passed by previous booting stage. The support was added in
the upstream OpenSBI v0.8 release recently.
Update our Makefile to build the ge
From: Bin Meng
This updates the GitLab CI opensbi job to build opensbi bios images
for the generic platform.
Signed-off-by: Bin Meng
Reviewed-by: Anup Patel
---
Changes in v2:
- Include ELF images in the artifacts
.gitlab-ci.d/opensbi.yml | 28 ++--
1 file changed,
From: Bin Meng
Upgrade OpenSBI from v0.7 to v0.8.
The v0.8 release includes the following commits:
1bb00ab lib: No need to provide default PMP region using platform callbacks
a9eac67 include: sbi_platform: Combine reboot and shutdown into one callback
6585fab lib: utils: Add SiFive test device
From: Bin Meng
To keep sync with other RISC-V machines, change the default bios to
use generic platform image.
While we are here, add some comments to mention that using ELF files
for the Spike machine was intentional.
Signed-off-by: Bin Meng
Reviewed-by: Anup Patel
Reviewed-by: Alistair Fran
From: Bin Meng
Signed-off-by: Bin Meng
---
Changes in v2:
- new patch: Makefile: Ship the generic platform bios images for RISC-V
Makefile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile
index 48f23aa..ddd7c43 100644
--- a/Makefile
+++ b/Makefile
@
From: Bin Meng
Update virt and sifive_u machines to use the opensbi bios image
built for the generic FDT platform.
Remove the out-of-date no longer used bios images.
Signed-off-by: Bin Meng
Reviewed-by: Anup Patel
Reviewed-by: Alistair Francis
---
(no changes since v1)
hw/riscv/sifive_u.c
From: Bin Meng
The RISC-V generic platform is a flattened device tree (FDT) based
platform where all platform specific functionality is provided based
on FDT passed by previous booting stage. The support was added in
the upstream OpenSBI v0.8 release recently.
This series updates QEMU to switch
From: Bin Meng
Now we need to ship the OpenSBI fw_jump.elf image for the
RISC-V Spike machine, it requires us to create symbolic
links for pc-bios/*.elf files.
Signed-off-by: Bin Meng
---
Changes in v2:
- new patch: configure: Create symbolic links for pc-bios/*.elf files
configure | 1 +
1
On 6/21/20 12:58 AM, Philippe Mathieu-Daudé wrote:
> Add a description field to distinguish between multiple devices.
Reviewed-by: Cédric Le Goater
Could it be a QOM attribute ?
C.
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/misc/pca9552.h | 1 +
> hw/misc/pca9552.c
On 6/21/20 12:58 AM, Philippe Mathieu-Daudé wrote:
> Replace the '16' magic value by the PCA9552_PIN_COUNT definition.
Reviewed-by: Cédric Le Goater
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/misc/pca9552.h | 1 +
> hw/misc/pca9552.c | 2 +-
> 2 files changed, 2 inse
On 6/21/20 12:58 AM, Philippe Mathieu-Daudé wrote:
> The current code models the PCA9552, but there are comments
> saying the code could be easily adapted for the rest of the
> PCA955x family.
> Since we assume we have at most 16 pins (for the PCA9552),
> add a definition and check the instance doe
Since commit
ba3e7926691e ("icount: clean up cpu_can_io at the entry to the block")
it has been unnecessary for target code to call gen_io_end() after an IO
instruction in icount mode; it is sufficient to call gen_io_start()
before it and to force the end of the TB.
Remaining call in xtensa target
19.06.2020 22:56, Eric Blake wrote:
From: John Snow
Signed-off-by: John Snow
Message-Id: <20200514034922.24834-5-js...@redhat.com>
Signed-off-by: Eric Blake
---
tests/qemu-iotests/257| 110 +---
tests/qemu-iotests/bitmaps.py | 131 +++
On Fri, Jun 19, 2020 at 10:05 AM Peter Maydell wrote:
> I've just sent a patch that removes the target/arm gen_io_end() calls.
> I had a quick look at sparc, xtensa and ppc, but they were too complicated
> for a quick look to be sufficient :-)
I've checked the xtensa translator. The only gen_io_e
19.06.2020 22:56, Eric Blake wrote:
From: John Snow
They have the same fields -- rename it BlockJobActionState.
commit/abort/clean functions are identical after it. I think better to combine
them as well here
Signed-off-by: John Snow
Signed-off-by: Eric Blake
---
blockdev.c | 30 +
On Sun, Jun 21, 2020 at 06:21:31PM +0200, Szymon Lukasz wrote:
> Implement the part of the virtio spec that allows to notify the virtio
> driver about terminal resizes. The virtio spec contains two methods to
> achieve that:
>
> For legacy drivers, we have only one port and we put the terminal siz
Hi,
On Sun, Dec 15, 2019 at 2:40 PM wrote:
>
> Hello
>
> Anything suspicious that anyone can spot in here?? Still cannot get qemu to
> compile
>
> Keen to hear
>
> -Original Message-
> From: aijaz.b...@protonmail.com
> Sent: Saturday, December 7, 2019 11:25 AM
> To: 'Daniel P. Berrangé'
real_dirty_pages becomes equal to total ram size after dirty log sync
in ram_init_bitmaps, the reason is that the bitmap of ramblock is
initialized to be all set, so old path counts them as "real dirty" at
beginning.
This causes wrong dirty rate and false positive throttling.
Signed-off-by: Keqia
On Fri, Jun 19, 2020 at 04:40:46PM -0600, Alex Williamson wrote:
> On Tue, 9 Jun 2020 20:37:31 -0400
> Yan Zhao wrote:
>
> > On Fri, Jun 05, 2020 at 03:39:50PM +0100, Dr. David Alan Gilbert wrote:
> > > > > > I tried to simplify the problem a bit, but we keep going backwards.
> > > > > > If
> >
On Wed, 17 Jun 2020, at 13:11, Philippe Mathieu-Daudé wrote:
> Hi Andrew,
>
> On 6/17/20 3:18 AM, Andrew Jeffery wrote:
> > On Tue, 16 Jun 2020, at 17:21, Philippe Mathieu-Daudé wrote:
> >> The current implementation uses nano-second precision, while
> >> the watchdog can not be more precise th
On Fri, Jun 19, 2020 at 1:40 PM Max Reitz wrote:
>
> Hi,
>
> As discussed here:
>
> https://lists.nongnu.org/archive/html/qemu-block/2020-02/msg00644.html
> https://lists.nongnu.org/archive/html/qemu-block/2020-04/msg00329.html
> https://lists.nongnu.org/archive/html/qemu-block/2020-06/msg00240.ht
On 6/21/20 9:23 PM, Richard Henderson wrote:
> On 6/20/20 4:07 PM, Philippe Mathieu-Daudé wrote:
>> Track the LED intensity, and emit a trace event when it changes.
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> include/hw/misc/led.h | 1 +
>> hw/misc/led.c | 5 +
>> hw/misc/tr
On Sat, Jun 20, 2020 at 14:45:51 -0700, Richard Henderson wrote:
> Use <= comparisons vs the threshold, so that threshold UINT64_MAX
> is always true, corresponding to rate 1.0 being unity. Simplify
> do_threshold scaling to 2**64, with a special case for 1.0.
>
> Cc: Emilio G. Cota
> Signed-off
On 6/21/20 11:00 PM, Richard Henderson wrote:
> On 6/20/20 4:07 PM, Philippe Mathieu-Daudé wrote:
>> +DeviceState *led[2];
>
> Perhaps better as LEDState? And perhaps return that from create_led.
I guess I first thought about using an opaque structure
with forward typedef declaration, but in
On 6/20/20 4:07 PM, Philippe Mathieu-Daudé wrote:
> @@ -25,6 +25,7 @@ typedef struct {
>
> /*< public >*/
> MemoryRegion iomem;
> +DeviceState *led[8];
LEDState?
> +for (size_t i = 0; i < ARRAY_SIZE(s->led); i++) {
> +led_set_state(LED(s->led[i]), !!extract32(v
On 6/20/20 4:07 PM, Philippe Mathieu-Daudé wrote:
> +DeviceState *led[2];
Perhaps better as LEDState? And perhaps return that from create_led.
r~
On 6/20/20 4:07 PM, Philippe Mathieu-Daudé wrote:
> The Witherspoon has 3 LEDs connected to a PCA9552. Add them.
> The names and reset values are taken from:
> https://github.com/open-power/witherspoon-xml/blob/master/witherspoon.xml
>
> Example booting obmc-phosphor-image:
>
> $ qemu-system-ar
On 6/21/20 1:35 PM, Philippe Mathieu-Daudé wrote:
>> Is color especially interesting, given that we only actually "display" the
>> color via tracing?
>
> The idea of this device is to easily visualize events. Currently
> via tracing, but eventually an external UI could introspect the
> board for d
Hi Richard,
On 6/21/20 4:00 AM, Richard Henderson wrote:
> On 6/20/20 4:07 PM, Philippe Mathieu-Daudé wrote:
>> Add a LED device which can be connected to a GPIO output.
>> LEDs are limited to a set of colors.
>> They can also be dimmed with PWM devices. For now we do
>> not implement the dimmed m
On Wed, Jun 10, 2020 at 16:55:06 +0100, Alex Bennée wrote:
> Any write to a device might cause a re-arrangement of memory
> triggering a TLB flush and potential re-size of the TLB invalidating
> previous entries. This would cause users of qemu_plugin_get_hwaddr()
> to see the warning:
>
> invali
On 6/20/20 4:07 PM, Philippe Mathieu-Daudé wrote:
> Track the LED intensity, and emit a trace event when it changes.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/misc/led.h | 1 +
> hw/misc/led.c | 5 +
> hw/misc/trace-events | 1 +
> 3 files changed, 7 insertions(+)
On 6/20/20 4:07 PM, Philippe Mathieu-Daudé wrote:
> Some devices expose GPIO lines. Add the create_led_by_gpio_id()
> helper to connect a LED to such GPIO.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> Adding support for named GPIO is trivial. We don't need it yet.
> ---
> include/hw/misc/le
On 6/21/20 2:47 PM, Alex Bennée wrote:
>
> Philippe Mathieu-Daudé writes:
>
>> On 6/21/20 1:29 AM, Philippe Mathieu-Daudé wrote:
>>> As we just want the tests to succeed, build them with compiler
>>> optimizations enabled to run the tests faster.
>>
>> Maybe it is a good opportunity to test -O3
On 6/21/20 1:07 AM, Philippe Mathieu-Daudé wrote:
> Per the 'ARM MPS2 and MPS2+ FPGA Prototyping Boards Technical
> Reference Manual' (100112_0200_07_en):
>
> 2.1 Overview of the MPS2 and MPS2+ hardware
>
>The MPS2 and MPS2+ FPGA Prototyping Boards contain the
>following compon
On 6/21/20 1:07 AM, Philippe Mathieu-Daudé wrote:
> The recently added LED device reports LED status changes with
> the 'led_set_intensity' trace event. It is less invasive than
> the fprintf() calls. We need however to have a binary built
> with tracing support.
>
> Signed-off-by: Philippe Mathie
If a virtio serial port is a console port forward terminal resize
messages from the chardev backend to the guest.
Signed-off-by: Szymon Lukasz
---
hw/char/virtio-console.c | 64 +---
1 file changed, 60 insertions(+), 4 deletions(-)
diff --git a/hw/char/virtio
Extend the class of chardevs with a new function - chr_get_winsize.
A chardev backend should implement if it is able to get the size of
the connected terminal and can detect changes in the terminal size,
i.e. if the backend cannot detect resizes it must not implement this
(e.g. if we have a tty bac
Implement chr_get_winsize for the stdio backend
and trigger CHR_EVENT_RESIZE upon SIGWINCH delivery.
Signed-off-by: Szymon Lukasz
---
chardev/char-stdio.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/chardev/char-stdio.c b/chardev/char-stdio.c
index 82e
Block SIGWINCH, so it is delivered only via signalfd.
Install a handler that uses NotifierList to tell
interested parties about SIGWINCH delivery.
Signed-off-by: Szymon Lukasz
---
include/qemu/main-loop.h | 4
ui/curses.c | 11 ++-
util/main-loop.c | 21 +++
Implement the part of the virtio spec that allows to notify the virtio
driver about terminal resizes. The virtio spec contains two methods to
achieve that:
For legacy drivers, we have only one port and we put the terminal size
in the config space and inject the config changed interrupt.
For multi
Add a new chardev event, CHR_EVENT_RESIZE, which a backend should
trigger if detects the size of the connected terminal changed.
Signed-off-by: Szymon Lukasz
---
backends/cryptodev-vhost-user.c | 1 +
chardev/char.c | 1 +
hw/block/vhost-user-blk.c | 1 +
hw/char/terminal3
The goal of this series is to have a nice terminal into a Linux guest
without having to set up networking and using, e.g. ssh.
The virtio spec allows a virtio-console device to notify the guest about
terminal resizes in the host. Linux Kernel implements the driver part of
the spec. This series imp
These functions have a parameter that decides the direction of
transfer but totally confusingly they don't match but inverted sense.
To avoid frequent mistakes when using these functions change
i2c_send_recv to match i2c_start_transfer. Also use bool in
i2c_start_transfer instead of int to match i2
>Hi
>
>On Sun, Jun 21, 2020 at 10:54 AM lichun wrote:
>>
>> Signed-off-by: lichun
>> ---
>> chardev/char-socket.c | 5 -
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/chardev/char-socket.c b/chardev/char-socket.c
>> index afebeec5c3..3b6c1c5848 100644
>> --- a/chardev/
Signed-off-by: lichun
---
chardev/char-socket.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/chardev/char-socket.c b/chardev/char-socket.c
index afebeec5c3..569d54c144 100644
--- a/chardev/char-socket.c
+++ b/chardev/char-socket.c
@@ -142,6 +142,8 @@ static void check_rep
Hi I'm trying to create a qemu virtual machine that runs windows 10. I
would like to try to make it almost indistinguishable from a real computer
(I know it's impossible, but at least I get close). I have already changed
any suspicious identifiers (smbios, hard disk, card network and so on,
host-pa
From: Richard Henderson
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Message-Id: <20190531134315.4109-16-
From: Philippe Mathieu-Daudé
Add two tests for the rx-gdbsim machine, based on the recommended
test setup from Yoshinori Sato:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html
- U-Boot prompt
- Linux kernel with Sash shell
These are very quick tests:
$ avocado run -t arch:
From: Yoshinori Sato
Add rx-virt target specification document.
Signed-off-by: Yoshinori Sato
Message-Id: <20200308130637.37651-1-ys...@users.sourceforge.jp>
[PMD: Cover in MAINTAINERS, rename as gdbsim, use machine argument]
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
From: Yoshinori Sato
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu
Make the current TYPE_RX62N_MCU an abstract class, and
generate TYPE_R5F562N7_MCU and TYPE_R5F562N8_MCU models.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/rx/rx62n.h | 19 -
hw/rx/rx62n.c | 92 ---
From: Yoshinori Sato
Add the RX machine internally simulated in GDB.
Signed-off-by: Yoshinori Sato
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
[PMD: Use TYPE_RX62N_CPU, use #define for RX62N_NR_TMR/CMT/SCI,
renamed CPU -> MCU, devic
From: Yoshinori Sato
renesas_tmr: 8bit timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Tested-
From: Yoshinori Sato
rx62n - RX62N cpu.
Signed-off-by: Yoshinori Sato
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
[PMD: Use TYPE_RX62N_CPU, use #define for RX62N_NR_TMR/CMT/SCI,
renamed CPU -> MCU, device -> microcontroller]
Signed-
Renesas peripherals are common to SH4/RX based MCUs. Their
datasheets share common sections. It makes sense to maintain
them altogether.
Add the uncovered UART SCI peripheral.
The current names are misleading (see the 'sh_' prefix).
In another series we will remove these peripherals with
the 'renes
Remove unused "qemu/timer.h" include.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
hw/timer/sh_timer.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c
index b9cbacf5d0..bb0e1c8ee5 100644
--- a/hw/timer/sh_timer.c
+++ b/hw/
From: Yoshinori Sato
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
From: Yoshinori Sato
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daud
The following changes since commit 06c4cc3660b366278bdc7bc8b6677032d7b1118c:
qht: Fix threshold rate calculation (2020-06-19 18:29:11 +0100)
are available in the Git repository at:
https://gitlab.com/philmd/qemu.git tags/renesas-hw-20200621
for you to fetch changes up to
Use the MemoryRegion type defined in "qemu/typedefs.h",
to keep the repository style consistent.
Reviewed-by: Richard Henderson
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sh4/sh.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/includ
Commit 81527b94ad added hw/intc/sh_intc.c, but only to the R2D
machine (it is also used by the Shix machine). Complete the
previous commit by adding the header to the R2D section, and
both source + header to the Shix section.
Suggested-by: Thomas Huth
Reviewed-by: Thomas Huth
Signed-off-by: Phil
Extract timer definitions to 'hw/timer/tmu012.h'.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sh4/sh.h | 9 -
include/hw/timer/tmu012.h | 23 +++
hw/sh4/sh7750.c | 1 +
hw/timer/sh_timer.c | 2 ++
4 fil
Philippe Mathieu-Daudé writes:
> On 6/21/20 1:29 AM, Philippe Mathieu-Daudé wrote:
>> As we just want the tests to succeed, build them with compiler
>> optimizations enabled to run the tests faster.
>
> Maybe it is a good opportunity to test -O3 instead...
> Since this configuration is not cove
Hi
On Sun, Jun 21, 2020 at 10:54 AM lichun wrote:
>
> Signed-off-by: lichun
> ---
> chardev/char-socket.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/chardev/char-socket.c b/chardev/char-socket.c
> index afebeec5c3..3b6c1c5848 100644
> --- a/chardev/char-socket.
On 6/21/20 1:29 AM, Philippe Mathieu-Daudé wrote:
> As we just want the tests to succeed, build them with compiler
> optimizations enabled to run the tests faster.
Maybe it is a good opportunity to test -O3 instead...
Since this configuration is not covered.
>
> Signed-off-by: Philippe Mathieu-D
Hi Pavel,
On 5/29/20 9:05 AM, Pavel Dovgalyuk wrote:
> This patch adds more record/replay tests with kernel images.
>
> Signed-off-by: Pavel Dovgalyuk
>
> --
>
> v2:
> - make download path fixed to allow pre-test downloading (suggested by
> Willian Rampazzo)
> ---
> 0 files changed
>
> dif
Public bug reported:
QEMU Release version: 5.0.50 (v5.0.0-1411-g26bf4a2921-dirty)
Full command line: qemu-system-mips64el -hda nt4svr.qcow2 -M magnum -L .
-global ds1225y.filename=nvram -global ds1225y.size=8200 -net nic -net
user -cdrom en_winnt_4.0_svr.iso
Host machine: Windows 10 1909 64-bit
On Wed, 17 Jun 2020, Philippe Mathieu-Daudé wrote:
On 6/17/20 8:08 PM, BALATON Zoltan wrote:
Hello,
I've noticed that configure creates roms/vgabios/config.mak but commit
91b8eba9ec3f5af7dd48927811eb7ff69fc4617f seems to have removed vgabios
so should this be dropped from configure now as well?
Do not abort on unsupported value just print log and continue. While
display will likely be broken this prevents malicious guest to crash
QEMU causing denial of service.
Signed-off-by: BALATON Zoltan
---
hw/display/ati.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/disp
These are some patches I had lying around in my tree, maybe it's time
to merge them.
BALATON Zoltan (3):
ati-vga: Support unaligned access to hardware cursor registers
ati-vga: Do not assert on error
ati-vga: Add dummy MEM_SDRAM_MODE_REG
hw/display/ati.c | 92 +
This fixes horizontal mouse movement and pointer color with MacOS that
writes these registers with access size less than 4 so previously only
the last portion of access was effective overwriting previous partial
writes.
Signed-off-by: BALATON Zoltan
---
hw/display/ati.c | 87
Radeon chips have an SDRAM mode reg that is accessed by some drivers.
We don't emulate the memory controller but provide some default value
to prevent drivers getting unexpected 0.
Signed-off-by: BALATON Zoltan
---
hw/display/ati.c | 5 +
hw/display/ati_dbg.c | 1 +
hw/display/ati_regs
Signed-off-by: lichun
---
chardev/char-socket.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/chardev/char-socket.c b/chardev/char-socket.c
index afebeec5c3..3b6c1c5848 100644
--- a/chardev/char-socket.c
+++ b/chardev/char-socket.c
@@ -1086,7 +1086,10 @@ static void qemu
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