On 6/15/20 10:58 PM, BALATON Zoltan wrote:
> On Mon, 15 Jun 2020, Markus Armbruster wrote:
>> macio_oldworld_init() creates a "macio-nvram", sysbus device, but
>> neglects to but it on a bus.
>
> This letter ^ is upside down :-) (but -> put).
Not sure this is the reason, but Markus is German, a
From: Sai Pavan Boddu
Set ISR according to queue in use, added interrupt support for
all queues.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Jason Wang
---
hw/net/cadence_gem.c | 27 +--
1 file changed, 17 insertions(+), 10 deletions(-
From: Sai Pavan Boddu
Moving this buffers to CadenceGEMState, as their size will be increased
more when JUMBO frames support is added.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Jason Wang
---
hw/net/cadence_gem.c | 38 +--
From: Sai Pavan Boddu
Add a property "jumbo-max-len", which sets default value of jumbo frames
up to 16,383 bytes. Add Frame length checks for standard and jumbo
frames.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Jason Wang
---
hw/net/cadence_gem.c |
From: Sai Pavan Boddu
Q1 to Q7 ISR's are clear-on-read, IER/IDR registers
are write-only, mask reg are read-only.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Jason Wang
---
hw/net/cadence_gem.c | 14 ++
1 file changed, 14 insertions(+)
diff --git
From: Thomas Huth
Now that the "name" parameter is gone, there is hardly any difference
between NetLegacy and Netdev anymore, so we can drop NetLegacy and always
use Netdev to simplify the code quite a bit.
The only two differences that were really left between Netdev and NetLegacy:
1) NetLegac
From: Sai Pavan Boddu
Set irq's specific to a queue, present implementation is setting q1 irq
based on q0 status.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Jason Wang
---
hw/net/cadence_gem.c | 25 +++--
1 file changed, 3 insertions(+),
On 6/15/20 10:02 AM, Markus Armbruster wrote:
Michal Privoznik writes:
To simplify internal implementation the hmat-cache parsing code
expects hmat-lb to be already parsed. This means, that hmat-lb
arguments must come before hmat-cache. Document this restriction
so that management applications
From: Derek Su
The patch is to fix the "pkt" memory leak in packet_enqueue().
The allocated "pkt" needs to be freed if the colo compare
primary or secondary queue is too big.
Replace the error_report of full queue with a trace event.
Signed-off-by: Derek Su
Reviewed-by: Zhang Chen
Reviewed-by
From: Yuri Benditovich
Save and restore RSS/hash report configuration.
Signed-off-by: Yuri Benditovich
Signed-off-by: Jason Wang
---
hw/net/virtio-net.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index 6
From: Helge Deller
The tulip network driver in a qemu-system-hppa emulation is broken in
the sense that bigger network packages aren't received any longer and
thus even running e.g. "apt update" inside the VM fails.
The breakage was introduced by commit 8ffb7265af ("check frame size and
r/w data
From: Sai Pavan Boddu
During wrap around and reset, queues are pointing to initial base
address of queue 0, irrespective of what queue we are dealing with.
Fix it by assigning proper base address every time.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Jason Wan
From: Lukas Straub
Else the log will be flooded if there is a lot of network
traffic.
Signed-off-by: Lukas Straub
Reviewed-by: Zhang Chen
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Zhang Chen
Signed-off-by: Jason Wang
---
net/colo-compare.c | 10 +
From: Yuri Benditovich
Suggest VIRTIO_NET_F_HASH_REPORT if specified in device
parameters.
If the VIRTIO_NET_F_HASH_REPORT is set,
the device extends configuration space. If the feature
is negotiated, the packet layout is extended to
accomodate the hash information. In this case deliver
packet's
From: Yuri Benditovich
Removal of duplicated RSC definitions. Changing names of the
fields to ones defined in the Linux header.
Signed-off-by: Yuri Benditovich
Signed-off-by: Jason Wang
---
hw/net/virtio-net.c | 28
1 file changed, 4 insertions(+), 24 deletions(-)
From: Sai Pavan Boddu
Enabling debug breaks the build, Fix them and make debug statements
always compilable. Fix few statements to use sized integer casting.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Jason Wang
---
hw/net/cadence_gem.c | 27 +---
From: Philippe Mathieu-Daudé
Log with GUEST_ERROR what the guest is doing wrong.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Jason Wang
---
hw/net/tulip.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/net/tulip.c b/hw/net/tulip.c
index 57ecbe2..4487fd6 100644
--- a/hw/
From: Yuri Benditovich
Signed-off-by: Yuri Benditovich
Signed-off-by: Jason Wang
---
net/tap.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/tap.c b/net/tap.c
index 6207f61..ca48f2a 100644
--- a/net/tap.c
+++ b/net/tap.c
@@ -254,7 +254,8 @@ static void tap_set_vnet_
From: Yuri Benditovich
If VIRTIO_NET_F_RSS negotiated and RSS is enabled, process
incoming packets, calculate packet's hash and place the
packet into respective RX virtqueue.
Signed-off-by: Yuri Benditovich
Signed-off-by: Jason Wang
---
hw/net/virtio-net.c| 88
From: Yuri Benditovich
Similar to VMSTATE_VARRAY_UINT32_ALLOC, but the size is
16-bit field.
Signed-off-by: Michael S. Tsirkin
Signed-off-by: Yuri Benditovich
Signed-off-by: Jason Wang
---
include/migration/vmstate.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/mig
From: Philippe Mathieu-Daudé
Bit #14 is "DE" for 'Descriptor Error':
When set, indicates a frame truncation caused by a frame
that does not fit within the current descriptor buffers,
and that the 21143 does not own the next descriptor.
[Table 4-1. RDES0 Bit Fields Description]
Signed-o
The following changes since commit 7d3660e79830a069f1848bb4fa1cdf8f666424fb:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2020-06-12 23:06:22 +0100)
are available in the git repository at:
https://github.com/jasowang/qemu.git tags/net-pull-request
for you
From: Yuri Benditovich
Optionally report RSS feature.
Handle RSS configuration command and keep RSS parameters
in virtio-net device context.
Signed-off-by: Yuri Benditovich
Signed-off-by: Jason Wang
---
hw/net/trace-events| 3 +
hw/net/virtio-net.c| 167 +
On 16.06.20 08:33, Cornelia Huck wrote:
> On Tue, 16 Jun 2020 07:58:53 +0200
> Christian Borntraeger wrote:
>
>> On 16.06.20 06:50, Halil Pasic wrote:
>>> The atomic_cmpxchg() loop is broken because we occasionally end up with
>>> old and _old having different values (a legit compiler can gene
The FPGA system control block has 2 push-buttons labelled PB0/PB1.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/misc/mps2-fpgaio.h | 1 +
hw/misc/mps2-fpgaio.c | 13 -
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/include/hw/misc/mps2-fpgaio.h b/incl
On Tue, 16 Jun 2020 07:58:53 +0200
Christian Borntraeger wrote:
> On 16.06.20 06:50, Halil Pasic wrote:
> > The atomic_cmpxchg() loop is broken because we occasionally end up with
> > old and _old having different values (a legit compiler can generate code
> > that accessed *ind_addr again to pic
To differenciate with the CMSDK APB peripheral region,
rename this region 'CMSDK AHB peripheral region'.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index f246213206..3cc02c9018 100644
There are 4 different I2C peripherals on the FPGA APB.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 4a49bfa9b9..6224d7a63c 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -321,6 +321,7 @@
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 6224d7a63c..345ba551ab 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -38,6 +38,7 @@
#include "hw/timer/cmsdk-apb-timer.h"
#include "hw/timer
Register the GPIO peripherals as unimplemented to better
follow their accesses, for example booting Zephyr:
IN: arm_mps2_pinmux_init
0x1160: f64f 0231 movw r2, #0xf831
0x1164: 4b06 ldr r3, [pc, #0x18]
0x1166: 2000 movs r0, #0
0x
The dualtimer is connected to AMBA APB.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 3cc02c9018..1e8d5f21f9 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -306,7 +306,7 @@ static
Register the watchdog peripheral as unimplemented to better
follow its accesses, for example booting Zephyr:
IN: wdog_cmsdk_apb_init
0x0900: b508 push {r3, lr}
0x0902: 4b07 ldr r3, [pc, #0x1c]
0x0904: 4a07 ldr r2, [pc, #0x1c
Few patches while playing with Zephyr:
- added i2c
- added fpgaio
- added gpio/wdg as unimp
Unfortunately the blinkled sample app is not blinking.
Zephyr ressources used:
https://docs.zephyrproject.org/latest/boards/arm/mps2_an385/doc/index.html
Philippe Mathieu-Daudé (7):
hw/arm/mps2: Rename
On 2020/6/15 下午8:06, Thomas Huth wrote:
On 18/05/2020 20.01, Thomas Huth wrote:
Since commit b4983c570c7a ("net: Remove deprecated [hub_id name] tuple of
'hostfwd_add' / 'hostfwd_remove'"), the "name" parameter is not used
internally anymore. And it's been marked as deprecated since QEMU v3.1,
Hi, Thomas and Aleksandar,
On Tue, Jun 16, 2020 at 3:45 AM Aleksandar Markovic
wrote:
>
> On Mon, Jun 15, 2020 at 10:55 AM Thomas Huth wrote:
> >
> > On 15/06/2020 02.52, Huacai Chen wrote:
> > > Hi, Aleksandar,
> > >
> > > On Sun, Jun 14, 2020 at 4:07 PM Aleksandar Markovic
> > > wrote:
> > >>
On 6/15/20 10:54 PM, Lijun Pan wrote:
>
>
>> On Jun 15, 2020, at 12:36 PM, Cédric Le Goater wrote:
>>
>> Hello,
>>
>> On 6/13/20 6:20 AM, Lijun Pan wrote:
>>> This patch series add several newly introduced 32/64-bit vector
>>> instructions in Power ISA 3.1. The newly added instructions are
>>> f
On 16.06.20 06:50, Halil Pasic wrote:
> The atomic_cmpxchg() loop is broken because we occasionally end up with
> old and _old having different values (a legit compiler can generate code
> that accessed *ind_addr again to pick up a value for _old instead of
> using the value of old that was alre
The atomic_cmpxchg() loop is broken because we occasionally end up with
old and _old having different values (a legit compiler can generate code
that accessed *ind_addr again to pick up a value for _old instead of
using the value of old that was already fetched according to the
rules of the abstrac
The atomic_cmpxchg() loop is broken because we occasionally end up with
old and _old having different values (a legit compiler can generate code
that accessed *ind_addr again to pick up a value for _old instead of
using the value of old that was already fetched according to the
rules of the abstrac
The story short: compiler can generate code that does two
distinct fetches of *ind_addr for old and _old. If that happens we can
not figure out if we had the desired xchg or not.
Halil Pasic (2):
virtio-ccw: fix virtio_set_ind_atomic
s390x/pci: fix set_ind_atomic
hw/s390x/s390-pci-bus.c | 16
We extend RISC-V virt machine to allow creating a multi-socket
machine. Each RISC-V virt machine socket is a NUMA node having
a set of HARTs, a memory instance, a CLINT instance, and a PLIC
instance. Other devices are shared between all sockets. We also
update the generated device tree accordingly.
We extend PLIC emulation to allow multiple instances of PLIC in
a QEMU RISC-V machine. To achieve this, we remove first HART id
zero assumption from PLIC emulation.
Signed-off-by: Anup Patel
Reviewed-by: Palmer Dabbelt
Reviewed-by: Alistair Francis
---
hw/riscv/sifive_e.c| 2 +-
h
We add common helper routines which can be shared by RISC-V
multi-socket NUMA machines.
We have two types of helpers:
1. riscv_socket_xyz() - These helper assist managing multiple
sockets irrespective whether QEMU NUMA is enabled/disabled
2. riscv_numa_xyz() - These helpers assist in providing
We extend RISC-V spike machine to allow creating a multi-socket
machine. Each RISC-V spike machine socket is a NUMA node having
a set of HARTs, a memory instance, and a CLINT instance. Other
devices are shared between all sockets. We also update the
generated device tree accordingly.
By default, N
This series adds multi-socket support for RISC-V virt machine and
RISC-V spike machine. The multi-socket support will help us improve
various RISC-V operating systems, firmwares, and bootloader to
support RISC-V NUMA systems.
These patch can be found in riscv_multi_socket_v6 branch at:
https://git
We extend CLINT emulation to allow multiple instances of CLINT in
a QEMU RISC-V machine. To achieve this, we remove first HART id
zero assumption from CLINT emulation.
Signed-off-by: Anup Patel
Reviewed-by: Alistair Francis
Reviewed-by: Palmer Dabbelt
---
hw/riscv/sifive_clint.c | 20 +
real_dirty_pages becomes equal to total ram size after dirty log sync
in ram_init_bitmaps, the reason is that the bitmap of ramblock is
initialized to be all set, so old path counts them as "real dirty" at
beginning.
This causes wrong dirty rate and false positive throttling at the end
of first ra
> -Original Message-
> From: Lukas Straub
> Sent: Sunday, June 7, 2020 3:00 AM
> To: Zhang, Chen
> Cc: qemu-devel ; Alberto Garcia
> ; Dr. David Alan Gilbert ; Jason
> Wang
> Subject: Re: [PATCH 0/5] colo: Introduce resource agent and test suite/CI
>
> On Mon, 18 May 2020 09:38:24 +0
On Thu, Apr 23, 2020 at 01:04:13PM -0400, Cleber Rosa wrote:
>
>
> - Original Message -
> > From: "Peter Maydell"
> > To: "Markus Armbruster"
> > Cc: "Fam Zheng" , "Thomas Huth" ,
> > "Beraldo Leal" , "Erik
> > Skultety" , "Alex Bennée" ,
> > "Wainer Moschetta" ,
> > "QEMU Developers"
Patchew URL: https://patchew.org/QEMU/20200616003654.1058035-1-ja...@zx2c4.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
export
Hi Jay Zhou,
On 2020/6/15 19:50, Zhoujian (jay) wrote:
> Hi Keqian,
>
>> -Original Message-
>> From: zhukeqian
>> Sent: Monday, June 15, 2020 11:19 AM
>> To: qemu-devel@nongnu.org; qemu-...@nongnu.org; Paolo Bonzini
>> ; Zhoujian (jay)
>> Cc: Juan Quintela ; Chao Fan ;
>> Wanghaibin (D)
Patchew URL: https://patchew.org/QEMU/20200616003654.1058035-1-ja...@zx2c4.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#
From: Bin Meng
It is enough to simply map the SiFive FU540 DDR memory controller
into the MMIO space using create_unimplemented_device(), to make
the upstream U-Boot v2020.07 DDR memory initialization codes happy.
Note we do not generate device tree fragment for the DDR memory
controller. Since
From: Bin Meng
Move the flash and DRAM to the end of the SoC memmap table.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
---
(no changes since v1)
hw/riscv/sifive_u.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
in
From: Bin Meng
SiFive FU540 SoC supports booting from several sources, which are
controlled using the Mode Select (MSEL[3:0]) pins on the chip.
Typically, the boot process runs through several stages before it
begins execution of user-provided programs.
The SoC supports booting from memory-mappe
From: Bin Meng
Current IBEX CPU init routine name seems to be too generic.
Since it uses a different reset vector from the generic one,
it merits a dedicated name.
Signed-off-by: Bin Meng
---
Changes in v2:
- new patch: Rename IBEX CPU init routine
target/riscv/cpu.c | 4 ++--
1 file change
From: Bin Meng
This series updates the 'sifive_u' machine support:
- Change SiFive E/U series CPU reset vector to 0x1004
- Support Mode Select (MSEL[3:0]) settings at 0x1000 via a new
"msel" machine property
- Add a dummy DDR memory controller device
With this series, QEMU can boot U-Boot SPL
From: Bin Meng
Per the SiFive manual, all E/U series CPU cores' reset vector is
at 0x1004. Update our codes to match the hardware.
Signed-off-by: Bin Meng
---
Changes in v2:
- rebase on https://github.com/alistair23/qemu riscv-to-apply.next branch
- rename SiFive E/U CPU init routine names
Signed-off-by: BALATON Zoltan
---
hw/display/sm501.c | 50 +++--
hw/display/trace-events | 12 ++
2 files changed, 25 insertions(+), 37 deletions(-)
diff --git a/hw/display/sm501.c b/hw/display/sm501.c
index 583a0ff6b5..abe75f21dc 100644
--- a/hw/
Some guests seem to try source copy blits with same source and dest
which are no-op so avoid calling pixman for these.
Signed-off-by: BALATON Zoltan
Reviewed-by: Peter Maydell
---
hw/display/sm501.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/display/sm501.c b/hw/display/sm501.c
SSDTs cannot address 64-bit physical addresses in 32-bit tables, so we
increment the revision to '2' so that these larger addresses are
addressable. This matters because the DSDT revision represents the
maximum capability of all other SSDTs. This is also what arm does.
Signed-off-by: Jason A. Done
Instead of open coding op with different sizes using a switch and type
casting it can be written more compactly using stn_he_p/ldn_he_p.
Suggested-by: Peter Maydell
Signed-off-by: BALATON Zoltan
---
hw/display/sm501.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --gi
We don't need a separate variable to keep track if we allocated memory
that needs to be freed as we can test the pointer itself.
Signed-off-by: BALATON Zoltan
Reviewed-by: Peter Maydell
---
hw/display/sm501.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/display/sm
We don't need to add width to pitch when calculating last point, that
would reject valid ops within the card's local_mem.
Fixes: b15a22bbcbe6a78dc3d88fe3134985e4cdd87de4
Signed-off-by: BALATON Zoltan
Reviewed-by: Peter Maydell
---
hw/display/sm501.c | 8
1 file changed, 4 insertions(+)
Version 2 with changes according to review by Peter plus some new
patches added. Still need to verify overlap checks so likely will be
another version but sending it now if additional comments come up.
Regards,
BALATON Zoltan
BALATON Zoltan (8):
sm501: Fix bounds checks
sm501: Drop unneded va
The bytes per pixel value can be calculated from format but it's used
freqently enough (and will be used more in subseqent patches) so store
it in a variable for better readabilty. Also drop some unneded 0x
prefix around where new variable is defined.
Signed-off-by: BALATON Zoltan
---
hw/display
Some guests do 1x1 blits which is faster to do directly than calling a
function for it so avoid overhead in this case.
Signed-off-by: BALATON Zoltan
---
hw/display/sm501.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/hw/display/sm501.c b/hw/display/sm5
Prevent guest setting invalid format value that might trip checks in
sm501_2d_operation().
Signed-off-by: BALATON Zoltan
---
hw/display/sm501.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/display/sm501.c b/hw/display/sm501.c
index 6e914d3162..583a0ff6b5 100644
--- a/hw/display/sm50
Always look for ../share/qemu then ../pc-bios when looking for datadir.
Signed-off-by: Joe Slater
---
os-posix.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/os-posix.c b/os-posix.c
index 3cd52e1e70..f77da94bf6 100644
--- a/os-posix.c
+++ b/os-posix.c
@@ -82,8 +82,
On Mon, Jun 15, 2020 at 05:21:18PM +0200, Philippe Mathieu-Daudé wrote:
> On 6/9/20 11:55 PM, John Snow wrote:
> >
> >
> > On 6/9/20 9:08 AM, Philippe Mathieu-Daudé wrote:
> >> Hi John,
> >>
> >> On 6/4/20 9:52 PM, John Snow wrote:
> >>> v3:
> >>> - Split _post_shutdown refactor into own patch
On Mon, 15 Jun 2020, Markus Armbruster wrote:
macio_oldworld_init() creates a "macio-nvram", sysbus device, but
neglects to but it on a bus.
This letter ^ is upside down :-) (but -> put).
Regards,
BALATON Zoltan
Put it on the macio bus. Affects machine g3beige. Visible in "info
qtree":
> On Jun 15, 2020, at 11:12 AM, Richard Henderson
> wrote:
>
> On 6/12/20 8:55 PM, Lijun Pan wrote:
>> vmsumudm (Power ISA 3.0) - Vector Multiply-Sum Unsigned Doubleword Modulo
>> VA-form.
>> vmsumcud (Power ISA 3.1) - Vector Multiply-Sum & write Carry-out Unsigned
>> Doubleword VA-form.
>>
> On Jun 15, 2020, at 12:36 PM, Cédric Le Goater wrote:
>
> Hello,
>
> On 6/13/20 6:20 AM, Lijun Pan wrote:
>> This patch series add several newly introduced 32/64-bit vector
>> instructions in Power ISA 3.1. The newly added instructions are
>> flagged as ISA300 temporarily in vmx-ops.inc.c a
Signed-off-by: Markus Armbruster
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-52-arm...@redhat.com>
---
include/hw/sysbus.h | 17 -
hw/core/sysbus.c| 8
2 files changed, 25 deletions(-)
diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h
index
macio_init_child_obj() has become a trivial wrapper around
object_initialize_child_with_props(). Eliminate it, since the general
convenience wrapper object_initialize_child() is just as convenient
already.
Cc: Mark Cave-Ayland
Cc: David Gibson
Signed-off-by: Markus Armbruster
Reviewed-by: Paol
These are init/realize pairs produced by the previous commit's
Coccinelle script where the argument test doesn't quite match. They
need even more careful review.
Signed-off-by: Markus Armbruster
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-50-arm...@redhat.com>
---
hw/arm/arm
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
-qdev_realize(DEVICE(dev), NULL, errp);
+sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
The callers of sysbus_init_child_obj() commonly pass either &child,
sizeof(child), or pchild, sizeof(*pchild). Tidy up the few that use
sizeof(child_type) instead, mostly to keep future commits simpler.
Coccinelle script:
@@
expression parent, propname, type;
type T;
T child;
This is still the same transformation as in the previous commits, but
here the sysbus_init_child_obj() and its matching realize in are in
separate files. Fortunately, there's just one realize left to
convert.
Signed-off-by: Markus Armbruster
Reviewed-by: Paolo Bonzini
Message-Id: <2020061005324
init_event_facility() creates the SCLP events bus with two SCLP event
devices (sclpquiesce and sclp-cpu-hotplug). It leaves the devices
unrealized. A comment explains they will be realized "via the bus".
The bus's realize method sclp_events_bus_realize() indeed realizes all
unrealized devices on
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Conv
Sysbus devices almost always plug into the main system bus.
qdev_create() even has a convenience feature to make that easy: a null
bus argument gets replaced by the main system bus. qdev_realize() and
qdev_realize_and_unref() do the same.
We can do better. Provide convenience wrappers around qde
Ok, so according to the manpage, mremap generates EFAULT when "the range
old_address to old_address+old_size is an
invalid virtual memory address for this process". This is what the kernel does
for the stack guard. However, the
mappings in setup_arg_pages() will only ever provoke an ENOMEM, becau
Signed-off-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-59-arm...@redhat.com>
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index de25c82249..b69edc2d2f 100644
--- a/MAI
So far, qdev_realize() supports only devices that plug into a bus:
argument @bus cannot be null. Extend it to support bus-less devices,
too.
Signed-off-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-55-arm...@redhat.com>
All users of object_initialize_child() pass the obvious child size
argument. Almost all pass &error_abort and no properties. Tiresome.
Rename object_initialize_child() to
object_initialize_child_with_props() to free the name. New
convenience wrapper object_initialize_child() automates the size
This reverts commit 685f9a3428f625f580af0123aa95f4838d86cac3.
Realizing a device automatically realizes its buses, in
device_set_realized(). Realizing them in realize methods is
redundant, unless the methods themselves require them to be realized
early. raven_pcihost_realizefn() doesn't. Drop t
Convert qdev_set_parent_bus()/qdev_init_nofail() to qdev_realize();
recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains
why.
Signed-off-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-34-arm...@redhat.com>
Cc: Michael S. Tsirkin
Cc: Marcel Apfelbaum
Signed-off-by: Markus Armbruster
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-18-arm...@redhat.com>
Reviewed-by: Michael S. Tsirkin
---
include/hw/pci/pci.h | 3 ---
hw/pci/pci.c | 16
2 files changed, 19
aux_create_slave() has become a trivial wrapper around qdev_new().
There's just one user. Eliminate.
Signed-off-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-35-arm...@redhat.com>
---
include/hw/misc/auxbus.h | 7 -
The callers of object_initialize_child() commonly pass either
&child, sizeof(child), or pchild, sizeof(*pchild). Tidy up the few
that don't, mostly to keep the next commit simpler.
Signed-off-by: Markus Armbruster
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by:
Signed-off-by: Markus Armbruster
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-56-arm...@redhat.com>
---
qdev-monitor.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/qdev-monitor.c b/qdev-monitor.c
index 20cfa7615b..22da107484 100644
--- a/qdev-monito
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Markus Armbruster
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-53-arm...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/microbit.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git
ssi_auto_connect_slaves(parent, cs_line, bus) iterates over @parent's
QOM children @dev of type TYPE_SSI_SLAVE. It puts these on @bus, and
sets cs_line[] to qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0).
Suspicious: there is no protection against overrunning cs_line[].
Turns out it's safe because
Fix audio on software that accesses DRAM above 64k via register peek/poke
and some cases when more than 16 voices are used.
Fixes: 135f5ae1974c ("audio: GUSsample is int16_t")
Signed-off-by: Allan Peramaki
---
hw/audio/gusemu_hal.c | 6 +++---
hw/audio/gusemu_mixer.c | 8
2 files chan
The number of stacks is controlled by property "num-stacks".
pnv_pec_instance_init() creates the maximum supported number, because
the property has not been set then. pnv_pec_realize() realizes only
the wanted number. Works, although it can leave unrealized devices
hanging around in the QOM compo
OBJECT(child) expands to ((Object *)(child)). sysbus_init_child_obj()
parameter @child is void *. Pass child instead of OBJECT(child).
Signed-off-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-40-arm...@redhat.com>
---
The "null @bus means main system bus" convenience feature is no longer
used. Drop it.
Signed-off-by: Markus Armbruster
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-47-arm...@redhat.com>
---
hw/core/qdev.c | 16 ++--
1 file changed, 2 insertions(+), 14 deletions(-)
All remaining conversions to qdev_realize() are for bus-less devices.
Coccinelle script:
// only correct for bus-less @dev!
@@
expression errp;
expression dev;
@@
-qdev_init_nofail(dev);
+qdev_realize(dev, NULL, &error_fatal);
@ depends on !(file in "hw/co
Cc: Gerd Hoffmann
Signed-off-by: Markus Armbruster
Reviewed-by: Gerd Hoffmann
Reviewed-by: Paolo Bonzini
Message-Id: <20200610053247.1583243-29-arm...@redhat.com>
---
include/hw/usb.h | 1 -
hw/usb/bus.c | 8
2 files changed, 9 deletions(-)
diff --git a/include/hw/usb.h b/include
1 - 100 of 422 matches
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