On 5/4/20 7:49 AM, Volker Rümelin wrote:
Fix by using a 64-bit float for the conversion, before casting
back to 32-bit float.
Signed-off-by: Philippe Mathieu-Daudé
---
audio/mixeng.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/audio/mixeng.c b/audio/mixeng.c
index 7
On 4/30/20 5:42 PM, David Hildenbrand wrote:
> On 24.03.20 16:08, Janosch Frank wrote:
>> panic() was defined for the ccw and net bios, i.e. twice, so it's
>> cleaner to rather put it into the header.
>>
>> Also let's add an infinite loop into the assembly of disabled_wait() so
>> the caller doesn'
On 5/1/20 1:37 PM, Patrick Williams wrote:
> Sonora Pass is a 2 socket x86 motherboard designed by Facebook
> and supported by OpenBMC. Strapping configuration was obtained
> from hardware and i2c configuration is based on dts found at:
>
> https://github.com/facebook/openbmc-linux/blob/1633c87b8
Yeap, I suggest convert the Chinese version to Markdown or other text
format first,
then we can got help from others to translate those documents
On Mon, May 4, 2020 at 2:06 PM chen huacai wrote:
> Hi, Yonggang,
>
> We are planning to translate these manuals to English by human, but it
> needs a
Hi, Yonggang,
We are planning to translate these manuals to English by human, but it
needs a very long time to complete.
Huacai
On Sun, May 3, 2020 at 6:42 PM 罗勇刚(Yonggang Luo) wrote:
>
> The english version of the reference document is hard to head.
> I suggest first convert the chinese versio
> Fix by using a 64-bit float for the conversion, before casting
> back to 32-bit float.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> audio/mixeng.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/audio/mixeng.c b/audio/mixeng.c
> index 739a500449..9946bfeaec 10064
On Sat, May 02, 2020 at 10:35:36PM +0200, Eric Auger wrote:
> In case it is dynamically instantiated, add the TPM 2.0 device object
> under the DSDT table in the ACPI namespace. Its HID is MSFT0101
> while its current resource settings (CRS) property is initialized
> with the guest physical address
On Tue, Apr 21, 2020 at 01:59:27PM +0100, Shameer Kolothum wrote:
> This series adds NVDIMM support to arm/virt platform.
> The series reuses some of the patches posted by Eric
> in his earlier attempt here[1].
>
> This series previously had few fixes to qemu in general
> which were discovered whi
On Fri, May 01, 2020 at 01:58:47PM +0100, Alex Bennée wrote:
>
> Philippe Mathieu-Daudé writes:
>
> > On 5/1/20 1:15 PM, Alex Bennée wrote:
> >> This seems to be timing out quite often and occasionally running out
> >> of disk space. Relegate it to light duties.
> >> Signed-off-by: Alex Bennée
On 17/04/2020 14:11, Alexey Kardashevskiy wrote:
> At the moment the VCPU init sequence includes setting PVR which in case of
> KVM-HV only checks if it matches the hardware PVR mask as PVR cannot be
> virtualized by the hardware. In order to cope with various CPU revisions
> only top 16bit of P
On Thu, Apr 30, 2020 at 9:50 AM Dima Stepanov wrote:
>
> Since disconnect can happen at any time during initialization not all
> vring buffers (for instance used vring) can be intialized successfully.
> If the buffer was not initialized then vhost_memory_unmap call will lead
> to SIGSEGV. Add chec
Apologies for mixing up patches last time. This looks good from a
vhost-user-blk perspective, but I worry that some of these changes
could impact other vhost device types.
I agree with adding notifiers_set to struct vhost_dev, and setting it in
vhost_dev_enable/disable notifiers, but is there any
On Mon, May 4, 2020 at 7:40 AM BALATON Zoltan wrote:
> Hello,
>
> On Mon, 4 May 2020, 罗勇刚(Yonggang Luo) wrote:
> > Hello Richard, Can you have a look at the following patch, and was that
> are
> > the right direction?
>
> Formatting of the patch is broken by your mailer, try sending it with
> som
I’m happy from the vhost, vhost-user-blk and vhost-user-scsi side. For
other device types it looks pretty straightforward, but their maintainers
should probably confirm.
Since you plan to change the behavior of these helpers in subsequent
patches, maybe consider sending the other device types sepa
Hello,
On Mon, 4 May 2020, 罗勇刚(Yonggang Luo) wrote:
Hello Richard, Can you have a look at the following patch, and was that are
the right direction?
Formatting of the patch is broken by your mailer, try sending it with
something that does not change it otherwise it's a bit hard to read.
Ric
On 02/05/2020 06:47, Markus Armbruster wrote:
> Mark Cave-Ayland writes:
>
>> On 30/04/2020 16:20, Markus Armbruster wrote:
>>
Ah I see now, these aliases are for individual properties rather than
objects. What I
was trying to ask was if it were possible to have something like th
субота, 25. април 2020., је написао/ла:
> Hi,
> I have discovered that MIPS hardware page table walker is not enabled
> for any CPU currently available. In this patch I have enable it (and
> also CMGCR feature) for P5600 which supports both but they are not
> enabled.
>
>
Andrea,
Just wanted to
Hello Richard, Can you have a look at the following patch, and was that are
the right direction?
>From b4d6ca1d6376fab1f1be06eb472e10b908887c2b Mon Sep 17 00:00:00 2001
From: Yonggang Luo
Date: Sat, 2 May 2020 05:59:25 +0800
Subject: [PATCH] [ppc fp] Step 1. Rearrange the fp helpers to eliminate
Patchew URL:
https://patchew.org/QEMU/20200503184324.12506-1-mlevi...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200503184324.12506-1-mlevi...@redhat.com
Subject: [PATCH v3 00/14] LUKS: encryption slot management
> +#if TARGET_ABI_BITS < TARGET_LONG_BITS
> /* Check if address fits target address space */
> if ((unsigned long)host_addr + new_size > (abi_ulong)-1) {
It would be clearer if "#if TARGET_LONG_BITS > TARGET_ABI_BITS"
is used, to match the comparison in if() statement.
>
This commit adds two tests that cover the
new blockdev-amend functionality of luks and qcow2 driver
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
tests/qemu-iotests/302 | 278 +
tests/qemu-iotests/302.out | 40 ++
tests/qemu-iotes
Here the vm.log with the qemu command line (shortened):
2020-05-03 18:23:38.674+: starting up libvirt version: 5.10.0, qemu
version: 5.0.50v5.0.0-154-g2ef486e76d-dirty, kernel: 5.4.36-1-MANJARO
-machine
pc-q35-4.2,accel=kvm,usb=off,vmport=off,dump-guest-core=off,kernel_irqchip=on,pflash0=lib
This commit adds two tests, which test the new amend interface
of both luks raw images and qcow2 luks encrypted images.
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
tests/qemu-iotests/300 | 207 +
tests/qemu-iotests/300.out | 99
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
block/crypto.c | 72
qapi/block-core.json | 14 -
2 files changed, 66 insertions(+), 20 deletions(-)
diff --git a/block/crypto.c b/block/crypto.c
index b71e57f777..d7725d
rename the write_func to create_write_func, and init_func to create_init_func.
This is preparation for other write_func that will be used to update the
encryption keys.
No functional changes
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
block/crypto.c | 25
This allows more tests to be able to have same output on both qcow2 luks
encrypted images
and raw luks images
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
tests/qemu-iotests/087.out | 6 ++---
tests/qemu-iotests/134.out | 2 +-
tests/qemu-iotests/158.out
blockdev-amend will be used similiar to blockdev-create
to allow on the fly changes of the structure of the format based block devices.
Current plan is to first support encryption keyslot management for luks
based formats (raw and embedded in qcow2)
Signed-off-by: Maxim Levitsky
Reviewed-by: Dan
Some qcow2 create options can't be used for amend.
Remove them from the qcow2 create options and add generic logic to detect
such options in qemu-img
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
block/qcow2.c | 108 ++---
qemu-img.c
Currently the implementation only supports amending the encryption
options, unlike the qemu-img version
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
block/qcow2.c| 39 +++
qapi/block-core.json | 16 +++-
2 files change
Now that we have all the infrastructure in place,
wire it in the qcow2 driver and expose this to the user.
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
block/qcow2.c | 72 +-
tests/qemu-iotests/082.out | 45 ++
Next few patches will expose that functionality
to the user.
Signed-off-by: Maxim Levitsky
---
crypto/block-luks.c | 406 +++-
qapi/crypto.json| 61 ++-
2 files changed, 463 insertions(+), 4 deletions(-)
diff --git a/crypto/block-luks.c b/crypto/
This will be used first to implement luks keyslot management.
block_crypto_amend_opts_init will be used to convert
qemu-img cmdline to QCryptoBlockAmendOptions
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
block/crypto.c | 17 +
block/crypto.h
This implements the encryption key management using the generic code in
qcrypto layer and exposes it to the user via qemu-img
This code adds another 'write_func' because the initialization
write_func works directly on the underlying file, and amend
works on instance of luks device.
This commit al
Hi!
Here is the updated series of my patches, incorporating all the feedback I
received.
This implements the API interface that we agreed upon except that I merged the
LUKSKeyslotActive/LUKSKeyslotInactive union into a struct because otherwise
I need nested unions which are not supported currentl
Some options are only useful for creation
(or hard to be amended, like cluster size for qcow2), while some other
options are only useful for amend, like upcoming keyslot management
options for luks
Since currently only qcow2 supports amend, move all its options
to a common macro and then include i
'force' option will be used for some unsafe amend operations.
This includes things like erasing last keyslot in luks based formats
(which destroys the data, unless the master key is backed up
by external means), but that _might_ be desired result.
Signed-off-by: Maxim Levitsky
Reviewed-by: Danie
Finally installed QEMU 5.0.0.154 - still the same. QEMU doesn't
recognize the L3 caches and still lists 3 L3 caches instead of 4 with 3
cores/6 threads.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1
This still happens on qemu 5.0
Steps to reproduce:
# install packages
dpkg --add-architecture s390x
apt update
apt install qemu-user libc6:s390x libstdc++6:s390x libfontconfig1:s390x
libxcb1:s390x
apt install g++-s390x-linux-gnu
# create dummy binary
echo 'int main(){}'| s390x-linux-gnu-g++ -x
On 5/3/20 5:49 AM, Aleksandar Markovic wrote:
> нед, 3. мај 2020. у 13:33 Philippe Mathieu-Daudé је
> написао/ла:
>>
>> When building with Clang 10 on Fedora 32, we get:
>>
>> CC linux-user/mmap.o
>> linux-user/mmap.c:720:49: error: result of comparison 'unsigned long' >
>> 18446744073
On 5/3/20 4:32 AM, Philippe Mathieu-Daudé wrote:
> When building with Clang 10 on Fedora 32, we get:
>
> CC audio/mixeng.o
> audio/mixeng.c:274:34: error: implicit conversion from 'unsigned int' to
> 'float' changes value from 4294967295 to 4294967296
> [-Werror,-Wimplicit-int-float-c
Commit f62514b3def5fb2acbef64d0e053c0c31fa45aff made qemu-img reject -o "" but
this test uses it
Since this test only tries to do a dry-run run of qemu-img amend, replace the
-o "" with
dummy -o "size=0" since due to the nature of the test, it is not going
to reach the actual amend operation any
On 5/2/20 4:35 PM, Eric Auger wrote:
In case it is dynamically instantiated, add the TPM 2.0 device object
under the DSDT table in the ACPI namespace. Its HID is MSFT0101
while its current resource settings (CRS) property is initialized
with the guest physical address and MMIO size of the device.
On 5/2/20 4:35 PM, Eric Auger wrote:
Add a TPM2 ACPI table if a TPM2.0 sysbus device has been
dynamically instantiated.
Signed-off-by: Eric Auger
---
include/sysemu/tpm.h | 2 ++
hw/arm/virt-acpi-build.c | 36
2 files changed, 38 insertions(+)
diff
On Sat, 2 May 2020 at 20:18, Marcel Apfelbaum
wrote:
>
> The following changes since commit 1c47613588ccff44422d4bdeea0dc36a0a308ec7:
>
> Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
> (2020-04-30 19:25:41 +0100)
>
> are available in the Git repository at:
>
> h
On Fri, 1 May 2020 at 20:16, Dr. David Alan Gilbert (git)
wrote:
>
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit 1c47613588ccff44422d4bdeea0dc36a0a308ec7:
>
> Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
> (2020-04-30 19:25:41 +0100)
>
>
нед, 3. мај 2020. у 14:49 Aleksandar Markovic
је написао/ла:
>
> нед, 3. мај 2020. у 13:33 Philippe Mathieu-Daudé је
> написао/ла:
> >
> > When building with Clang 10 on Fedora 32, we get:
> >
> > CC linux-user/mmap.o
> > linux-user/mmap.c:720:49: error: result of comparison 'unsigned
On Sun, 3 May 2020, Philippe Mathieu-Daudé wrote:
When building with Clang 10 on Fedora 32, we get:
CC audio/mixeng.o
audio/mixeng.c:274:34: error: implicit conversion from 'unsigned int' to
'float' changes value from 4294967295 to 4294967296
[-Werror,-Wimplicit-int-float-conversion]
нед, 3. мај 2020. у 13:33 Philippe Mathieu-Daudé је
написао/ла:
>
> When building with Clang 10 on Fedora 32, we get:
>
> CC linux-user/mmap.o
> linux-user/mmap.c:720:49: error: result of comparison 'unsigned long' >
> 18446744073709551615 is always false
> [-Werror,-Wtautological-typ
Hi All,
I started recently using QEMU for OS virtualization.
Want to know/understand about scheduling.
Environment:
Host OS: Ubuntu 18.4 + KVM enable
QEMU: 4.2
Workstation/Desktop: x86_64
Would like to understand,
1. How CPU scheduling works.
2. Tools/commands to monitor.
3. Tuning parameter/AP
Fix 2 warnings when building with Clang on Fedora32.
Philippe Mathieu-Daudé (2):
audio/mixeng: Fix Clang 'int-conversion' warning
linux-user/mmap: Fix Clang 'type-limit-compare' warning
audio/mixeng.c| 2 +-
linux-user/mmap.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
--
2
When building with Clang 10 on Fedora 32, we get:
CC linux-user/mmap.o
linux-user/mmap.c:720:49: error: result of comparison 'unsigned long' >
18446744073709551615 is always false [-Werror,-Wtautological-type-limit-compare]
if ((unsigned long)host_addr + new_size > (abi_ulong
When building with Clang 10 on Fedora 32, we get:
CC audio/mixeng.o
audio/mixeng.c:274:34: error: implicit conversion from 'unsigned int' to
'float' changes value from 4294967295 to 4294967296
[-Werror,-Wimplicit-int-float-conversion]
static const float float_scale = UINT_MAX / 2.f;
Public bug reported:
I was trying to do an ARMv6 cross compile with qemu-user-static when I
ran into this:
https://travis-ci.com/github/VDR4Arch/vdr4arch/jobs/326884620#L1596
I was close to giving up when I found the following:
https://github.com/osrf/multiarch-docker-image-generation/issues/36
нед, 3. мај 2020. у 12:21 Huacai Chen је написао/ла:
>
> Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
> R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
> Loongson-3A R4 is the newest and its ISA is almost the superset of all
> others. To reduce compl
Patchew URL:
https://patchew.org/QEMU/1588501221-1205-1-git-send-email-che...@lemote.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT
The english version of the reference document is hard to head.
I suggest first convert the chinese version into markdown or alternative
format and
place them at github.
And we then translate the document with google translate.
On Sun, May 3, 2020 at 6:22 PM Huacai Chen wrote:
> Loongson-3 CPU fa
Add more CP0 register for save/restore, including: EBase, XContext,
PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/kvm.c | 212 ++
target/mips/ma
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index fc3d1b0..8d5cfec 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1084,6 +1084,11 @@ F: hw/isa/vt82c686.c
F: hw/pci-host/bonito.c
F: in
Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
Loongson-3A R4 is the newest and its ISA is almost the superset of all
others. To reduce complexity, we just define two CPU types:
1, "Loongson-3A1000" CPU wh
Add Loongson-3 based machine support, it use i8259 as the interrupt
controler and use GPEX as the pci controller. Currently it can only
work with KVM, but we will add TCG support in future.
We already have a full functional Linux kernel (based on Linux-5.4.x LTS
but not upstream yet) here:
https:
Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add
IP3 delivery as well, because Loongson-3 based machine use both IRQ2
(CPU's IP2) and IRQ3 (CPU's IP3).
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/mips/mips_int.c | 4 ++--
1 file changed, 2 insertions(+),
MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
can't create a VZ guest in QEMU because it lacks the kvm_type() hook in
MachineClass. Besides, libvirt uses a null-machine to detect the kvm
capability, so by default it will return "KVM not supported" on a VZ
platform. Thus, nu
Preparing for Loongson-3 virtualization, add KVM target support for
MIPS64 in configure script.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 23b5e93..7581e65 100755
--- a/con
Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
Loongson-3A R4 is the newest and its ISA is almost the superset of all
others. To reduce complexity, in QEMU we just define two CPU types:
1, "Loongson-3A100
This patch add more MMIO load/store instructions emulation, which can
be observed in QXL and some other device drivers:
1, LWL, LWR, LDW, LDR, SWL, SWR, SDL and SDR for all MIPS;
2, GSLBX, GSLHX, GSLWX, GSLDX, GSSBX, GSSHX, GSSWX and GSSDX for
Loongson-3.
Signed-off-by: Huacai Chen
Co-develop
This patch enable KVM support for Loongson-3 by selecting HAVE_KVM, but
only enable KVM/VZ on Loongson-3A R4+ (because VZ of early processors
are incomplete). Besides, Loongson-3 support SMP guests, so we clear the
linked load bit of LLAddr in kvm_vz_vcpu_load() if the guest has more
than one VCPUs
Loongson-3 has CONFIG6 and DIAG registers which need to be emulate.
CONFIG6 is mostly used to enable/disable FTLB and SFB, while DIAG is
mostly used to flush BTB, ITLB, DTLB, VTLB and FTLB.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/include/asm/kvm_host.h | 7 +
Loongson-3 overrides lwc2 instructions to implement CPUCFG and CSR
read/write functions. These instructions all cause guest exit so CSR
doesn't benifit KVM guest (and there are always legacy methods to
provide the same functions as CSR). So, we only emulate CPUCFG and let
it return a reduced featur
In current implementation, MIPS KVM uses IP2, IP3, IP4 and IP7 for
external interrupt, two kinds of IPIs and timer interrupt respectively,
but Loongson-3 based machines prefer to use IP2, IP3, IP6 and IP7 for
two kinds of external interrupts, IPI and timer interrupt. So we define
two priority-irq m
This patch add Loongson-3 Virtual IPI interrupt support in the kernel,
because emulate it in QEMU is too expensive for performance.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/include/asm/kvm_host.h | 32 ++
arch/mips/kvm/Makefile | 3 +
arch/mips/kvm/
Loongson-3's indexed cache operations need a node-id in the address,
but in KVM guest the node-id may be incorrect. So, let indexed cache
operations cause guest exit on Loongson-3.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/kvm/vz.c | 8 ++--
1 file changed, 6 ins
KVM guest has two levels of address translation: guest tlb translates
GVA to GPA, and root tlb translates GPA to HPA. By default guest's CCA
is controlled by guest tlb, but Loongson-3 maintains all cache coherency
by hardware (including multi-core coherency and I/O DMA coherency) so it
prefers all
Loongson-3 has lddir/ldpte instructions and their related CP0 registers
are the same as HTW. So we introduce a cpu_guest_has_ldpte flag and use
it to indicate whether we need to save/restore HTW related CP0 registers
(PWBase, PWSize, PWField and PWCtl).
Signed-off-by: Huacai Chen
Co-developed-by:
Loongson-3 can use lddir/ldpte instuctions to accelerate page table
walking, so use them to lookup gpa_mm.pgd.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/kvm/entry.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/mips/kvm/
Add EVENTFD support for KVM/MIPS, which is needed by VHOST. Tested on
Loongson-3 platform.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/kvm/Kconfig | 1 +
arch/mips/kvm/Makefile| 2 +-
arch/mips/kvm/trap_emul.c | 3 +++
arch/mips/kvm/vz.c| 3 +++
4 files
From: Xing Li
The code in decode_config4() of arch/mips/kernel/cpu-probe.c
asid_mask = MIPS_ENTRYHI_ASID;
if (config4 & MIPS_CONF4_AE)
asid_mask |= MIPS_ENTRYHI_ASIDX;
set_cpu_asid_mask(c, asid_mask);
set asid_mask to cpuinfo->asid_mask.
So in order to s
Loongson-3 based machines can have as many as 16 CPUs, and so does
memory slots, so increase KVM_MAX_VCPUS and KVM_USER_MEM_SLOTS to 16.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/include/asm/kvm_host.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff -
From: Xing Li
If a CPU support more than 32bit vmbits (which is true for 64bit CPUs),
VPN2_MASK set to fixed 0xe000 will lead to a wrong EntryHi in some
functions such as _kvm_mips_host_tlb_inv().
The cpu_vmbits definition of 32bit CPU in cpu-features.h is 31, so we
still use the old definit
We are preparing to add KVM support for Loongson-3. VZ extension is
fully supported in Loongson-3A R4+, and we will not care about old CPUs
(at least now). We already have a full functional Linux kernel (based
on Linux-5.4.x LTS) and QEMU (based on 5.0.0-rc2) and their git
repositories are here:
Q
On Tue, 2020-04-28 at 14:16 +0100, Daniel P. Berrangé wrote:
> On Sun, Mar 08, 2020 at 05:18:51PM +0200, Maxim Levitsky wrote:
> > Next few patches will expose that functionality
> > to the user.
> >
> > Signed-off-by: Maxim Levitsky
> > ---
> > crypto/block-luks.c | 398
On 4/27/20 9:24 PM, Julia Suvorova wrote:
A little cleanup is possible because of hotplug_pdev introduction.
Signed-off-by: Julia Suvorova
---
hw/pci/pcie.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 6b48d04d2c..abc99b6eff
On 4/27/20 9:24 PM, Julia Suvorova wrote:
Raise an error when trying to hot-plug/unplug a device through QMP to a device
with disabled hot-plug capability. This makes the device behaviour more
consistent and provides an explanation of the failure in the case of
asynchronous unplug.
Signed-off
Thanks Mr. Aleksandar for the introduction.
I'm really looking forward to working with the QEMU developers community
this summer.
Wishing all of you health and safety.
On Sun, May 3, 2020, 1:25 AM Aleksandar Markovic <
aleksandar.qemu.de...@gmail.com> wrote:
> [correcting some email addresses]
>
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