On 14/12/19 02:31, Philippe Mathieu-Daudé wrote:
>
> failed to launch qemu: exit status 1, error messages from qemu log:
> qemu-system-x86_64: error: failed to set MSR 0x48b to 0x1582e
> qemu-system-x86_64: /root/qemu/target/i386/kvm.c:2947: kvm_put_msrs:
> Assertion `ret == cpu->kvm_msr_b
On Fri, 13 Dec 2019, no-re...@patchew.org wrote:
> === OUTPUT BEGIN ===
> 1/10 Checking commit 9c9ffc38e9b9 (dp8393x: Mask EOL bit from descriptor
> addresses)
> ERROR: return is not a function, parentheses are not required
> #24: FILE: hw/net/dp8393x.c:200:
> +return (s->regs[SONIC_URDA] <<
Signed-off-by: Alistair Francis
---
MAINTAINERS| 6 +
hw/arm/Kconfig | 3 +++
hw/arm/Makefile.objs | 1 +
hw/arm/netduinoplus2.c | 52 ++
4 files changed, 62 insertions(+)
create mode 100644 hw/arm/netduinoplus2.c
diff --git a
Signed-off-by: Alistair Francis
Reviewed-by: Peter Maydell
---
hw/arm/Kconfig | 1 +
hw/misc/Kconfig | 3 +
hw/misc/Makefile.objs| 1 +
hw/misc/stm32f4xx_exti.c | 189 +++
hw/misc/trace-events |
Signed-off-by: Alistair Francis
Reviewed-by: Peter Maydell
---
MAINTAINERS| 8 +
hw/arm/Kconfig | 3 +
hw/arm/Makefile.objs | 1 +
hw/arm/stm32f405_soc.c | 302 +
include/hw/arm/stm32f405_soc.h | 73
Now that the Arm-M4 CPU has been added to QEMU we can add the Netduino
Plus 2 machine. This is very similar to the STM32F205 and Netduino 2 SoC
and machine.
v6:
- Remove machine specific reset code
- Rebase on master
v5:
- Fix checkpatch failures
- Add mising includes
v4:
- Rebase on master
v
Signed-off-by: Alistair Francis
Reviewed-by: Peter Maydell
---
default-configs/arm-softmmu.mak| 1 +
hw/arm/Kconfig | 9 ++
hw/misc/Kconfig| 3 +
hw/misc/Makefile.objs | 1 +
hw/misc/stm32f4xx_syscfg.c | 171 +++
Hi Paul,
On 13/12/2019 15:55, Durrant, Paul wrote:
-Original Message-
From: Xen-devel On Behalf Of
Julien Grall
Sent: 13 December 2019 15:37
To: Ian Jackson
Cc: Jürgen Groß ; xen-de...@lists.xenproject.org; Stefano
Stabellini ; osstest service owner ; Anthony Perard
Subject: Re: [Xen-
Patchew URL:
https://patchew.org/QEMU/cover.1576286757.git.fth...@telegraphics.com.au/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH 00/10] Fixes for DP8393X SONIC device emulation
Type: series
Message-id: cover.1576286757.git
Hi Alexander,
On 12/13/19 7:59 PM, Bensch, Alexander wrote:
Hi all,
Currently stuck on a problem in QEMU 4.0.0. I’m trying to implement a
custom device using a MIPS 24Kc CPU. The device boots from an SPI flash
device that is mapped to 0x9F00 (physical address 0x1F00). I got
the initi
Add a bounds check to prevent a large packet from causing a buffer
overflow. This is defensive programming -- I haven't actually tried
sending an oversized packet or a jumbo ethernet frame.
The SONIC handles packets that are too big for the buffer by raising
the RBAE interrupt and dropping them. L
The LSB of descriptor address registers is used as an EOL flag.
It has to be masked when those registers are to be used as actual
addresses for copying memory around. But when the registers are
to be updated the EOL bit should not be masked.
Signed-off-by: Finn Thain
---
hw/net/dp8393x.c | 8 +++
Section 5.4.7 of the datasheet explains that the RBE interrupt is an
"early warning". It indicates that the last RBA is still available to
receive a packet. It doesn't imply actual receive buffer exhaustion.
This is an important distinction because Linux will not check and clear
the RBE interrupt
Restore the receive buffer state when the SONIC runs out of receive
descriptors. Otherwise it may write the next packet past the end of the
buffer and corrupt guest memory. This implements behaviour described
in section 3.4.6.2 in the datasheet.
Signed-off-by: Finn Thain
---
hw/net/dp8393x.c | 1
It doesn't make sense to clear the command register bit unless the
command was actually issued.
Signed-off-by: Finn Thain
---
hw/net/dp8393x.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index 494deb42bf..3fdc6cc6f9 100644
--- a/
Hi Julio,
On 12/13/19 9:53 PM, Montes, Julio wrote:
Hi folks
I'm trying to run qemu 4.2.0 in azure VMs, unfourtunately qemu fails:
failed to launch qemu: exit status 1, error messages from qemu log:
qemu-system-x86_64: error: failed to set MSR 0x48b to 0x1582e
qemu-system-x86_64: /roo
This function re-uses its 'size' argument as a scratch variable.
Instead, declare a local 'size' variable for that purpose so that the
function result doesn't get messed up.
Signed-off-by: Finn Thain
---
hw/net/dp8393x.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git
A received packet consumes pkt_size bytes in the buffer and the frame
checksum that's appended to it consumes another 4 bytes. The Receive
Buffer Address register takes the former quantity into account but
not the latter. So the next packet written to the buffer overwrites
the frame checksum. Fix t
The in_use field is no different to the other words handled using
dp8393x_put() and dp8393x_get(). Use the same technique for in_use
that is used everywhere else.
Signed-off-by: Finn Thain
---
Laurent tells me that this clean-up has been tried before. He referred
me to commit c744cf7879 ("dp8393x
Follow the algorithm given in the National Semiconductor DP83932C
datasheet in sections 3.4.5 and 3.4.6.
Signed-off-by: Finn Thain
---
hw/net/dp8393x.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index 462f8646e0..49d7d9769e 10064
If the chip used QEMU's algorithm it would need an extra word-sized
register just to recheck the EOL bit, which would be a waste of silicon.
Do it the way the chip would do it. No functional change.
Signed-off-by: Finn Thain
---
hw/net/dp8393x.c | 3 ++-
1 file changed, 2 insertions(+), 1 deleti
Hi All,
There is a bug in the DP8393X emulation that can stop packet reception.
Whilst debugging that issue I found that the receiver algorithm differs
from the one described in the National Semiconductor datasheet.
These issues and others are addressed by this patch series.
This series has onl
Richard Henderson writes:
> On 10/7/19 11:28 AM, Alex Bennée wrote:
>> From: "Vanderson M. do Rosario"
>>
>> Replace all others CONFIG_PROFILER statistics and migrate it to
>> TBStatistics system. However, TCGProfiler still exists and can
>> be use to store global statistics and times. All TB
m/cohuck/qemu tags/s390x-20191213
>
> for you to fetch changes up to b147562019dd845a224cde7a37c219f9848d1b8d:
>
> qga: fence guest-set-time if hwclock not available (2019-12-13 12:16:50
> +0100)
>
>
> First s39
On Fri, 13 Dec 2019 at 14:33, Stefan Hajnoczi wrote:
>
> The following changes since commit b0ca999a43a22b38158a33d3f5881648bb4f:
>
> Update version for v4.2.0 release (2019-12-12 16:45:57 +)
>
> are available in the Git repository at:
>
> https://github.com/stefanha/qemu.git tags/bloc
David Gibson writes:
Hi, thanks for the review! My comments below:
> On Wed, Dec 11, 2019 at 04:10:13PM -0300, Fabiano Rosas wrote:
>> The hardware singlestep mechanism in POWER works via a Trace Interrupt
>> (0xd00) that happens after any instruction executes, whenever MSR_SE =
>> 1 (PowerISA S
David Gibson writes:
> On Wed, Dec 11, 2019 at 04:10:12PM -0300, Fabiano Rosas wrote:
>> For single stepping (via KVM) of a guest vcpu to work, KVM needs not
>> only to support the SET_GUEST_DEBUG ioctl but to also recognize the
>> KVM_GUESTDBG_SINGLESTEP bit in the control field of the
>> kvm_gu
David Gibson writes:
> On Wed, Dec 11, 2019 at 04:10:11PM -0300, Fabiano Rosas wrote:
>> Signed-off-by: Fabiano Rosas
>
> Generally, imported linux header updates are done as a block, pulling
> qemu up to a specified kernel commit id, rather than just grabbing
> pieces for a particular feature.
On Fri, Dec 13, 2019 at 12:56 AM Philippe Mathieu-Daudé
wrote:
> Hi Niek,
>
> On 12/11/19 11:34 PM, Niek Linnenbank wrote:
> > Ping!
> >
> > Anyone would like to comment on this driver?
> >
> > I finished the rework on all previous comments in this series.
> >
> > Currently debugging the hflags e
On 12/9/19 10:06 AM, Kevin Wolf wrote:
Am 28.11.2019 um 11:41 hat Sergio Lopez geschrieben:
bdrv_try_set_aio_context() requires that the old context is held, and
the new context is not held. Fix all the occurrences where it's not
done this way.
Suggested-by: Max Reitz
Signed-off-by: Sergio Lop
Hi folks
I'm trying to run qemu 4.2.0 in azure VMs, unfourtunately qemu fails:
failed to launch qemu: exit status 1, error messages from qemu log:
qemu-system-x86_64: error: failed to set MSR 0x48b to 0x1582e
qemu-system-x86_64: /root/qemu/target/i386/kvm.c:2947: kvm_put_msrs: Assertion
Hi Peter,
Philippe discovered that this patch triggers an hflags assertion error when
building QEMU
with debugging enabled (--enable-debug and --extra-cflags=-ggdb).
See this thread for details:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg665049.html
What I added to resolve that is to
Hi Philippe,
On Fri, Dec 13, 2019 at 12:25 AM Philippe Mathieu-Daudé
wrote:
> Cc'ing Alex.
>
> On 12/13/19 12:07 AM, Niek Linnenbank wrote:
> > Hi Philippe,
> >
> > I have discovered that the hflags assertion error you reported is not
> > caused by the Allwinner H3
> > patches but actually an ex
On 25.11.19 11:01, Richard Henderson wrote:
> On 11/23/19 1:59 PM, Sven Schnelle wrote:
>> On Sun, Nov 03, 2019 at 09:56:01PM +0100, Sven Schnelle wrote:
>>> Hi,
>>>
>>> these series adds quite a lot to the HPPA emulation in QEMU:
>>> i82596 emulation from Helge, PS/2 and Artist graphics emulation.
On Sun, Dec 08, 2019 at 12:44:16AM +1100, Gavin Shan wrote:
> On 12/7/19 8:48 PM, Philippe Mathieu-Daudé wrote:
> > There is no declaration of the 'NMI' type. INTERFACE_CHECK()
> > returns an abstract type (see commit aa1b35b975d8). The abstract
> > type corresponding to the TYPE_NMI interface is '
On Fri, Dec 06, 2019 at 06:27:18PM +0100, Eric Auger wrote:
> If event counters are implemented check the common events
> required by the PMUv3 are implemented.
>
> Some are unconditionally required (SW_INCR, CPU_CYCLES,
> either INST_RETIRED or INST_SPEC). Some others only are
> required if the i
On Fri, Dec 06, 2019 at 06:27:17PM +0100, Eric Auger wrote:
> This struct aims at storing information potentially used by
> all tests such as the pmu version, the read-only part of the
> PMCR, the number of implemented event counters, ...
>
> Signed-off-by: Eric Auger
> ---
> arm/pmu.c | 29
Sensitive
Hi all,
Currently stuck on a problem in QEMU 4.0.0. I'm trying to implement a custom
device using a MIPS 24Kc CPU. The device boots from an SPI flash device that is
mapped to 0x9F00 (physical address 0x1F00). I got the initial load and
execute working by direct loading a flas
Thanks David and Zalton for the awesome explanations. They're very helpful
to us!
-Thanks, Wayne Li
On Thu, Dec 12, 2019 at 9:49 PM David Gibson
wrote:
> On Thu, Dec 12, 2019 at 10:40:44AM -0600, Wayne Li wrote:
> > Dear David Gibson,
> >
> > I know you are under no obligation to respond, but
* Marc-André Lureau (marcandre.lur...@redhat.com) wrote:
> Signed-off-by: Marc-André Lureau
> +static gboolean
> +vmstate_save(VMState1 *object, GDBusMethodInvocation *invocation,
> + gpointer user_data)
> +{
> +TestServer *h = user_data;
> +GVariant *var;
> +
> +var = g_v
On Fri, 13 Dec 2019 at 11:59, Dr. David Alan Gilbert (git)
wrote:
>
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit b0ca999a43a22b38158a33d3f5881648bb4f:
>
> Update version for v4.2.0 release (2019-12-12 16:45:57 +)
>
> are available in the Git repository at:
>
>
Implement support for TPM on ppc64 by implementing the vTPM CRQ interface
as a frontend. It can use the tpm_emulator driver backend with the external
swtpm.
The Linux vTPM driver for ppc64 works with this emulation.
This TPM emulator also handles the TPM 2 case.
Signed-off-by: Stefan Berger
Rev
The following series of patches adds vTPM emulator support for the
ppc64 platform (pSeries).
It can be tested as follows with swtpm/libtpms:
mkdir /tmp/mytpm1
swtpm socket --tpmstate dir=/tmp/mytpm1 \
--ctrl type=unixio,path=/tmp/mytpm1/swtpm-sock \
--log level=20
If TPM 2 is desired, add -
Extend the tpm_spapr frontend with VM suspend and resume support.
Signed-off-by: Stefan Berger
---
hw/tpm/tpm_spapr.c | 67 -
hw/tpm/trace-events | 2 ++
2 files changed, 68 insertions(+), 1 deletion(-)
diff --git a/hw/tpm/tpm_spapr.c b/hw/tpm/tpm_s
Add an example to the TPM docs for how to add a TPM SPAPR
device model to a QEMU VM emulating a pSeries machine.
Signed-off-by: Stefan Berger
---
docs/specs/tpm.txt | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/docs/specs/tpm.txt b/docs/specs/tpm.txt
in
Signed-off-by: Stefan Berger
---
hw/ppc/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index f927ec9c74..b5b3519158 100644
--- a/hw/ppc/Kconfig
+++ b/hw/ppc/Kconfig
@@ -10,6 +10,7 @@ config PSERIES
select XICS_SPAPR
select XIVE_SPAPR
sel
Public bug reported:
AMD CPUs have L3 cache per 2, 3 or 4 cores. Currently, TOPOEXT seems to
always map Cache ass if it was an 4-Core per CCX CPU, which is
incorrect, and costs upwards 30% performance (more realistically 10%) in
L3 Cache Layout aware applications.
Example on a 4-CCX CPU (1950X /w
On 12/13/19 8:37 AM, Andrew Jeffery wrote:
On Fri, 13 Dec 2019, at 18:03, Cédric Le Goater wrote:
On 13/12/2019 05:28, Andrew Jeffery wrote:
Hello,
The AST2600 has an additional SDHCI intended for use as an eMMC boot source.
These two patches rework the existing ASPEED SDHCI model to accommoda
* Liam Merwick (liam.merw...@oracle.com) wrote:
> On 12/12/2019 16:37, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > Wire up the building of the virtiofsd in contrib.
>
> s/contrib/tools/
Ah! My sed of s-contrib/virtiofsd-tools/virtiofsd-
wasn't smart enough for
On 12/13/19 5:17 PM, Philippe Mathieu-Daudé wrote:
Historically, QEMU started with only one X86 machine: the PC.
The 'hw/i386/pc.h' header was used to store all X86 and PC
declarations. Since we have now multiple machines based on the
X86 architecture, move the PC-specific declarations in a new
h
Hi
On Fri, Dec 13, 2019 at 8:04 PM Kevin Wolf wrote:
>
> Am 08.11.2019 um 16:00 hat Marc-André Lureau geschrieben:
> > The following series implements an internal async command solution
> > instead. By introducing a session context and a command return
> > handler, QMP handlers can:
> > - defer t
Historically, QEMU started with only one X86 machine: the PC.
The 'hw/i386/pc.h' header was used to store all X86 and PC
declarations. Since we have now multiple machines based on the
X86 architecture, move the PC-specific declarations in a new
header.
We use 'internal' in the name to explicit this
Using magic numbers is dangerous because the structures PCIIDEState
might be modified and this source file consuming the "ide/pci.h"
header would be out of sync, eventually accessing out of bound
array members.
Use the ARRAY_SIZE() to keep the source file sync.
Signed-off-by: Philippe Mathieu-Daud
* Marc-André Lureau (marcandre.lur...@redhat.com) wrote:
Generally from the migration side I'm OK; I don't know that
much glib stuff as you're using, so I'll leave that to Dan.
> +if (!result) {
> +error_report("Failed to Load: %s", err->message);
> +return -1;
> +}
> +
From: Markus Armbruster
get_max_cpu_model() dereferences @errp when
kvm_s390_get_host_cpu_model() fails, apply_cpu_model() dereferences it
when kvm_s390_apply_cpu_model() fails, and s390_realize_cpu_model()
dereferences it when get_max_cpu_model() or check_compatibility()
fail. That's wrong; see
From: Markus Armbruster
s390x-cpu property setters set_feature() and set_feature_group()
dereference @errp when the visitor fails. That's wrong; see the big
comment in error.h. Introduced in commit 0754f60429 "s390x/cpumodel:
expose features and feature groups as properties".
No caller actuall
All the X86 machines use an interrupt controller.
Rename the function to something more generic.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i386/pc.h | 2 +-
hw/i386/microvm.c| 2 +-
hw/i386/pc.c | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/inclu
From: Markus Armbruster
qmp_query_cpu_definitions() passes @errp to get_max_cpu_model(), then
frees any error it gets back. This effectively ignores errors.
Dereferencing @errp is wrong; see the big comment in error.h. Passing
@errp is also wrong, because it works only as long as @errp is neith
From: Janosch Frank
It defaults to returning 0 anyway and that return value is not
necessary, as 0 is also the default rc that the caller would return.
While doing that we can simplify the logic a bit and return early if
we inject a PGM exception.
Signed-off-by: Janosch Frank
Reviewed-by: Thom
Keep 'pc.c' for PC-machine specific code, and use 'x86.c' for code
used by all the X86-based machines.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i386/pc.h | 1 -
include/hw/i386/x86.h | 2 ++
hw/i386/pc.c | 27 ---
hw/i386/x86.c | 30 +++
From: Markus Armbruster
cpu_model_from_info() is a helper for qmp_query_cpu_model_expansion(),
qmp_query_cpu_model_comparison(), qmp_query_cpu_model_baseline(). It
dereferences @errp when the visitor or the QOM setter fails. That's
wrong; see the big comment in error.h. Introduced in commit
13
While the ICH9 chipset is a 'South Bridge', it is not a PCI bridge.
Nothing in "hw/i386/ich9.h" requires definitions from "pci_bridge.h"
so move its inclusion where it is required.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i386/ich9.h| 1 -
hw/i386/acpi-build.c | 1 +
hw/pci-
Hi
On Fri, Dec 13, 2019 at 12:18 AM Dr. David Alan Gilbert
wrote:
>
> Apologies for the delay.
>
> * Marc-André Lureau (marcandre.lur...@gmail.com) wrote:
> > Hi
> >
> > On Sun, Dec 1, 2019 at 10:10 PM Peter Maydell
> > wrote:
> > >
> > > On Sun, 1 Dec 2019 at 17:27, Marc-André Lureau
> > > wr
Since commit 0c8465440 the ioapic_print_redtbl() function is not
used outside of ioapic_common.c, make it static, and remove its
prototype declaration in "ioapic_internal.h".
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i386/ioapic_internal.h | 1 -
hw/intc/ioapic_common.c | 2
Commit 02a9594b4f0 already converted 'dev' to DeviceState.
Since the cast is superfluous, remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/piix.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index db313dd3b1..ffeff4e095 100644
---
From: Janosch Frank
The initiating cpu needs to be reset with an initial reset. While
doing a normal reset followed by a initial reset is not wrong per se,
the Ultravisor will only allow the correct reset to be performed.
Signed-off-by: Janosch Frank
Reviewed-by: David Hildenbrand
Reviewed-by:
From: Markus Armbruster
sclp_events_bus_realize() dereferences @errp when
object_property_set_bool() fails. That's wrong; see the big comment
in error.h. Introduced in commit f6102c329c "s390/sclp: rework sclp
event facility initialization + device realization".
No caller actually passes null.
From: Janosch Frank
As it turns out we need to clear the ri controls and PSW enablement
bit to be architecture compliant.
Signed-off-by: Janosch Frank
Reviewed-by: Christian Borntraeger
Message-Id: <20191203132813.2734-4-fran...@linux.ibm.com>
Signed-off-by: Cornelia Huck
---
target/s390x/cp
The Posix implementation of guest-set-time invokes hwclock to
set/retrieve the time to/from the hardware clock. If hwclock
is not available, the user is currently informed that "hwclock
failed to set hardware clock to system time", which is quite
misleading. This may happen e.g. on s390x, which has
The following changes since commit b0ca999a43a22b38158a33d3f5881648bb4f:
Update version for v4.2.0 release (2019-12-12 16:45:57 +)
are available in the Git repository at:
https://github.com/cohuck/qemu tags/s390x-20191213
for you to fetch changes up to
From: Janosch Frank
Let's also move the clear reset function into the reset handler.
Signed-off-by: Janosch Frank
Message-Id: <20191127175046.4911-5-fran...@linux.ibm.com>
Reviewed-by: David Hildenbrand
Reviewed-by: Thomas Huth
Signed-off-by: Cornelia Huck
---
target/s390x/cpu-qom.h | 1 +
From: Janosch Frank
Let's improve readability by:
* Using constants for the subcodes
* Moving parameter checking into a function
* Removing subcode > 6 check as the default case catches that
Signed-off-by: Janosch Frank
Reviewed-by: Cornelia Huck
Reviewed-by: Thomas Huth
Reviewed-by: David Hi
We neglected to clean up pending interrupts and emergency signals;
fix that.
Message-Id: <20191206135404.16051-1-coh...@redhat.com>
Signed-off-by: Cornelia Huck
Reviewed-by: David Hildenbrand
---
target/s390x/cpu.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/targ
Move the KVM-related call to "sysemu/kvm.h".
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i386/pc.h | 1 -
include/sysemu/kvm.h | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 1f86eba3f9..9866dfbd60 100644
--- a/includ
From: Janosch Frank
Let's move the intial reset into the reset handler and cleanup
afterwards.
Signed-off-by: Janosch Frank
Reviewed-by: David Hildenbrand
Message-Id: <20191128083723.11937-1-fran...@linux.ibm.com>
Reviewed-by: Thomas Huth
Signed-off-by: Cornelia Huck
---
target/s390x/cpu-qo
The "pcie_host.h" header is used by devices providing a PCI-e bus,
usually North Bridges. The ICH9 is a South Bridge.
Since we don't need this header, do not include it.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i386/ich9.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/hw
Convert the deprecated DPRINTF() macro to trace events.
Signed-off-by: Philippe Mathieu-Daudé
---
v2: rename pc_pic -> x86_pic
---
hw/i386/pc.c | 19 +--
hw/i386/trace-events | 6 ++
2 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i
From: Janosch Frank
Let's start moving the cpu reset functions into a single function with
a switch/case, so we can later use fallthroughs and share more code
between resets.
This patch introduces the reset function by renaming cpu_reset().
Signed-off-by: Janosch Frank
Reviewed-by: David Hilde
Add 5.0 machine types for arm/i440fx/q35/s390x/spapr.
For i440fx and q35, unversioned cpu models are still translated
to -v1; I'll leave changing this (if desired) to the respective
maintainers.
Signed-off-by: Cornelia Huck
Message-Id: <20191112104811.30323-1-coh...@redhat.com>
Acked-by: David G
In commit f809c6051 we replaced the use of cpu_set_smm_t callbacks
by using a Notifier to modify the MemoryRegion. This prototype is
now not used anymore, we can safely remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i386/pc.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/
From: Boris Fiuczynski
Signed-off-by: Boris Fiuczynski
Reviewed-by: Eric Farman
Message-Id: <20191128143015.5231-1-fiu...@linux.ibm.com>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cornelia Huck
---
hw/vfio/ccw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/v
In commit 1454509726 we removed the pc_pci_device_init()
deprecated function and its calls, but we forgot to remove
its prototype. Do that now.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i386/pc.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/hw/i386/pc.h b/include/hw/i386
Hi Paolo,
Since you posted your "x86: allow building without PC machine
types" series [1], I looked at my past work on this topic
(restrict "hw/i386/pc.h" to the X86 architecture).
I'm glad to see in [2] you remove most (all) of the last uses.
Since I haven't looked at this for some time, my WiP b
Am 08.11.2019 um 16:00 hat Marc-André Lureau geschrieben:
> The following series implements an internal async command solution
> instead. By introducing a session context and a command return
> handler, QMP handlers can:
> - defer the return, allowing the mainloop to reenter
> - return only to the
On 12/12/2019 16:37, Dr. David Alan Gilbert (git) wrote:
From: "Dr. David Alan Gilbert"
Wire up the building of the virtiofsd in contrib.
s/contrib/tools/
otherwise
Reviewed-by: Liam Merwick
virtiofsd relies on Linux-specific system calls and seccomp. Anyone
wishing to port it to other
On Fri, Dec 13, 2019 at 02:46:26PM +, Stefan Hajnoczi wrote:
> The Linux virtio_blk.ko guest driver is removing legacy SCSI passthrough
> support. Deprecate this feature in QEMU too.
>
> Signed-off-by: Stefan Hajnoczi
Fine with me as the original author:
Reviewed-by: Christoph Hellwig
On Thu, 12 Dec 2019 at 22:36, Greg Kurz wrote:
>
> The following changes since commit fb2246882a2c8d7f084ebe0617e97ac78467d156:
>
> .travis.yml: drop xcode9.4 from build matrix (2019-11-29 15:51:52 +)
>
> are available in the Git repository at:
>
> https://github.com/gkurz/qemu.git tags/9p
* Liam Merwick (liam.merw...@oracle.com) wrote:
> On 12/12/2019 16:38, Dr. David Alan Gilbert (git) wrote:
> > From: Stefan Hajnoczi
> >
> > Signed-off-by: Stefan Hajnoczi
> > ---
> > Makefile | 7 +++
> > tools/virtiofsd/virtiofsd.texi | 85
On 13/12/19 16:10, Daniel P. Berrangé wrote:
> I don't think it really matters. QEMU is deprecating it with no
> seemless direct replacement, so I don't think libvirt needs to
> be concerned. The feature simply becomes unsupported.
>
> At the very most we need to check if it exists before using it
On 12/13/19 8:11 AM, Peter Krempa wrote:
When a management application manages node names there's no reason to
recurse into backing images in the output of query-named-block-nodes.
Add a parameter to the command which will return just the top level
structs.
At one point, Kevin was working on a
On Fri, Dec 13, 2019 at 04:07:06PM +0100, Peter Krempa wrote:
> On Fri, Dec 13, 2019 at 15:56:08 +0100, Paolo Bonzini wrote:
> > On 13/12/19 15:46, Stefan Hajnoczi wrote:
> > > The Linux virtio_blk.ko guest driver is removing legacy SCSI passthrough
> > > support. Deprecate this feature in QEMU to
On Fri, Dec 13, 2019 at 15:56:08 +0100, Paolo Bonzini wrote:
> On 13/12/19 15:46, Stefan Hajnoczi wrote:
> > The Linux virtio_blk.ko guest driver is removing legacy SCSI passthrough
> > support. Deprecate this feature in QEMU too.
> >
> > Signed-off-by: Stefan Hajnoczi
> > ---
> > qemu-deprecat
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> Use WITH_RCU_READ_LOCK_GUARD to avoid exiting colo_init_ram_cache
> without releasing RCU.
>
> Cc: Dr. David Alan Gilbert
> Signed-off-by: Paolo Bonzini
Reviewed-by: Dr. David Alan Gilbert
> ---
> migration/ram.c | 33 +--
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> Cc: Dr. David Alan Gilbert
> Signed-off-by: Paolo Bonzini
Reviewed-by: Dr. David Alan Gilbert
> ---
> include/exec/memory.h | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/include/exec/memory.h b/include/exec/memory.h
On 13/12/19 10:43, Philippe Mathieu-Daudé wrote:
>
>
> The MicroVM series introduced changes that outdated my work, and since
> having MicroVM was more important that global cleanup, I didn't insist a
> that time. Now GSI and IOAPIC are more exposed so my previous work
> doesn't apply at all. Wel
On 13/12/19 15:46, Stefan Hajnoczi wrote:
> The Linux virtio_blk.ko guest driver is removing legacy SCSI passthrough
> support. Deprecate this feature in QEMU too.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> qemu-deprecated.texi | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --gi
On 12/12/19 6:29 PM, Paolo Bonzini wrote:
Add it to microvm as well, it is a generic property of the x86
architecture.
Suggested-by: Sergio Lopez
Signed-off-by: Paolo Bonzini
Reviewed-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 49 -
The Linux virtio_blk.ko guest driver is removing legacy SCSI passthrough
support. Deprecate this feature in QEMU too.
Signed-off-by: Stefan Hajnoczi
---
qemu-deprecated.texi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/qemu-deprecated.texi b/qemu-deprecated.texi
index 4b4b74
On 12/12/2019 16:38, Dr. David Alan Gilbert (git) wrote:
From: Stefan Hajnoczi
Signed-off-by: Stefan Hajnoczi
---
Makefile | 7 +++
tools/virtiofsd/virtiofsd.texi | 85 ++
2 files changed, 92 insertions(+)
create mode 100644 tools/vi
From: Evgeny Yakovlev
Virtio spec 1.1 (and earlier), 5.2.5.2 Driver Requirements: Device
Initialization:
"Devices SHOULD always offer VIRTIO_BLK_F_FLUSH, and MUST offer it if
they offer VIRTIO_BLK_F_CONFIG_WCE"
Currently F_CONFIG_WCE and F_WCE are not connected to each other.
Qemu will advertis
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