In case we don't have a device for an active queue, just skip
processing the queue (same we do for inactive queues) and log
a guest bug.
Reported-by: Guenter Roeck
Signed-off-by: Gerd Hoffmann
Tested-by: Guenter Roeck
Message-id: 20190821085319.13711-1-kra...@redhat.com
---
hw/usb/hcd-ehci.c |
From: Martin Cerveny
Interrupt packets (limited by wMaxPacketSize) should be buffered and merged
by algorithm described in USB spec.
(see usb_20.pdf/5.7.3 Interrupt Transfer Packet Size Constraints).
Signed-off-by: Martin Cerveny
Message-id: 20190724125859.14624-2-m.cerv...@computer.org
Signed-
From: Stefan Hajnoczi
The -usb section of the man page is not very clear on what exactly -usb
does and fails to mention xHCI as a modern alternative (-device
nec-usb-xhci).
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Thomas Huth
Message-id: 20190815141428.29080-1-stefa...@redhat.com
Signed-off
From: Hikaru Nishida
This commit adds No Op Command (23) to xHC for verifying the operation
of the Command Ring mechanisms.
No Op Command is defined in XHCI spec (4.6.2) and just reports Command
Completion Event with Completion Code == Success.
Before this commit, No Op Command is not implemented
The following changes since commit 17dc57990320edaad52ac9ea808be9719c91cea6:
Merge remote-tracking branch
'remotes/huth-gitlab/tags/pull-request-2019-08-20' into staging (2019-08-20
14:14:20 +0100)
are available in the Git repository at:
git://git.kraxel.org/qemu tags/usb-20190822-pull-req
From: Marc-André Lureau
If interface_count is NO_INTERFACE_INFO, let's not access the arrays
out-of-bounds.
==994==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x625000243930
at pc 0x5642068086a8 bp 0x7f0b6f9ffa50 sp 0x7f0b6f9ffa40
READ of size 1 at 0x625000243930 thread T0
#0 0
Signed-off-by: Chen Zhang
---
hw/vfio/pci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index dc3479c..c5e6fe6 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -44,7 +44,7 @@
#define TYPE_VFIO_PCI "vfio-pci"
#define PCI_VFIO(obj)OBJ
On 22.08.19 00:43, Richard Henderson wrote:
> On 8/21/19 3:31 PM, Richard Henderson wrote:
>>> Yes, that's what I mean, TARGET_PAGE_SIZE, but eventually crossing a
>>> page boundary. The longer I stare at the MVCL code, the more broken it
>>> is. There are more nice things buried in the PoP. MVCL d
On 21/08/19 22:17, Kinney, Michael D wrote:
> Paolo,
>
> It makes sense to match real HW.
Note that it'd also be fine to match some kind of official Intel
specification even if no processor (currently?) supports it.
> That puts us back to
> the reset vector and handling the initial SMI at
> 3000
ping
On Mon, Aug 5, 2019 at 5:14 PM Michael Rolnik wrote:
> This series of patches adds 8bit AVR cores to QEMU.
> All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully
> tested yet.
> However I was able to execute simple code with functions. e.g fibonacci
> calculation.
> This s
On Tue, Aug 20, 2019 at 11:35:29AM +0100, Peter Maydell wrote:
> On Tue, 20 Aug 2019 at 08:36, David Gibson
> wrote:
> > On Mon, Aug 19, 2019 at 12:13:34PM -0500, Paul Clarke wrote:
> > > These issues were found while running Glibc's test suite for "math",
> > > and there are still a *LOT* of QEM
Sorry for delay to respond.
On 7/11/2019 5:37 PM, Dr. David Alan Gilbert wrote:
> * Kirti Wankhede (kwankh...@nvidia.com) wrote:
>> These functions save and restore PCI device specific data - config
>> space of PCI device.
>> Tested save and restore with MSI and MSIX type.
>>
>> Signed-off-by: Kir
The following changes since commit 17dc57990320edaad52ac9ea808be9719c91cea6:
Merge remote-tracking branch
'remotes/huth-gitlab/tags/pull-request-2019-08-20' into staging (2019-08-20
14:14:20 +0100)
are available in the Git repository at:
git://git.kraxel.org/qemu tags/ui-20190822-pull-requ
From: Niklas Haas
We have ctrl-ctrl and alt-alt; why not shift-shift? That's my preferred
grab binding, personally.
Signed-off-by: Niklas Haas
Message-id: 20190818105038.19520-1-q...@haasn.xyz
Signed-off-by: Gerd Hoffmann
---
ui/input-linux.c | 4
qapi/ui.json | 3 ++-
2 files change
From: Paolo Bonzini
This prevents the compiler from reporting a possible uninitialized use
of maybe_keycode in function curses_refresh.
Cc: Gerd Hoffmann
Signed-off-by: Paolo Bonzini
Message-id: 1563451264-46176-1-git-send-email-pbonz...@redhat.com
[ kraxel: whitespace fixup ]
Signed-off-by:
without kvm commit 412a3c41, CPUID(EAX=0xd,ECX=0).EBX always equal to 0 even
through guest update xcr0, this will crash legacy guest(e.g., CentOS 6).
Below is the call trace on the guest.
[0.00] kernel BUG at mm/bootmem.c:469!
[0.00] invalid opcode: [#1] SMP
[0.00] las
21.08.2019. 20.12, "Jan Bobek" је написао/ла:
>
> In this context, "code generators" are functions that receive decoded
> instruction operands and emit TCG ops implementing the correct
> instruction functionality. Introduce the naming macros first, actual
> generator macros will be added later.
>
On Fri, Jun 14, 2019 at 10:18:41AM +0100, Stefan Hajnoczi wrote:
> On Tue, Jun 11, 2019 at 05:35:17PM -0700, Raphael Norwitz wrote:
> > Of the 3 virtqueues, seabios only sets cmd, leaving ctrl
> > and event without a physical address. This can cause
> > vhost_verify_ring_part_mapping to return ENOM
21.08.2019. 19.41, "Jan Bobek" је написао/ла:
>
> From: Richard Henderson
>
> Treat this the same as we already do for other rex bits.
>
> Signed-off-by: Richard Henderson
> ---
I keep my previous opinion that this is an example of a low-quality commit
message that needlessly introduces unclari
21.08.2019. 20.37, "Jan Bobek" је написао/ла:
>
> Add all the AES and PCLMULQDQ vector instruction entries to
sse-opcode.inc.h.
>
Why only pclmulqdq, and not entire CLMUL instruction set?
> Signed-off-by: Jan Bobek
> ---
> target/i386/sse-opcode.inc.h | 34 ++
>
21.08.2019. 20.49, "Jan Bobek" је написао/ла:
>
> Add all the AVX2 vector instruction entries to sse-opcode.inc.h.
>
Why is AVX-related code inserted in a file whose name says SSE? Perhaps the
file should be named vector-opcode.inc.h?
Also, some vector extensions contain non-vector instructions.
On Wed, Aug 21, 2019 at 04:53:27PM +0100, Daniel P. Berrangé wrote:
> The ordering of events that are emitted during the rmdir
> test have changed with kernel >= 5.3. Semantically both
> new & old orderings are correct, so we must be able to
> cope with either.
>
> To cope with this, when we see a
On 22/08/2019 11:33, Eric Blake wrote:
On 8/21/19 8:16 PM, Alexey Kardashevskiy wrote:
This returns MD5 checksum of all RAM blocks for migration debugging
as this is way faster than saving the entire RAM to a file and checking
that.
Signed-off-by: Alexey Kardashevskiy
---
I am actually wo
21.08.2019. 23.00, "Eduardo Habkost" је написао/ла:
>
> On Wed, Aug 21, 2019 at 10:27:11PM +0200, Aleksandar Markovic wrote:
> > 02.08.2019. 17.37, "Aleksandar Markovic"
је
> > написао/ла:
> > >
> > > From: Aleksandar Markovic
> > >
> > > This little series improves linux_ssh_mips_malta.py, both
On 8/21/19 6:52 AM, Peter Maydell wrote:
> On Wed, 21 Aug 2019 at 14:42, Aurelien Jarno wrote:
>>
>> Commit e41c94529740cc26 ("target/alpha: Convert to CPUClass::tlb_fill")
>> slightly changed the way the trap_arg2 value is computed in case of TLB
>> fill. The type of the variable used in the tern
On 2019/8/22 上午3:31, Palmer Dabbelt wrote:
On Thu, 15 Aug 2019 14:37:52 PDT (-0700), alistai...@gmail.com wrote:
On Thu, Aug 15, 2019 at 2:07 AM Peter Maydell
wrote:
On Thu, 15 Aug 2019 at 09:53, Aleksandar Markovic
wrote:
>
> > We can accept draft
> > extensions in QEMU as long as they ar
On 8/21/19 8:16 PM, Alexey Kardashevskiy wrote:
> This returns MD5 checksum of all RAM blocks for migration debugging
> as this is way faster than saving the entire RAM to a file and checking
> that.
>
> Signed-off-by: Alexey Kardashevskiy
> ---
>
>
> I am actually wondering if there is an easi
Here is the exact working command line I used for Windows 95C (OSR2.5):
qemu-system-i386 -cpu pentium -m 128 -vga std -no-kvm -hda
~/Win95C.qcow2 -nodefaults -no-hpet -no-acpi -nodefaults -monitor stdio
-sdl -boot menu=on,order=c,splash-time=2000 -accel tcg,thread=single
To install the OS I simpl
This returns MD5 checksum of all RAM blocks for migration debugging
as this is way faster than saving the entire RAM to a file and checking
that.
Signed-off-by: Alexey Kardashevskiy
---
I am actually wondering if there is an easier way of getting these
checksums and I just do not see it, it can
** Description changed:
Qemu crashes when doing avocado-vt test on virtio-9p filesystem.
- This bug can be reproduced running
https://github.com/autotest/tp-qemu/blob/master/qemu/tests/9p.py.
+ This bug can be reproduced running
https://github.com/autotest/tp-qemu/blob/master/qemu/tests/9p.py
On Wed, Aug 21, 2019 at 04:53:27PM +0100, Daniel P. Berrangé wrote:
>The ordering of events that are emitted during the rmdir
>test have changed with kernel >= 5.3. Semantically both
>new & old orderings are correct, so we must be able to
>cope with either.
>
>To cope with this, when we see an unex
On Wed, Aug 21, 2019 at 10:28:41AM -0500, Paul A. Clarke wrote:
> From: "Paul A. Clarke"
>
> A class of instructions of the form:
> op Target,A,B
> which operate like:
> Target = Target * A + B
> have a bit set which distinguishes them from instructions that operate as:
> Target = Target *
On Tue, Aug 20, 2019 at 12:26:04PM -0500, Paul A. Clarke wrote:
> From: "Paul A. Clarke"
>
> helper_xscvdpspn() uses float64_to_float32() to convert double-precision
> floating-point to single-precision. Unfortunately, float64_to_float32()
> converts SNAN to QNAN, which should not happen with xs
On Wed, Aug 21, 2019 at 12:39:45PM +0930, Joel Stanley wrote:
> This makes the powernv machine easier for end users as the default
> initrd address (1.5GB) is now within RAM.
>
> This uses less than 2GB of RAM to ensure 32 bit Qemu still works.
>
> Signed-off-by: Joel Stanley
Applied to ppc-for
On 8/21/19 8:08 AM, Tony Nguyen wrote:
> Rename ALIGNED_ONLY to TARGET_ALIGNED_ONLY for clarity and move
> defines out of target/foo/cpu.h into configure, as we do with
> TARGET_WORDS_BIGENDIAN, so that it is always defined early.
>
> Poisoned TARGET_ALIGNED_ONLY to prevent use in common code.
>
After hours bisecting various QEMU/SeaBIOS combinations, Brad figured
out a new commit:
0a7fa00a13f0852ec6fa83ab987a5ee7978d9867 is the first bad commit
Author: Emilio G. Cota
Date: Mon Aug 13 20:52:26 2018 -0400
configure: enable mttcg for i386 and x86_64
Note 1: Brad was not using '-M i
On Wed, 2019-08-21 at 16:39 +0100, Daniel P. Berrangé wrote:
> On Wed, Aug 14, 2019 at 11:22:07PM +0300, Maxim Levitsky wrote:
> > * rename the write_func to create_write_func,
> > and init_func to create_init_func
> > this is preparation for other write_func that will
> > be used to update
On Tue, 2019-08-20 at 18:38 +0200, Max Reitz wrote:
> On 14.08.19 22:22, Maxim Levitsky wrote:
> > * rename the write_func to create_write_func,
> > and init_func to create_init_func
> > this is preparation for other write_func that will
> > be used to update the encryption keys.
> >
> > No
On Tue, 2019-08-20 at 19:36 +0200, Max Reitz wrote:
> On 14.08.19 22:22, Maxim Levitsky wrote:
> > This is also a preparation for key read/write/erase functions
> >
> > * use master key len from the header
> > * prefer to use crypto params in the QCryptoBlockLUKS
> > over passing them as functio
On 8/21/19 10:29 AM, Jan Bobek wrote:
> +for (intptr_t i = 0; i * sizeof(uint8_t) < oprsz; ++i) {
> +const uint8_t t = a->B(i) & (1 << 7);
> +ret |= i < 8 ? t >> (7 - i) : t << (i - 7);
You can avoid this variable shift by doing
uint32_t t = a->B(i) >> 7;
ret |= t << i;
>
Patchew URL:
https://patchew.org/QEMU/20190821122315.18015-1-kbast...@mail.uni-paderborn.de/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v2 0/5] tricore: Convert to translate_loop (resend)
Message-i
On Thu, 2019-08-22 at 02:01 +0300, Nir Soffer wrote:
> On Wed, Aug 14, 2019, 23:23 Maxim Levitsky wrote:
>
> > While there are other places where these are still stored in memory,
> > this is still one less key material area that can be sniffed with
> > various side channel attacks
> >
> >
> >
Is there a reason to guarantee support of a particular draft extension
version once it has been superseded by a subsequent version? I understand
why it was done for priv-1.9.1, but going forward I'm skeptical there will
be much/any code out in the wild that depends on old draft versions of
extensio
Patchew URL:
https://patchew.org/QEMU/20190821122315.18015-1-kbast...@mail.uni-paderborn.de/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v2 0/5] tricore: Convert to translate_loop (resend)
Message-i
On 8/21/19 4:05 PM, Richard Henderson wrote:
> On 8/21/19 5:23 AM, Bastian Koppelmann wrote:
>> @@ -3928,7 +3937,7 @@ static void decode_sr_system(DisasContext *ctx)
>> ctx->base.is_jmp = DISAS_NORETURN;
>> break;
>> case OPC2_16_SR_DEBUG:
>> -/* raise EXCP_DEBUG */
>
On 8/21/19 5:23 AM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann
> ---
> v1 -> v2:
> - save hflags in tricore_tr_init_disas_context()
>
> target/tricore/translate.c | 118 +++--
> 1 file changed, 74 insertions(+), 44 deletions(-)
Reviewed-by:
On 8/21/19 5:23 AM, Bastian Koppelmann wrote:
> @@ -3928,7 +3937,7 @@ static void decode_sr_system(DisasContext *ctx)
> ctx->base.is_jmp = DISAS_NORETURN;
> break;
> case OPC2_16_SR_DEBUG:
> -/* raise EXCP_DEBUG */
> +generate_qemu_excp(ctx, EXCP_DEBUG);
>
On Wed, Aug 14, 2019, 23:23 Maxim Levitsky wrote:
> While there are other places where these are still stored in memory,
> this is still one less key material area that can be sniffed with
> various side channel attacks
>
>
>
> Signed-off-by: Maxim Levitsky
> ---
> crypto/block-luks.c | 52
On 8/21/19 5:23 AM, Bastian Koppelmann wrote:
> we now fetch 2 bytes first, check whether we have a 32 bit insn, and only then
> fetch another 2 bytes. We also make sure that a 16 bit insn that still fits
> into the current page does not end up in the next page.
>
> Signed-off-by: Bastian Koppelma
On Tue, 2019-08-20 at 20:01 +0200, Max Reitz wrote:
> On 14.08.19 22:22, Maxim Levitsky wrote:
> > With upcoming key management, the header will
> > need to be stored after the image is created.
> >
> > Extracting load header isn't strictly needed, but
> > do this anyway for the symmetry.
> >
> >
On 8/21/19 3:31 PM, Richard Henderson wrote:
>> Yes, that's what I mean, TARGET_PAGE_SIZE, but eventually crossing a
>> page boundary. The longer I stare at the MVCL code, the more broken it
>> is. There are more nice things buried in the PoP. MVCL does not detect
>> access exceptions beyond the ne
On Tue, 2019-08-20 at 20:12 +0200, Max Reitz wrote:
> On 14.08.19 22:22, Maxim Levitsky wrote:
> > While there are other places where these are still stored in memory,
> > this is still one less key material area that can be sniffed with
> > various side channel attacks
> >
> >
> >
>
> (Many em
On Tue, 2019-08-20 at 20:29 +0200, Max Reitz wrote:
> On 14.08.19 22:22, Maxim Levitsky wrote:
> > Signed-off-by: Maxim Levitsky
> > ---
> > block/crypto.c | 16 ++
> > block/crypto.h | 3 +
> > qemu-img-cmds.hx | 13 +
> > qemu-img.c | 140 ++
On Tue, 2019-08-20 at 20:27 +0200, Max Reitz wrote:
> On 14.08.19 22:22, Maxim Levitsky wrote:
> > This adds:
> >
> > * x-blockdev-update-encryption and x-blockdev-erase-encryption qmp commands
> > Both commands take the QCryptoKeyManageOptions
> > the x-blockdev-update-encryption is meant for
On 8/21/19 2:33 PM, David Hildenbrand wrote:
>> NOTDIRTY cannot fault at all. The associated rcu critical section is ugly
>> enough to make me not want to do anything except continue to go through the
>> regular MMIO path.
>>
>> In any case, so long as we eliminate *access* faults by probing the p
On Wed, 2019-08-21 at 13:47 +0200, Markus Armbruster wrote:
> Maxim Levitsky writes:
>
> > This adds:
> >
> > * x-blockdev-update-encryption and x-blockdev-erase-encryption qmp commands
> > Both commands take the QCryptoKeyManageOptions
> > the x-blockdev-update-encryption is meant for non d
On 7/15/19 4:19 PM, Stefan Hajnoczi wrote:
> Short reads are possible with cache=writeback (see Patch 3 for details).
> Handle this by resubmitting requests until the read is completed.
>
> Patch 1 adds trace events useful for debugging io_uring.
>
> Patch 2 fixes EINTR. This lays the groundw
On Tue, 2019-08-20 at 19:59 +0200, Max Reitz wrote:
> On 14.08.19 22:22, Maxim Levitsky wrote:
>
> [...]
>
> > Testing. This was lightly tested with manual testing and with few iotests
> > that I prepared.
> > I haven't yet tested fully the write sharing behavior, nor did I run the
> > whole io
On 21.08.19 22:38, Richard Henderson wrote:
> On 8/21/19 12:36 PM, David Hildenbrand wrote:
There are certain cases where we can't get access to the raw host
page. Namely, cpu watchpoints, LAP, NODIRTY. In summary: this won't
as you describe. (my first approach did exactly this)
>>>
This happens because we're applying a loose test for the v8m magic
exception return address.
There are two possible fixes for this, and perhaps we should
apply both of them:
(1) Unset ARM_FEATURE_M_SECURITY for arm-linux-user.
This would disable the FNC_RETURN_MIN_MAGIC test,
which, unlik
** Changed in: qemu
Status: New => Confirmed
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1840922
Title:
qemu-arm for cortex-m33 aborts with unhandled CPU exception 0x8
Status in QEMU:
C
On 8/21/19 10:21 AM, Vladimir Sementsov-Ogievskiy wrote:
> [CC Nikolay]
>
> 21.08.2019 1:25, John Snow wrote:
>> Hi, downstream here at Red Hat I've been fielding some questions about
>> the usability and feature readiness of Bitmaps (and related features) in
>> QEMU.
>>
>> Here are some questi
On Wed, Aug 21, 2019 at 10:27:11PM +0200, Aleksandar Markovic wrote:
> 02.08.2019. 17.37, "Aleksandar Markovic" је
> написао/ла:
> >
> > From: Aleksandar Markovic
> >
> > This little series improves linux_ssh_mips_malta.py, both in the sense
> > of code organization and in the sense of quantity o
On Wed, Aug 21, 2019 at 07:54:17PM +0800, owen...@ucloud.cn wrote:
> It is CentOS 6.3 with kernel version 2.6.32-279. Actually all CentOS 6
> releases have this issue.
We stopped supporting CentOS 6 in July 2016 (2 years after CentOS
7 was released). Be aware that even if we work around that
spe
On 8/21/19 12:36 PM, David Hildenbrand wrote:
>>> There are certain cases where we can't get access to the raw host
>>> page. Namely, cpu watchpoints, LAP, NODIRTY. In summary: this won't
>>> as you describe. (my first approach did exactly this)
>>
>> NODIRTY and LAP are automatically handled via p
Patchew URL: https://patchew.org/QEMU/20190821201921.106902-1-...@google.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH] linux-user: hijack open() for thread directories
Message-id: 20190821201921.
On 7/23/2019 5:43 PM, Cornelia Huck wrote:
> On Tue, 16 Jul 2019 14:56:32 -0600
> Alex Williamson wrote:
>
>> On Tue, 9 Jul 2019 15:19:08 +0530
>> Kirti Wankhede wrote:
>
> I'm still a bit unsure about the device_state bit handling as well.
>
>>> + * device_state: (read/write)
>>> + *
Sorry for the delay.
On 7/17/2019 2:26 AM, Alex Williamson wrote:
> On Tue, 9 Jul 2019 15:19:08 +0530
> Kirti Wankhede wrote:
>
>> - Defined MIGRATION region type and sub-type.
>> - Used 3 bits to define VFIO device states.
>> Bit 0 => _RUNNING
>> Bit 1 => _SAVING
>> Bit 2 => _RESU
02.08.2019. 17.37, "Aleksandar Markovic" је
написао/ла:
>
> From: Aleksandar Markovic
>
> This little series improves linux_ssh_mips_malta.py, both in the sense
> of code organization and in the sense of quantity of executed tests.
>
Hello, all.
I am going to send a new version in few days, and
Paolo,
It makes sense to match real HW. That puts us back to
the reset vector and handling the initial SMI at
3000:8000. That is all workable from a FW implementation
perspective. It look like the only issue left is DMA.
DMA protection of memory ranges is a chipset feature.
For the current QEM
Besides /proc/self|, files under /proc/thread-self and
/proc/self|/task/ also expose host information to the guest
program. This patch adds them to the hijack infrastracture. Note that
is_proc_myself() does not check if the matches the current thread
and is thus only suitable for procfs files that
On 8/21/19 10:41 AM, Vladimir Sementsov-Ogievskiy wrote:
> 09.08.2019 23:13, John Snow wrote:
>> Backup jobs may yield prior to installing their handler, because of the
>> job_co_entry shim which guarantees that a job won't begin work until
>> we are ready to start an entire transaction.
>>
>> U
On 21.08.19 21:19, Richard Henderson wrote:
> On 8/21/19 10:37 AM, David Hildenbrand wrote:
>> Hah, guess what, I implemented a similar variant of "fetch all
>> of the host addresses" *but* it is not that easy as you might
>> think (sorry for the bad news).
>
> I think it is, because I didn't thin
On Thu, 15 Aug 2019 14:37:52 PDT (-0700), alistai...@gmail.com wrote:
On Thu, Aug 15, 2019 at 2:07 AM Peter Maydell wrote:
On Thu, 15 Aug 2019 at 09:53, Aleksandar Markovic
wrote:
>
> > We can accept draft
> > extensions in QEMU as long as they are disabled by default.
> Hi, Alistair, Palmer
On 8/21/19 10:37 AM, David Hildenbrand wrote:
> Hah, guess what, I implemented a similar variant of "fetch all
> of the host addresses" *but* it is not that easy as you might
> think (sorry for the bad news).
I think it is, because I didn't think it *that* easy. :-)
> There are certain cases whe
* Michael S. Tsirkin (m...@redhat.com) wrote:
> On Fri, Aug 16, 2019 at 03:33:20PM +0100, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > The virtio-fs virtio device provides shared file system access using
> > the FUSE protocol carried ovew virtio.
> > The actual f
On Thu, Aug 15, 2019 at 11:40 AM Stefan Hajnoczi wrote:
> On Wed, Aug 14, 2019 at 11:37:24PM -0300, vandersonmr wrote:
> > This commit adds support to Linux Perf in order
> > to be able to analyze qemu jitted code and
> > also to able to see the TBs PC in it.
>
> Is there any reference to the fil
* Michael S. Tsirkin (m...@redhat.com) wrote:
> On Fri, Aug 16, 2019 at 03:33:20PM +0100, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> > +/* Hiprio queue */
> > +virtio_add_queue(vdev, fs->conf.queue_size, vuf_handle_output);
> >
>
> Weird, spec patch v6 says:
On 21.08.19 16:14, Lukáš Doktor wrote:
> Hello guys,
>
> First attempt was rejected due to zip attachment, let's try it again with
> just Avocado-vt debug.log and serial console log files attached.
>
> I bisected a regression on aarch64 all the way to this commit: "qcow2: skip
> writing zero bu
I noticed recently that the exit semihosting call on nios2 was
ignoring its parameter and always returning status 0 instead. It
turns out the handler was retrieving the value of the wrong register.
Since the nios2 semihosting implementation was basically
cut-and-pasted from that for m68k, I checke
On Wed, 14 Aug 2019 20:19:39 PDT (-0700), jonat...@fintelia.io wrote:
Ping! What is the status of this patch?
Sorry, I must have lost track of it. I've added it to my patch queue.
On Wed, Jul 3, 2019 at 2:02 PM Jonathan Behrens
wrote:
Bin, that proposal proved to be somewhat more controv
* Lukas Straub (lukasstra...@web.de) wrote:
> On Fri, 16 Aug 2019 01:51:20 +
> "Zhang, Chen" wrote:
>
> > > -Original Message-
> > > From: Lukas Straub [mailto:lukasstra...@web.de]
> > > Sent: Friday, August 16, 2019 3:48 AM
> > > To: Dr. David Alan Gilbert
> > > Cc: qemu-devel ; Zha
Add all the AVX2 vector instruction entries to sse-opcode.inc.h.
Signed-off-by: Jan Bobek
---
target/i386/sse-opcode.inc.h | 362 ++-
1 file changed, 359 insertions(+), 3 deletions(-)
diff --git a/target/i386/sse-opcode.inc.h b/target/i386/sse-opcode.inc.h
index
On 21.08.19 19:26, Richard Henderson wrote:
> On 8/21/19 2:22 AM, David Hildenbrand wrote:
>> +/*
>> + * Make sure the read access is permitted and TLB entries are created. In
>> + * very rare cases it might happen that the actual accesses might need
>> + * new MMU translations. If the page tables
Introduce code generators required by AVX2 instructions.
Signed-off-by: Jan Bobek
---
target/i386/translate.c | 407 ++--
1 file changed, 395 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 3f4bb40932..31499
This helper has been obsoleted by the new code.
Signed-off-by: Jan Bobek
---
target/i386/ops_sse.h| 19 ---
target/i386/ops_sse_header.h | 4
target/i386/translate.c | 33 -
3 files changed, 56 deletions(-)
diff --git a/target/i
This patch fixes a bug that caused semihosted exit to always return
status 0; it was incorrectly using the value of register R_ARG0 (which
contains the HOSTED_EXIT request number) instead of register R_ARG1.
Note that per the newlib documentation for the nios2 semihosting protocol
https://www.sou
Make these helpers suitable for use with tcg_gen_gvec_* functions.
Signed-off-by: Jan Bobek
---
target/i386/ops_sse.h| 64 +++-
target/i386/ops_sse_header.h | 2 +-
target/i386/translate.c | 9 +++--
3 files changed, 32 insertions(+), 43 deletions(-
On 8/21/19 9:41 AM, Laurent Vivier wrote:
Could add this information in the commit messages of each patch?
Sure. V2 of the patches coming up shortly.
-Sandra
Make these helpers suitable for use with tcg_gen_gvec_* functions.
---
target/i386/ops_sse.h| 27 +--
target/i386/ops_sse_header.h | 4 ++--
target/i386/translate.c | 18 --
3 files changed, 27 insertions(+), 22 deletions(-)
diff --git a/targe
On 8/20/19 8:10 PM, no-re...@patchew.org wrote:
> Patchew URL: https://patchew.org/QEMU/20190820235243.26092-1-js...@redhat.com/
>
>
>
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Type: series
> Subject: [Qemu-devel] [PATCH v3
Get rid of unused macro definitions that have been left over after
removal of obsoleted helpers.
---
target/i386/ops_sse_header.h | 28 ++--
1 file changed, 6 insertions(+), 22 deletions(-)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index d8e3
This patch fixes a bug that caused semihosted exit to always return
status 0; it was incorrectly using the value of D0 (which
contains the HOSTED_EXIT request number) instead of D1.
Note that per the newlib documentation for the m68k semihosting protocol
https://www.sourceware.org/git/gitweb.cgi?
Add all the AVX vector instruction entries to sse-opcode.inc.h.
Signed-off-by: Jan Bobek
---
target/i386/sse-opcode.inc.h | 779 +++
1 file changed, 779 insertions(+)
diff --git a/target/i386/sse-opcode.inc.h b/target/i386/sse-opcode.inc.h
index 1359508424..c3c0e
On 21/08/19 19:25, Kinney, Michael D wrote:
> Could we have an initial SMBASE that is within TSEG.
>
> If we bring in hot plug CPUs one at a time, then initial
> SMBASE in TSEG can reprogram the SMBASE to the correct
> value for that CPU.
>
> Can we add a register to the hot plug controller that
On 19/08/2019 23:18, Max Reitz wrote:
> case_notrun() does not actually skip the current test case. It just
> adds a "notrun" note and then returns to the caller, who manually has to
> skip the test. Generally, skipping a test case is as simple as
> returning from the current function, but not
Add all the AES and PCLMULQDQ vector instruction entries to sse-opcode.inc.h.
Signed-off-by: Jan Bobek
---
target/i386/sse-opcode.inc.h | 34 ++
1 file changed, 34 insertions(+)
diff --git a/target/i386/sse-opcode.inc.h b/target/i386/sse-opcode.inc.h
index f43436
Make these helpers suitable for use with tcg_gen_gvec_* functions.
Signed-off-by: Jan Bobek
---
target/i386/ops_sse.h| 357 +--
target/i386/ops_sse_header.h | 30 ++-
target/i386/translate.c | 259 +++--
3 files changed, 306 inser
On 21.08.19 19:26, Richard Henderson wrote:
> On 8/21/19 2:22 AM, David Hildenbrand wrote:
>> +/*
>> + * Make sure the read access is permitted and TLB entries are created. In
>> + * very rare cases it might happen that the actual accesses might need
>> + * new MMU translations. If the page tables
Use the translator macros to define translators required by AVX
instructions.
Signed-off-by: Jan Bobek
---
target/i386/translate.c | 48 +
1 file changed, 48 insertions(+)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 14117c2993..9b
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