On Fri, Jul 19, 2019 at 03:14:22PM +0200, Philippe Mathieu-Daudé wrote:
> GCC9 is confused by this comment when building with CFLAG
> -Wimplicit-fallthrough=2:
>
> hw/ipmi/ipmi_bmc_extern.c: In function ‘addchar’:
> hw/ipmi/ipmi_bmc_extern.c:178:12: error: this statement may fall through
> [-
On 7/11/19 3:32 PM, Jan Bobek wrote:
> risugen_x86.pm is the main backend module for Intel i386 and x86_64
> architectures; it orchestrates generation of the test code with
> support from the rest of risugen_x86_* modules.
>
> Signed-off-by: Jan Bobek
> ---
> risugen_x86.pm | 518 +++
On 7/11/19 3:32 PM, Jan Bobek wrote:
> +sub load(%)
> +{
> +my (%args) = @_;
> +
> +@memory_opts{keys %args} = values %args;
> +$memory_opts{is_write} = 0;
> +}
> +
> +sub store(%)
> +{
> +my (%args) = @_;
> +
> +@memory_opts{keys %args} = values %args;
> +$memory_opts{is_
On 7/11/19 3:32 PM, Jan Bobek wrote:
> +sub data16($%)
> +{
> +my ($insn, %data16) = @_;
> +$insn->{data16} = \%data16;
> +}
> +
> +sub rep($%)
> +{
> +my ($insn, %rep) = @_;
> +$insn->{rep} = \%rep;
> +}
> +
> +sub repne($%)
> +{
> +my ($insn, %repne) = @_;
> +$insn->{repne
On 7/11/19 3:33 PM, Jan Bobek wrote:
> +# VEX.256.0F.WIG 28 /r: VMOVAPS ymm1, ymm2/m256
> +# VEX.256.0F.WIG 29 /r: VMOVAPS ymm2/m256, ymm1
> +VMOVAPS AVX2 0010100 d \
> + !constraints { vex($_, m => 0x0F, l => 256, v => 0); modrm($_); 1 } \
> + !memory { $d ? store(size => 32, align => 32) : load
On Thu, Jul 18, 2019 at 09:04:55AM +0800, Wei Yang wrote:
>The value left in nr is the number of bits for the last word, which
>could be calculate the last word mask directly.
>
>Remove the unnecessary size.
>
May I ask why Patch 2 is picked up, but this one is not?
>Signed-off-by: Wei Yang
>
>-
On 7/11/19 3:32 PM, Jan Bobek wrote:
> +# VEX.LIG.F3.0F.WIG 10 /r: VMOVSS xmm1, xmm2, xmm3
> +# VEX.LIG.F3.0F.WIG 10 /r: VMOVSS xmm1, m32
> +# VEX.LIG.F3.0F.WIG 11 /r: VMOVSS xmm1, xmm2, xmm3
> +# VEX.LIG.F3.0F.WIG 11 /r: VMOVSS m32, xmm1
> +VMOVSS AVX 0001000 d \
> + !constraints { vex($_, m => 0
In v2, we had successful migration of PCI and MSIX states as well as
various DMA addresses and ring page information.
This series enables the migration of various GIDs used by the device.
We have switched to a setup having two hosts and two VMs running atop them.
Migrations are now performed over
Map to DSR only when there is no mapping done already i.e., when
dev->dsr_info.dsr is NULL. This allows the rest of mappings and
ring inits to be done by calling load_dsr() when DSR has already
been mapped to, somewhere else.
Move free_dsr() out of load_dsr() and call it before the latter
as and w
vmstate_pvrdma describes the PCI and MSIX states as well as the dma
address for dsr and the gid table of device.
vmstate_pvrdma_gids describes each gid in the gid table.
pvrdma_post_save() does the job of unregistering gid entries from the
backend device in the source host.
pvrdma_post_load() map
For migration incoming side, it either quit in precopy or postcopy. It
is save to use the mis->bh for both instead of allocating a dedicated
QEMUBH for postcopy.
Signed-off-by: Wei Yang
---
migration/savevm.c | 17 -
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/
On 7/11/19 3:32 PM, Jan Bobek wrote:
> Add AES-NI and PCLMULQDQ instructions to the x86 configuration file.
>
> Signed-off-by: Jan Bobek
> ---
> x86.risu | 45 +
> 1 file changed, 45 insertions(+)
Reviewed-by: Richard Henderson
r~
On 7/11/19 3:32 PM, Jan Bobek wrote:
> Add SSE4.1 and SSE4.2 instructions to the x86 configuration file.
>
> Signed-off-by: Jan Bobek
> ---
> x86.risu | 270 +++
> 1 file changed, 270 insertions(+)
Reviewed-by: Richard Henderson
r~
I've also built qemu v4.0.0 with debug info, and the issue is not
reproducible with such a build.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1837218
Title:
qemu segfaults after spice update with
On 7/11/19 3:32 PM, Jan Bobek wrote:
> Add SSSE3 instructions to the x86 configuration file.
>
> Signed-off-by: Jan Bobek
> ---
> x86.risu | 160 +++
> 1 file changed, 160 insertions(+)
Reviewed-by: Richard Henderson
r~
On 7/11/19 3:32 PM, Jan Bobek wrote:
> Add SSE3 instructions to the x86 configuration file.
>
> Signed-off-by: Jan Bobek
> ---
> x86.risu | 50 ++
> 1 file changed, 50 insertions(+)
Reviewed-by: Richard Henderson
r~
On 7/11/19 3:32 PM, Jan Bobek wrote:
> +# F3 0F 2A /r: CVTSI2SS xmm1,r/m32
> +CVTSI2SS SSE2 00101010 \
> + !constraints { rep($_); modrm($_); !(defined $_->{modrm}{reg2} &&
> $_->{modrm}{reg2} == REG_RSP) } \
> + !memory { load(size => 4); }
> +
> +# F3 REX.W 0F 2A /r: CVTSI2SS xmm1,r/m
On 7/11/19 3:32 PM, Jan Bobek wrote:
> +# NP 0F F7 /r: MASKMOVQ mm1, mm2
> +MASKMOVQ SSE 0111 \
> + !constraints { modrm($_); $_->{modrm}{reg} &= 0b111; $_->{modrm}{reg2} &=
> 0b111 if defined $_->{modrm}{reg2}; defined $_->{modrm}{reg2} } \
> + !memory { load(size => 8, base => REG
From: Wei Yang
Add a test for bitmap_set. There are three cases:
* Both start and end is BITS_PER_LONG aligned
* Only start is BITS_PER_LONG aligned
* Only end is BITS_PER_LONG aligned
Signed-off-by: Wei Yang
Message-Id: <20190718010456.4234-3-richardw.y...@linux.intel.com>
Reviewed-by:
From: Jiri Slaby
In these multiline messages, there were typos. Fix them -- add a missing
space and remove a superfluous apostrophe.
Inspired by Tom's patch.
Signed-off-by: Jiri Slaby
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
Cc: qemu-triv...@nongnu.org
Cc: Brijesh Singh
From: Marc-André Lureau
Our module system does not support Windows, because it relies on
resolving symbols from the main executable.
If there is enough interest in supporting modules on Windows, we could
generate an import library for the executable and link with it:
https://stackoverflow.com/qu
From: "Denis V. Lunev"
pconfig feature was added in 5131dc433df and removed in 712f807e196.
This patch mark this feature as known to QEMU and removed by
intentinally. This follows the convention of 9ccb9784b57 and f1a23522b03
dealing with 'osxsave' and 'ospke'.
Signed-off-by: Denis V. Lunev
CC:
From: Nicholas Piggin
Commit 1405819637f53 ("qmp: don't emit the RESET event on wakeup from
S3") changed system wakeup to avoid calling qapi_event_send_reset.
Commit 76ed4b18debfe ("s390/ipl: fix ipl with -no-reboot") appears to
have inadvertently broken that logic.
Acked-by: Cornelia Huck
Sign
From: Xie Yongji
This avoids memory leak when device hotplug is failed.
Signed-off-by: Xie Yongji
Message-Id: <20190717004606.12444-1-xieyon...@baidu.com>
Signed-off-by: Paolo Bonzini
---
hw/scsi/vhost-scsi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/scsi/vhost
From: Xie Yongji
This avoids memory leak when device hotplug is failed.
Signed-off-by: Xie Yongji
Message-Id: <20190717004606.12444-2-xieyon...@baidu.com>
Signed-off-by: Paolo Bonzini
---
hw/scsi/vhost-user-scsi.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --g
Do not allocate env->nested_state unless we later need to migrate the
nested virtualization state.
With this change, nested_state_needed() will return false if the
VMX flag is not included in the virtual machine. KVM_GET/SET_NESTED_STATE
is also disabled for SVM which is safer (we know that at le
From: Alexey Kardashevskiy
This adds an accelerator name to the "into mtree -f" to tell the user if
a particular memory section is registered with the accelerator;
the primary user for this is KVM and such information is useful
for debugging purposes.
This adds a has_memory() callback to the acc
The argument is not used and passing it clutters error propagation in the
callers. So, get rid of it.
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Paolo Bonzini
---
hw/scsi/vhost-scsi.c| 2 +-
hw/scsi/vhost-user-scsi.c | 2 +-
hw/scsi/virtio-scsi.c | 4 ++--
include/
The following changes since commit e2b47666fe1544959c89bd3ed159e9e37cc9fc73:
Merge remote-tracking branch 'remotes/berrange/tags/misc-next-pull-request'
into staging (2019-07-19 14:29:13 +0100)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for
From: Liran Alon
Previous to this change, a vCPU exposed with VMX running on a kernel
without KVM_CAP_NESTED_STATE or KVM_CAP_EXCEPTION_PAYLOAD resulted in
adding a migration blocker. This was because when the code was written
it was thought there is no way to reliably know if a vCPU is utilising
From: Shin'ichiro Kawasaki
When READ CAPACITY command completes, scsi_read_complete() function
snoops the command result and updates SCSIDevice members blocksize and
max_lba . However, this update is executed even when READ CAPACITY
command indicates an error in sense data. This causes unexpected
On Fri, Jul 19, 2019 at 03:14:25PM +0200, Philippe Mathieu-Daudé wrote:
> GCC9 is confused by this comment when building with CFLAG
> -Wimplicit-fallthrough=2:
>
> CC ppc64-softmmu/hw/ppc/spapr_rtc.o
> hw/ppc/spapr_events.c: In function ‘rtas_event_log_to_source’:
> hw/ppc/spapr_event
On Fri, Jul 19, 2019 at 03:14:23PM +0200, Philippe Mathieu-Daudé wrote:
> GCC9 is confused by this comment when building with CFLAG
> -Wimplicit-fallthrough=2:
>
> target/ppc/mmu_helper.c: In function ‘dump_mmu’:
> target/ppc/mmu_helper.c:1349:12: error: this statement may fall through
> [-We
Cc'ing Stefan
On 7/20/19 11:44 AM, Philippe Mathieu-Daudé wrote:
> Hi Frederic,
>
> On 7/20/19 8:18 AM, KONRAD Frederic wrote:
>> There are some debug trace appearing when using GDB with the HTIF mapped @0:
>> Invalid htif read: address 0002
>> Invalid htif read: address 000
Hi Frederic,
On 7/20/19 8:18 AM, KONRAD Frederic wrote:
> There are some debug trace appearing when using GDB with the HTIF mapped @0:
> Invalid htif read: address 0002
> Invalid htif read: address 0006
> Invalid htif read: address 000a
> Invalid htif read:
On 7/20/19 8:39 AM, Markus Armbruster wrote:
> Consider hw/tpm/trace-events
>
> # tpm_crb.c
> tpm_crb_mmio_read(uint64_t addr, unsigned size, uint32_t val) "CRB read
> 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx32
> tpm_crb_mmio_write(uint64_t addr, unsigned size, uint32_t val) "CRB wr
On 7/19/19 8:05 PM, Alistair Francis wrote:
> Fix a typo in the warning message displayed to users, don't print the
> message when running inside qtest and don't mention a specific QEMU
> version for the deprecation.
>
> Signed-off-by: Alistair Francis
> ---
> hw/riscv/boot.c | 12
>
Hi Michael,
On Fri, Jul 19, 2019 at 02:35:14AM +, Zhangbo (Oscar) wrote:
Hi All:
I have 2 questions about (un)hotplug on pcie-root-port.
First Question (hotplug failure because of redundant PCI_EXP_LNKSTA_DLLLA bit
set):
during VM boot, qemu sets PCI_EXP_LNKSTA_DLLLA according to thi
Patchew URL: https://patchew.org/QEMU/20190719185158.20316-1-alx...@bu.edu/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make docke
39 matches
Mail list logo
