On Sat, 08 Jun 2019 00:36:56 +0900,
Philippe Mathieu-Daudé wrote:
>
> Hi Yoshinori, Richard, Igor.
>
> This series an iteration of the previous v17 from Yoshinori with
> the fixups requested by Igor here:
> https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg07260.html
> and
> https://lists.
> -Original Message-
> From: Jason Wang [mailto:jasow...@redhat.com]
> Sent: Monday, June 10, 2019 12:09 PM
> To: Zhang, Chen ; Li Zhijian ;
> Dr. David Alan Gilbert ; Juan Quintela
> ; zhanghailiang ;
> qemu-dev ; Stefano Stabellini
> ; Paul Durrant
> Cc: Zhang Chen
> Subject: Re: [PAT
On Fri, 07 Jun 2019 23:19:49 +0900,
Igor Mammedov wrote:
>
> On Fri, 7 Jun 2019 18:11:05 +0900
> Yoshinori Sato wrote:
>
> > From: Richard Henderson
> >
> > There was confusion here about abstract classes and naming cpus.
> > We had registered a concrete class named "-rxcpu". This was put
>
>
> > This is the implementation of virtio-pmem device. Support will require
> > machine changes for the architectures that will support it, so it will
> > not yet be compiled. It can be unlocked with VIRTIO_PMEM_SUPPORTED per
> > machine and disabled globally via VIRTIO_PMEM.
> >
> > We cannot
> On Tue, May 21, 2019 at 6:43 AM Pankaj Gupta wrote:
> >
> > This patch sets dax device 'DAXDEV_SYNC' flag if all the target
> > devices of device mapper support synchrononous DAX. If device
> > mapper consists of both synchronous and asynchronous dax devices,
> > we don't set 'DAXDEV_SYNC'
Patchew URL:
https://patchew.org/QEMU/20190610020218.9228-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190610020218.9228-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PULL 00
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1525676
Title:
qemu runas
[Expired for qemu (Ubuntu) because there has been no activity for 60
days.]
** Changed in: qemu (Ubuntu)
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1525676
Ti
On 07/06/19 6:55 PM, Peter Maydell wrote:
> To build the C parts of risu for ppc64le with recent glibc/kernel
> headers, we need to include sys/user.h to avoid a compile error,
> because sys/ucontext.h defines a struct which includes a pointer
> to 'struct pt_regs' but does not provide a definit
On 2019/6/10 上午12:44, Zhang Chen wrote:
From: Zhang Chen
Xen COLO based on KVM COLO architecture, it shared COLO proxy and block
replication with KVM COLO. The only differece is Xen COLO have own
COLO-frame to handle live migration related function, so we need this
series make Xen COLO frame
Patchew URL:
https://patchew.org/QEMU/20190610020218.9228-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to
CPUNegativeOffsetState
Type: series
Messa
The encoding process could be described below:
for [content]
get length of a run
encode this run
By refactoring the code with this logic, it maybe a little easier to
understand.
Signed-off-by: Wei Yang
---
migration/xbzrle.c | 153 +--
Since we will not operate on the next address pointed by out, it is not
necessary to do addition on it.
After removing the operation, the function size reduced 16/18 bytes.
Signed-off-by: Wei Yang
---
util/cutils.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/util
Current xbzrle_encode_buffer() do everything in a big loop, which is a little
difficult for audience to catch the logic.
We can refine the logic with:
* get the length of a run
* encode it
At the same time, I found the encoding and decoding function has some extra
pointer operation. Removing
Patchew URL:
https://patchew.org/QEMU/20190610020218.9228-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 00/39] tcg: Move the softmmu tlb to
CPUNegativeOffsetState
Type: series
Messa
QEMU tracks whether a vcpu is halted using CPUState::halted. E.g.,
after initialization or reset, halted is 0 for the BSP (vcpu 0)
and 1 for the APs (vcpu 1, 2, ...). A halted vcpu should not be
handed to the hypervisor to run (e.g. hax_vcpu_run()).
Under HAXM, Android Emulator sometimes boots int
There was nothing armv7 specific about the bic+cmp sequence, however
looking at the set of guests more closely shows that the 8-bit immediate
operand for the bic can only be satisfied with one guest in tree:
baseline m-profile -- 10-bit pages with aligned 4-byte memory ops.
Therefore it does not se
This changes the code generation for the tlb from e.g.
ldr ip, [r6, #-0x10]
ldr r2, [r6, #-0xc]
and ip, ip, r4, lsr #8
ldrd r0, r1, [r2, ip]!
ldr r2, [r2, #0x18]
to
ldrd r0, r1, [r6, #-0x10]
and r0, r0, r4,
This macro is now always empty, so remove it. This leaves the
entire contents of CPUArchState under the control of the guest
architecture.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 2 --
target/alpha/cpu.h | 3
This changes the code generation for the tlb from e.g.
ldur x0, [x19, #0xffe0]
ldur x1, [x19, #0xffe8]
and x0, x0, x20, lsr #8
add x1, x1, x0
ldr x0, [x1]
ldr x1, [x1, #0x18]
to
ldp x
Amusingly, we had already ignored the comment to keep this value
at the end of CPUState. This restores the minimum negative offset
from TCG_AREG0 for code generation.
For the couple of uses within qom/cpu.c, without NEED_CPU_H, add
a pointer from the CPUState object to the IcountDecr object withi
cc more.
On 2019-06-10 10:19, Colin Xu wrote:
QEMU tracks whether a vcpu is halted using CPUState::halted. E.g.,
after initialization or reset, halted is 0 for the BSP (vcpu 0)
and 1 for the APs (vcpu 1, 2, ...). A halted vcpu should not be
handed to the hypervisor to run (e.g. hax_vcpu_run()).
We have for some time had code within the tcg backends to
handle large positive offsets from env. This move makes
sure that need not happen. Indeed, we are able to assert
at build time that simple offsets suffice for all hosts.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-of
Consolidate some boilerplate from foo_cpu_initfn.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 11 +++
target/alpha/cpu.c | 3 +--
target/arm/cpu.c| 3 +--
target/cris/cpu.
Nothing in there so far, but all of the plumbing done
within the target ArchCPU state.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 24
include/exec/cpu-defs.h | 8
target/alpha/cpu.h
Now that we have ArchCPU, we can define this generically,
in the one place that needs it.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
include/exec/gen-icount.h | 2 ++
target/alpha/cpu.h| 1 -
target/arm/cpu.h | 2 --
target/cr
Cleanup in the boilerplate that each target must define.
Replace uc32_env_get_cpu with env_archcpu. The combination
CPU(uc32_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
targe
Cleanup in the boilerplate that each target must define.
Replace xtensa_env_get_cpu with env_archcpu. The combination
CPU(xtensa_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Move cpu_get_tb_cpu_state below the include of "exec/cpu-all.h"
so that the definition of env_cpu i
Cleanup in the boilerplate that each target must define.
Replace sparc_env_get_cpu with env_archcpu. The combination
CPU(sparc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Cleanup in the boilerplate that each target must define.
Replace tricore_env_get_cpu with env_archcpu. The combination
CPU(tricore_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
Cleanup in the boilerplate that each target must define.
Replace tilegx_env_get_cpu with env_archcpu. The combination
CPU(tilegx_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
t
Cleanup in the boilerplate that each target must define.
Replace ppc_env_get_cpu with env_archcpu. The combination
CPU(ppc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/
Cleanup in the boilerplate that each target must define.
Replace s390_env_get_cpu with env_archcpu. The combination
CPU(s390_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
targe
Cleanup in the boilerplate that each target must define.
Replace sh_env_get_cpu with env_archcpu. The combination
CPU(sh_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
Cleanup in the boilerplate that each target must define.
Replace mb_env_get_cpu with env_archcpu. The combination
CPU(mb_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Move cpu_mmu_index below the include of "exec/cpu-all.h",
so that the definition of env_archcpu is availabl
Cleanup in the boilerplate that each target must define.
Replace nios2_env_get_cpu with env_archcpu. The combination
CPU(nios2_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
tar
Cleanup in the boilerplate that each target must define.
Replace riscv_env_get_cpu with env_archcpu. The combination
CPU(riscv_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Signed-off-by: Richard Henderson
---
target/riscv/cpu.h |
Cleanup in the boilerplate that each target must define.
Replace x86_env_get_cpu with env_archcpu. The combination
CPU(x86_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/
Cleanup in the boilerplate that each target must define.
Replace openrisc_env_get_cpu with env_archcpu. The combination
CPU(openrisc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
--
Cleanup in the boilerplate that each target must define.
Replace mips_env_get_cpu with env_archcpu. The combination
CPU(mips_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/mips/cpu.h
Now that we have both ArchCPU and CPUArchState, we can define
this generically instead of via macro in each target's cpu.h.
Reviewed-by: Peter Maydell
Acked-by: Alistair Francis
Signed-off-by: Richard Henderson
---
accel/tcg/atomic_template.h | 8 +--
include/exec/cpu-all.h
Cleanup in the boilerplate that each target must define.
Replace arm_env_get_cpu with env_archcpu. The combination
CPU(arm_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/
Cleanup in the boilerplate that each target must define.
Replace hppa_env_get_cpu with env_archcpu. The combination
CPU(hppa_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
targe
Cleanup in the boilerplate that each target must define.
Replace moxie_env_get_cpu with env_archcpu. The combination
CPU(moxie_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
tar
Cleanup in the boilerplate that each target must define.
The combination CPU(m68k_env_get_cpu) should have used
ENV_GET_CPU to begin; use env_cpu now.
Acked-by: Laurent Vivier
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
linux-user/m68k/target_
Cleanup in the boilerplate that each target must define.
Replace cris_env_get_cpu with env_archcpu. The combination
CPU(cris_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
targe
Fix all of the coding style errors in this file at once.
Reviewed-by: Alistair Francis
Signed-off-by: Richard Henderson
---
target/cris/mmu.c | 479 +++---
1 file changed, 237 insertions(+), 242 deletions(-)
diff --git a/target/cris/mmu.c b/target/cris/m
Cleanup in the boilerplate that each target must define.
Replace lm32_env_get_cpu with env_archcpu. The combination
CPU(lm32_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
targe
This will replace foo_env_get_cpu with a generic definition.
No changes to the target specific code so far.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
Move all softmmu tlb data into this structure. Arrange the
members so that we are able to place mask+table together and
at a smaller absolute offset from ENV.
Reviewed-by: Peter Maydell
Acked-by: Alistair Francis
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 61 +++-
Fix all of the coding style errors in this file at once.
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/cris/op_helper.c | 817 +++-
1 file changed, 398 insertions(+), 419 deletions(-)
diff --gi
For all targets, do this just before including exec/cpu-all.h.
Reviewed-by: Peter Maydell
Acked-by: Alistair Francis
Signed-off-by: Richard Henderson
---
target/alpha/cpu.h | 4 ++--
target/arm/cpu.h| 4 ++--
target/cris/cpu.h | 4 ++--
target/hppa/cpu.h | 4 ++--
targ
Cleanup in the boilerplate that each target must define.
Replace alpha_env_get_cpu with env_archcpu. The combination
CPU(alpha_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
tar
The following changes since commit 185b7ccc11354cbd69b6d53bf8d831dd964f6c88:
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190607-2' into
staging (2019-06-07 15:24:13 +0100)
are available in the Git repository at:
https://github.com/rth7680/qemu.git tags/pull-tcg-201
For all targets, do this just before including exec/cpu-all.h.
Reviewed-by: Peter Maydell
Acked-by: Alistair Francis
Signed-off-by: Richard Henderson
---
target/alpha/cpu.h | 1 +
target/arm/cpu.h| 1 +
target/cris/cpu.h | 1 +
target/hppa/cpu.h | 1 +
target/i386/cpu.
For all targets, into this new file move TARGET_LONG_BITS,
TARGET_PAGE_BITS, TARGET_PHYS_ADDR_SPACE_BITS,
TARGET_VIRT_ADDR_SPACE_BITS, and NB_MMU_MODES.
Include this new file from exec/cpu-defs.h.
This now removes the somewhat odd requirement that target/arch/cpu.h
defines TARGET_LONG_BITS before
Both structures are allocated once per mmu_idx.
There is no reason for them to be separate.
Reviewed-by: Alistair Francis
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 17 -
accel/tcg/cputlb.c | 24
2 files
The parameter list given in general register 1 shall be aligned
on a quadword boundary. This test currently succeeds or fails
depending on the compiler version used and the accidential layout
of the function's stack frame.
Signed-off-by: Richard Henderson
---
tests/tcg/s390x/csst.c | 2 +-
1 fi
arm and i386 has almost the same function acpi_add_rom_blob(), except
giving different FWCfgCallback function.
This patch moves acpi_add_rom_blob() to utils.c by passing
FWCfgCallback to it.
Signed-off-by: Wei Yang
Reviewed-by: Igor Mammedov
v7:
* rebase on top of current master because of c
When we are not in the last_stage, we need to update the cache if page
is not the same.
Currently this procedure is scattered in two places and mixed with
encoding status check.
This patch extract this general step out to make the code a little bit
easy to read.
Signed-off-by: Wei Yang
---
v2:
The ARM pseudocode installs the error_code into the original
pointer, not the encrypted pointer. The difference applies
within the 7 bits of pac data; the result should be the sign
extension of bit 55.
Add a testcase to that effect.
Signed-off-by: Richard Henderson
---
target/arm/pauth_helper.
On Fri, Jun 07, 2019 at 08:01:14PM +0100, Dr. David Alan Gilbert wrote:
>* Wei Yang (richardw.y...@linux.intel.com) wrote:
>> For cache miss condition not in last_stage, we need to insert data into
>> cache. When this step succeed, current_data should be updated. While no
>> matter these checks pas
On Fri, Jun 07, 2019 at 07:57:34PM +0100, Dr. David Alan Gilbert wrote:
>* Wei Yang (richardw.y...@linux.intel.com) wrote:
>> When we are not in the last_stage, we need to update the cache if page
>> is not the same.
>>
>> Currently this procedure is scattered in two places and mixed with
>> encod
The Valgrind tool fails to manage its termination when QEMU raises the
signal SIGKILL. Lets exclude such test cases from running under the
Valgrind because there is no sense to check memory issues that way.
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/039 | 5 +
tests/qemu-iotests
With the '-valgrind' option, let all the QEMU processes be run under
the Valgrind tool. The Valgrind own parameters may be set with its
environment variable VALGRIND_OPTS, e.g.
VALGRIND_OPTS="--leak-check=yes" ./check -qcow2 -valgrind
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/comm
As the iotests run longer under the Valgrind, the QEMU_COMM_TIMEOUT is
to be increased in the test cases 028, 183 and 192 when running under
the Valgrind.
Suggested-by: Roman Kagan
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/028 | 6 +-
tests/qemu-iotests/183 | 9 -
test
To synchronize the time when QEMU is running longer under the Valgrind,
increase the sleeping time int the test 247.
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/247 | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/tests/qemu-iotests/247 b/tests/qemu-iotests/24
The Valgrind uses the exported variable TMPDIR and fails if the
directory does not exist. Let us exclude such a test case from
being run under the Valgrind.
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/051 | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qemu-iotests/051 b/te
In the current implementation of the QEMU bash iotests, only qemu-io
processes may be run under the Valgrind, which is a useful tool for
finding memory usage issues. Let's allow the common.rc bash script
runing all the QEMU processes, such as qemu-kvm, qemu-img, qemu-ndb
and qemu-vxhs, under the Va
Processes are dying harder under the Valgring. It results in counting
the dying process as a newborn one. Make it sure that old NBD job get
finished before starting a new one.
Suggested-by: Roman Kagan
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/common.nbd | 6 ++
1 file changed
After including the Valgrind into the QEMU processes wrappers in the
common.rc script, the output for the tests 039 061 137 has been
changed and is to be amended.
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/039.out | 30 +-
tests/qemu-iotests/061.out | 12
From: Zhang Chen
We need to notify net filter to do checkpoint for Xen COLO, like KVM side.
Signed-off-by: Zhang Chen
---
migration/colo.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/migration/colo.c b/migration/colo.c
index 8c1644091f..9f84b1fa3c 100644
--- a/migration/colo.c
+++ b/
From: Zhang Chen
Add chardev handler to send notification to remote(current from Xen) colo-frame.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/net/colo-compare.c b/net/colo-compare.c
index 21849748
From: Zhang Chen
This patch make colo-compare can send message to remote COLO frame(Xen) when
occur checkpoint.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 54 +-
1 file changed, 44 insertions(+), 10 deletions(-)
diff --git a/net/colo-compar
From: Zhang Chen
Xen COLO based on KVM COLO architecture, it shared COLO proxy and block
replication with KVM COLO. The only differece is Xen COLO have own
COLO-frame to handle live migration related function, so we need this
series make Xen COLO frame can communicate with other COLO modules in
q
From: Zhang Chen
We need use this function to send notification message for remote
colo-frame(Xen).
So we add new parameter for this job.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 41 +
1 file changed, 33 insertions(+), 8 deletions(-)
diff --g
From: Zhang Chen
We add the "notify_dev=chardevID" parameter. After that colo-compare can
connect with
remote(currently just for Xen, KVM-COLO didn't need it.) colo-frame through
chardev socket,
it can notify remote(Xen) colo-frame to handle checkpoint event.
Signed-off-by: Zhang Chen
---
ne
Brief overview;
- Added "CPU class" m68k_feature to each CPU init
so MOVEC can detect wrong CR (Control Register) access
- Added cascaded "inheritance" of m68k_features by calling m680xx_cpu_initfn()
of previous CPU so that 68060 inherits 68040, and so on
- Added comments above m680xx_cpu_initf
QEMU_PPC_FEATURE2_VEC_CRYPTO enables the use
of VSX instructions in libcrypto that are accelerated
by the TCG vector instructions now.
QEMU_PPC_FEATURE2_DARN allows to use the new builtin
qemu_guest_getrandom() function.
Signed-off-by: Laurent Vivier
---
linux-user/elfload.c | 12 ++--
The default CPU for pseries has been set to POWER9 by default.
We can use the same default for linux-user
Signed-off-by: Laurent Vivier
---
linux-user/ppc/target_elf.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/ppc/target_elf.h b/linux-user/ppc/target_elf.h
in
Le 07/06/2019 à 01:41, Lucien Murray-Pitts a écrit :
> Altering all comments in target/m68k to match Qemu coding styles so that
> future
> patches wont fail due to style breaches.
>
> Signed-off-by: Lucien Murray-Pitts
> ---
>
> Notes:
> v1->v2
> - incorrectly made split-single line co
defining CADENCE_GEM_ERR_DEBUG causes compilation
errors, fix that.
Signed-off-by: Ramon Fried
---
hw/net/cadence_gem.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 7f63411430..5cc5a71524 100644
--- a/hw/net/cadence_g
Le 09/06/2019 à 12:51, Lucien Murray-Pitts a écrit :
> The register request via gdbstub would return the SR part
> which contains the Trace/Master/IRQ state flags, but
> would be missing the CR (Condition Register) state bits.
>
> This fix adds this support by merging them in the m68k
> specific g
The register request via gdbstub would return the SR part
which contains the Trace/Master/IRQ state flags, but
would be missing the CR (Condition Register) state bits.
This fix adds this support by merging them in the m68k
specific gdbstub handler m68k_cpu_gdb_read_register for SR register.
Signe
Le 09/06/2019 à 11:07, Lucien Murray-Pitts a écrit :
> The register request via gdbstub would return the SR part
> which contains the Trace/Master/IRQ state flags, but
> would be missing the CR (Condition Register) state bits.
>
> This fix adds this support by merging them in the m68k
> specific g
The register request via gdbstub would return the SR part
which contains the Trace/Master/IRQ state flags, but
would be missing the CR (Condition Register) state bits.
This fix adds this support by merging them in the m68k
specific gdbstub handler m68k_cpu_gdb_read_register for SR register.
Signe
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