Hi guys!
Some comments about things to improve in the virtio
crypto device part of the spec:
https://news.ycombinator.com/item?id=19698399#19706987
It would be great if someone translated this to
github issues and tried to improve the spec by
addressing them.
Thanks!
--
MST
On Samstag, 30. März 2019 21:01:28 CEST Christian Schoenebeck wrote:
> On Samstag, 30. März 2019 17:47:51 CET Greg Kurz wrote:
> > Maybe have a look at this tentative to fix QID collisions:
> >
> > https://lists.gnu.org/archive/html/qemu-devel/2018-02/msg02283.html
[snip]
> Question: so far I just
On Fri, 19 Apr 2019 at 12:46, Shahab Vahedi wrote:
>
> This change adapts io_readx() to its input access_type. Currently
> io_readx() treats any memory access as a read, although it has an
> input argument "MMUAccessType access_type". This results in:
>
> 1) Calling the tlb_fill() only with MMU_DA
From: Lukas Straub
Because event_unhandled_count may be accessed concurrently, it needs
to be protected by taking the lock. However the assert is outside the
lock, probably causing it to read garbage and aborting Qemu erroneously.
The Bug only happens when running Qemu in COLO mode.
This Patch f
Recently I am considering write a driver for edu device.
After reading the spec, I found these three small issue.
Two first two related the MMIO access and the third is
related the DMA operation.
Change since v1:
Fix format compile error on Windows
Li Qiang (3):
edu: mmio: set 'max_access_size'
The dma related variable is dma_addr_t, it is uint64_t in
x64 platform. Change these usage from uint32_to uint64_t to
avoid trancation.
Signed-off-by: Li Qiang
---
Change since v1:
Fix format compile error on Windows
hw/misc/edu.c | 15 ---
1 file changed, 8 insertions(+), 7 deletio
The edu spec said, the MMIO area can be accessed by 8 bytes.
However currently the 'max_access_size' is not so the MMIO
access dispatch can only access 4 bytes one time. This patch
fixes this to respect the spec.
Notice: here the 'min_access_size' is not a must, I set this
for completement.
Signe
The edu spec said when address >= 0x80, the MMIO area can
be accessed by 8 bytes.
Signed-off-by: Li Qiang
---
hw/misc/edu.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index 65fc32b928..4018dddcb8 100644
--- a/hw/misc/edu.c
+++ b/hw/misc/edu.c
@@ -189,6
The edu spec said, the MMIO area can be accessed by 8 bytes.
However currently the 'max_access_size' is not so the MMIO
access dispatch can only access 4 bytes one time. This patch
fixes this to respect the spec.
Notice: here the 'min_access_size' is not a must, I set this
for completement.
Signe
Recently I am considering write a driver for edu device.
After reading the spec, I found these three small issue.
Two first two related the MMIO access and the third is
related the DMA operation.
Change since v1:
Fix format compile error on Windows
Li Qiang (3):
tests: fw_cfg: add splash time t
Signed-off-by: Li Qiang
---
tests/fw_cfg-test.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/tests/fw_cfg-test.c b/tests/fw_cfg-test.c
index 9f75dbb5f4..de8e81ea9d 100644
--- a/tests/fw_cfg-test.c
+++ b/tests/fw_cfg-test.c
@@ -192,6 +192,24 @@ static void test_fw_cfg_r
The edu spec said when address >= 0x80, the MMIO area can
be accessed by 8 bytes.
Signed-off-by: Li Qiang
---
Change since v1:
Fix format compile error on Windows
hw/misc/edu.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index 65fc32b928..4018dddcb8 100
Patchew URL: https://patchew.org/QEMU/20190420145120.122847-1-liq...@163.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/b
The dma related variable is dma_addr_t, it is uint64_t in
x64 platform. Change these usage from uint32_to uint64_t to
avoid trancation.
Signed-off-by: Li Qiang
---
hw/misc/edu.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index
The edu spec said, the MMIO area can be accessed by 8 bytes.
However currently the 'max_access_size' is not so the MMIO
access dispatch can only access 4 bytes one time. This patch
fixes this to respect the spec.
Notice: here the 'min_access_size' is not a must, I set this
for completement.
Signe
Recently I am considering write a driver for edu device.
After reading the spec, I found these three small issue.
Two first two related the MMIO access and the third is
related the DMA operation.
Li Qiang (3):
edu: mmio: set 'max_access_size' to 8
edu: mmio: allow mmio read dispatch accept 8 b
The edu spec said when address >= 0x80, the MMIO area can
be accessed by 8 bytes.
Signed-off-by: Li Qiang
---
hw/misc/edu.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index 65fc32b928..4018dddcb8 100644
--- a/hw/misc/edu.c
+++ b/hw/misc/edu.c
@@ -189,6
On 4/20/19 9:34 AM, Richard Henderson wrote:
> This patch merely changes the interface, aborting on all failures,
> of which there are currently none.
>
> Reviewed-by: David Gibson
> Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
> ---
> tcg/aarch64/tcg-target.inc.c |
On 4/18/19 8:00 PM, Thomas Huth wrote:
> Add Kconfig dependencies for the emcraft-sf2 machine - we also
> distinguish between the machine (CONFIG_EMCRAFT_SF2) and the SoC
> (CONFIG_MSF2) now.
Thanks!
>
> Signed-off-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
> ---
> default-configs/
On 19/04/2019 15.44, G 3 wrote:
>
> On Apr 19, 2019, at 3:10 AM, Thomas Huth wrote:
>
>> On 19/04/2019 00.47, John Arbuckle wrote:
>>> Capstone is not necessary in order to use QEMU. Disable it by default.
>>> This will save the user the pain of having to figure why QEMU isn't
>>> building when t
On 4/18/19 8:00 PM, Thomas Huth wrote:
> Some of our machines (like the ARM cubieboard) use CONFIG_AHCI for an AHCI
> sysbus device, but do not use CONFIG_PCI since they do not feature a PCI
> bus. With CONFIG_AHCI but without CONFIG_PCI, currently linking fails:
>
> ../hw/ide/ich.o: In functi
Philippe Mathieu-Daudé 于2019年4月19日周五 上午5:01写道：
> Hi Li,
>
> On 3/19/19 3:30 AM, Li Qiang wrote:
> > Signed-off-by: Li Qiang
> > ---
> > tests/fw_cfg-test.c | 15 ++-
> > 1 file changed, 14 insertions(+), 1 deletion(-)
> >
> > diff --git a/tests/fw_cfg-test.c b/tests/fw_cfg-test.c
>
Signed-off-by: Li Qiang
---
tests/fw_cfg-test.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/tests/fw_cfg-test.c b/tests/fw_cfg-test.c
index 9f75dbb5f4..de8e81ea9d 100644
--- a/tests/fw_cfg-test.c
+++ b/tests/fw_cfg-test.c
@@ -192,6 +192,24 @@ static void test_fw_cfg_r
Hi Alex,
Le sam. 20 avr. 2019 01:05, Alex Bennée a écrit :
>
> Shahab Vahedi writes:
>
> > This change adapts io_readx() to its input access_type. Currently
> > io_readx() treats any memory access as a read, although it has an
> > input argument "MMUAccessType access_type". This results in:
> >
In the disscuss of adding reboot timeout test case:
https://lists.gnu.org/archive/html/qemu-devel/2019-04/msg03304.html
Philippe suggested we should uses the only related option for one
specific test. However currently we uses one QTestState for all the
test cases. In order to achieve Philippe's i
This is useful to write qtest about fw_cfg file entry.
Signed-off-by: Li Qiang
---
tests/libqos/fw_cfg.c | 45 +++
tests/libqos/fw_cfg.h | 2 ++
2 files changed, 47 insertions(+)
diff --git a/tests/libqos/fw_cfg.c b/tests/libqos/fw_cfg.c
index c6839c53c8
Signed-off-by: Li Qiang
---
tests/fw_cfg-test.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/tests/fw_cfg-test.c b/tests/fw_cfg-test.c
index c22503619f..9f75dbb5f4 100644
--- a/tests/fw_cfg-test.c
+++ b/tests/fw_cfg-test.c
@@ -174,6 +174,24 @@ static void test_fw_cfg_b
Currently, fw_cfg_test uses one QTestState for every test case.
This will add all command lines for every test case and
this is unnecessary. This patch split the test cases and for
every test case it uses his own QTestState. This patch does following
things:
1. Get rid of the global 'fw_cfg', this
Mark dirty as page, the step of each call is 1.
Signed-off-by: Li Feng
---
contrib/libvhost-user/libvhost-user.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib/libvhost-user/libvhost-user.c
index e08d6c7b97..2689de6d1c 100644
Patchew URL:
https://patchew.org/QEMU/20190420073442.7488-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190420073442.7488-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PATCH 0
The instruction set has 3 insns that perform the same operation,
only varying in which operand must overlap the destination. We
can represent the operation without overlap and choose based on
the operands seen.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 2 +-
tcg/aarch
On 4/19/19 9:22 PM, Shahab Vahedi wrote:
> This change adapts io_readx() to its input access_type. Currently
> io_readx() treats any memory access as a read, although it has an
> input argument "MMUAccessType access_type". This results in:
>
> 1) Calling the tlb_fill() only with MMU_DATA_LOAD
> 2)
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-runtime.h | 5 +++
tcg/aarch64/tcg-target.h | 1 +
tcg/i386/tcg-target.h| 1 +
tcg/tcg-op-gvec.h| 2 +
tcg/tcg-opc.h| 1 +
tcg/tcg.h| 1 +
accel/tcg/tcg-runtime-gvec.c | 48 ++
Signed-off-by: Richard Henderson
---
target/cris/translate.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/target/cris/translate.c b/target/cris/translate.c
index 11b2c11174..0374718f66 100644
--- a/target/cris/translate.c
+++ b/target/cris/translate.c
@@ -1685,18 +1
These instructions shift left or right depending on the sign
of the input, and 7 bits are significant to the shift. This
requires several masks and selects in addition to the actual
shifts to form the complete answer.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 15 +-
tar
This makes do_op3 match do_op2 in allowing for failure,
and thus fall back expansions.
Signed-off-by: Richard Henderson
---
tcg/tcg-op-vec.c | 45 +++--
1 file changed, 27 insertions(+), 18 deletions(-)
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
ind
The min/max instructions are not available for 64-bit elements.
Fixes: 93f332a50371
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 84d4
At present, only tcg_gen_cmpsel_vec added, which can be used by
other target-specific vector expanders. It is not clear whether
a full gvec expander would be worthwhile, given the unspecified
nature of the selector.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 1 +
tcg/i386/
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.inc.c | 15 +++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 7445f05885..66f16fbe3c 100644
--- a/tcg/i386/tcg-target.h
+++
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 2 +-
tcg/aarch64/tcg-target.inc.c | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 21d06d928c..e43554c3c7 100644
--- a/tcg/aarch64/tcg-target.h
+
Signed-off-by: Richard Henderson
---
tcg/tcg-op-gvec.c | 8
tcg/tcg-op-vec.c | 19 +++
2 files changed, 23 insertions(+), 4 deletions(-)
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
index e7029d26f4..dddb00719a 100644
--- a/tcg/tcg-op-gvec.c
+++ b/tcg/tcg-op-gvec
Use tcg_can_emit_vec_op instead of just TCG_TARGET_HAS_neg_vec,
so that we check the type and vece for the actual operation.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 5150c
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 4
1 file changed, 4 insertions(+)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index e68e4de08c..20c8699f79 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -513,6
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 77 ++--
1 file changed, 65 insertions(+), 12 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 20c8699f79..1e79a60fb2 100644
--- a/tcg/aarch64/tcg-target
this is apparmor profile related in the end, rebooting with apparmor disabled
allows
the domain to boot, so I'll deal with the gentoo community, and this can be
closed.
Thanks!
José.
** Changed in: libvirt
Status: New => Invalid
--
You received this bug notification because you are a
Signed-off-by: Richard Henderson
---
target/s390x/translate.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 0afa8f7ca5..030129acbb 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -1407,1
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 2 --
target/arm/neon_helper.c | 5 -
target/arm/translate-a64.c | 41 +-
target/arm/translate.c | 11 +++---
4 files changed, 8 insertions(+), 51 deletions(-)
diff --git a/targe
Signed-off-by: Richard Henderson
---
target/xtensa/translate.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 65561d2c49..62be8a6f6a 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -
Replace the single opcode in .opc with a null-terminated
array in .opt_opc. We still require that all opcodes be
used with the same .vece.
Validate the contents of this list with CONFIG_DEBUG_TCG.
All tcg_gen_*_vec functions will check any list active
during .fniv expansion. Swap the active list
Signed-off-by: Richard Henderson
---
target/ppc/translate.c | 80 +-
1 file changed, 32 insertions(+), 48 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index badc1ae1a3..97b8e8ddaf 100644
--- a/target/ppc/translate.c
+++ b/targe
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.inc.c | 35 +++
2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 241bf19413..b240633455 100644
--- a/tcg/i3
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.inc.c | 35 +++
2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index b240633455..618aa520d2 100644
--- a/tcg/i3
Remove a function of the same name from target/arm/.
Use a branchless implementation of abs that gcc uses for x86.
Signed-off-by: Richard Henderson
---
tcg/tcg-op.h | 5 +
target/arm/translate.c | 10 --
tcg/tcg-op.c | 20
3 files changed, 25
Allow the backend to expand dup from memory directly, instead of
forcing the value into a temp first. This is especially important
if integer/vector register moves do not exist.
Note that officially tcg_out_dupm_vec is allowed to fail.
If it did, we could fix this up relatively easily:
VECE ==
Signed-off-by: Richard Henderson
---
target/ppc/helper.h | 24 ++--
target/ppc/int_helper.c | 6 +-
target/ppc/translate/vmx-impl.inc.c | 168 ++--
3 files changed, 172 insertions(+), 26 deletions(-)
diff --git a/target/ppc/helper.h b/target
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 2 +-
tcg/aarch64/tcg-target.opc.h | 2 ++
tcg/aarch64/tcg-target.inc.c | 42
3 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target
We already had backend support for this feature, but with a
backend-specific opcode. Remove the old name, and reorder
the arguments to match the generic opcode.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.opc.h | 1 -
tcg/i386/tcg-target.inc.c |
At the same time, improve tcg_out_dupi_vec wrt broadcast
from the constant pool.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 57 +--
1 file changed, 43 insertions(+), 14 deletions(-)
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-t
From: David Hildenbrand
Let's add tcg_gen_gvec_3i(), similar to tcg_gen_gvec_2i(), however
without introducing "gen_helper_gvec_3i *fnoi", as it isn't needed
for now.
Signed-off-by: David Hildenbrand
Message-Id: <20190416185301.25344-2-da...@redhat.com>
Signed-off-by: Richard Henderson
---
tc
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-runtime.h | 15
tcg/tcg-op-gvec.h| 7 ++
tcg/tcg-op.h | 4 ++
accel/tcg/tcg-runtime-gvec.c | 132 +++
tcg/tcg-op-gvec.c| 87 +++
tcg/tcg-o
PowerPC Altivec does not support direct moves between vector registers
and general registers. So when tcg_out_mov fails, we can use the
backing memory for the temporary to perform the move.
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 25 ++---
1 file changed, 22 inserti
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 38 ++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 3f95930e88..1db4e22365 100644
--- a/tcg/aarch64/tcg-target.
Signed-off-by: Richard Henderson
---
tcg/tcg-op-gvec.h | 7 ++
tcg/tcg-op.h | 4 +
tcg/tcg-op-gvec.c | 210 ++
tcg/tcg-op-vec.c | 54
4 files changed, 275 insertions(+)
diff --git a/tcg/tcg-op-gvec.h b/tcg/tcg-op-gvec.h
index a0
Currently stubbed out in all backends that support vectors.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 6 ++
tcg/i386/tcg-target.inc.c| 7 +++
tcg/tcg.c| 19 ++-
3 files changed, 31 insertions(+), 1 deletion(-)
diff --gi
The i386 backend already has these functions, and the aarch64
backend could easily split out one. Nothing is done with these
functions yet, but this will aid register allocation of
INDEX_op_dup_vec in a later patch.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 12
The only fixed_reg is cpu_env, and it should not be modified
during any TB. Therefore code that tries to special-case moves
into a fixed_reg is dead. Remove it.
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 85 +--
1 file changed, 38 inser
This case is similar to INDEX_op_mov_* in that we need to do
different things depending on the current location of the source.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 9 ++--
tcg/i386/tcg-target.inc.c| 8 ++-
tcg/tcg.c| 102
This patch merely changes the interface, aborting on all failures,
of which there are currently none.
Reviewed-by: David Gibson
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 5 +++--
tcg/arm/tcg-target.inc.c | 7 +--
tcg/i386/tcg-target.inc.c| 5 +++--
tcg/m
Signed-off-by: Richard Henderson
---
tcg/tcg-op-vec.c | 49
1 file changed, 33 insertions(+), 16 deletions(-)
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index 27f65600c3..cfb18682b1 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -22
This allows us to fall back to integers if the tcg backend
does not support comparisons in the given vece.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index d408e4d7ef..13e2dc6
Based-on: tcg-next, which at present is only tcg_gen_extract2.
The dupm patches have been on list before, with a larger context
of supporting tcg/ppc. The rest of the set was written to support
David's s390 vector patches. In particular:
(1) Add vector absolute value.
(2) Add vector shift by no
This change adapts io_readx() to its input access_type. Currently
io_readx() treats any memory access as a read, although it has an
input argument "MMUAccessType access_type". This results in:
1) Calling the tlb_fill() only with MMU_DATA_LOAD
2) Considering only entry->addr_read as the tlb_addr
B
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