Patchew URL:
https://patchew.org/QEMU/20190329064853.22886-1-randrianas...@gmail.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190329064853.22886-1-randrianas...@gmail.com
Subject: [Qemu-devel] [PATCH] Fix 32-bit compilatio
---
ui/curses.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ui/curses.c b/ui/curses.c
index cc6d6da684..b25814f3fb 100644
--- a/ui/curses.c
+++ b/ui/curses.c
@@ -453,7 +453,7 @@ static uint16_t get_ucs(wchar_t wch, iconv_t conv)
swch = sizeof(wch);
if (iconv(con
> From: Peter Xu [mailto:pet...@redhat.com]
> Sent: Friday, March 29, 2019 2:14 PM
> To: qemu-devel@nongnu.org
> Subject: [PATCH v2 2/2] intel_iommu: Drop extended root field
>
> VTD_RTADDR_RTT is dropped even by the VT-d spec, so QEMU should
May be helpful to mention it is VT-d 3.0 which depreca
Can you still reproduce this with the latest version of upstream QEMU?
Please also provide the exact steps (e.g. command line options) that you
were using here.
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml,
When introducing the initial support for scalable mode we added a
new field into vmstate however we blindly migrate that field without
notice. That'll break migration no matter forward or backward.
The normal way should be that we use something like
VMSTATE_UINT32_TEST() or subsections for the ne
v2:
- patch 2: use "1" instead of "sizeof(bool)" for VMSTATE_UNUSED
because sizeof(bool) can be >1 depends on definition [Dave]
The first patch is the important one. It should fix up a migration
issue that Dave reported between 3.1<->4.0. The second patch is born
only because I noticed it when
VTD_RTADDR_RTT is dropped even by the VT-d spec, so QEMU should
probably do the same thing (after all we never really implemented it).
Since we've had a field for that in the migration stream, to keep
compatibility we need to fill the hole up.
Please refer to VT-d spec 10.4.6.
Signed-off-by: Pete
On Thu, 28 Mar 2019 10:34:08 PDT (-0700), alistai...@gmail.com wrote:
On Wed, Mar 27, 2019 at 8:15 PM Palmer Dabbelt wrote:
On Wed, 27 Mar 2019 09:29:56 PDT (-0700), alistai...@gmail.com wrote:
> On Wed, Mar 27, 2019 at 3:29 AM Palmer Dabbelt wrote:
>>
>> On Wed, 20 Mar 2019 17:46:09 PDT (-07
I didn't really CC David and Alexey, I'm doing it again...
On Fri, Mar 29, 2019 at 12:55:38PM +0800, Peter Xu wrote:
> On Thu, Mar 28, 2019 at 11:56:40AM +, Dr. David Alan Gilbert wrote:
> > * Peter Xu (pet...@redhat.com) wrote:
> > > VTD_RTADDR_RTT is dropped even by the VT-d spec, so QEMU sh
On Thu, Mar 28, 2019 at 11:56:40AM +, Dr. David Alan Gilbert wrote:
> * Peter Xu (pet...@redhat.com) wrote:
> > VTD_RTADDR_RTT is dropped even by the VT-d spec, so QEMU should
> > probably do the same thing (after all we never really implemented it).
> > Since we've had a field for that in the
I'm tired of nbdkit being able to trigger an assertion failure
in qemu-img convert. Let's get this into 4.0-rc2.
Since v2:
- add more patches, including a respin of a separately-posted
nbd/client: Deal with unaligned size from server
- Don't make unaligned sector from server inaccessible; instead
We have a latent bug in our NBD client code, tickled by the brand new
nbdkit 1.11.10 block status support:
$ nbdkit --filter=log --filter=truncate -U - \
data data="1" size=511 truncate=64K logfile=/dev/stdout \
--run 'qemu-img convert $nbd /var/tmp/out'
...
qemu-img: block/i
If an NBD server advertises a size that is not a multiple of a sector,
the block layer rounds up that size, even though we set info.size to
the exact byte value sent by the server. The block layer then proceeds
to let us read or query block status on the hole that it added past
EOF, which the NBD s
The next patch needs access to a device's minimum permitted
alignment, since NBD wants to advertise this to clients. Add
an accessor function, borrowing from blk_get_max_transfer()
for accessing a backend's block limits.
Signed-off-by: Eric Blake
Message-Id: <20180802144834.520904-2-ebl...@redhat
On 3/28/19 7:36 AM, Kevin Wolf wrote:
>>>
>>> I think making the behaviour inconsistent across different block
>>> drivers, so that some round up and some round down, is a bad idea.
>>> Even without the inconsistency, rounding down is already a bad idea
>>> because it means data loss when you copy
It is desirable for 'qemu-img map' to have the same output for a file
whether it is served over file or nbd protocols. However, ever since
we implemented block status for NBD (2.12), the NBD protocol forgot to
inform the block layer that as the final layer in the chain, the
offset is valid; without
Both NBD_CMD_BLOCK_STATUS and structured NBD_CMD_READ will split their
reply according to bdrv_block_status() boundaries. If the block device
has a request_alignment smaller than 512, but we advertise a block
alignment of 512 to the client, then this can result in the server
reply violating client
Add a test for the NBD client workaround in the previous patch. It's
not really feasible for an iotest to assume a specific tracing engine,
so we can't really probe trace_nbd_parse_blockstatus_compliance to see
if the server was fixed vs. whether the client just worked around the
server (other tha
27461d69a0f "ppc: add host-serial and host-model machine attributes
(CVE-2019-8934)" introduced 'host-serial' and 'host-model' machine
properties for spapr to explicitly control the values advertised to the
guest in device tree properties with the same names.
The previous behaviour on KVM was to u
From: Greg Kurz
I've been hitting several QEMU crashes while running a fedora29 ppc64le
guest under TCG. Each time, this would occur several minutes after the
guest reached login:
Fedora 29 (Twenty Nine)
Kernel 4.20.6-200.fc29.ppc64le on an ppc64le (hvc0)
Web console: https://localhost:9090/
l
From: Greg Kurz
Signed-off-by: Greg Kurz
Message-Id: <155359567174.1794128.3183997593369465355.st...@bahia.lan>
Signed-off-by: David Gibson
---
target/ppc/translate.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
i
From: Cédric Le Goater
On non-P9 machines, the XIVE interrupt mode is not advertised, see
spapr_dt_ov5_platform_support(). Add a couple of checks on the machine
configuration to filter bogus setups and prevent OS failures :
Interrupt modes
CPU/Compat XICSXIVE
qemu_getrampagesize() works out the minimum host page size backing any of
guest RAM. This is required in a few places, such as for POWER8 PAPR KVM
guests, because limitations of the hardware virtualization mean the guest
can't use pagesizes larger than the host pages backing its memory.
However,
From: Greg Kurz
Signed-off-by: Greg Kurz
Message-Id: <155327782047.1283071.10234727692461848972.st...@bahia.lan>
Tested-by: Suraj Jitindar Singh
Signed-off-by: David Gibson
---
target/ppc/translate.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/tra
From: Greg Kurz
We use PPC_SEGMENT_64B in various places to guard code that is specific
to 64-bit server processors compliant with arch 2.x. Consolidate the
logic in a helper macro with an explicit name.
Signed-off-by: Greg Kurz
Message-Id: <155327783157.1283071.3747129891004927299.st...@bahia.
The following changes since commit a04d91c701251a9b32b7364ddb48029ba024cb75:
Merge remote-tracking branch
'remotes/alistair/tags/pull-device-tree-20190327' into staging (2019-03-28
12:39:43 +)
are available in the Git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-4.0-20
From: Greg Kurz
Even if all ISAs up to v3 indeed mention:
If the "decrement and test CTR" option is specified (BO2=0), the
instruction form is invalid.
The UMs of all existing 64-bit server class processors say:
If BO[2] = 0, the contents of CTR (before any update) are used as the
Ping... May need to wait until the 4.1 version?
Thanks
Zhang Chen
> -Original Message-
> From: Zhang, Chen
> Sent: Friday, March 15, 2019 2:13 PM
> To: Li Zhijian ; Zhang Chen ;
> Dr. David Alan Gilbert ; Juan Quintela
> ; zhanghailiang ;
> Jason Wang ; Peter Maydell
> ; qemu-dev
> Cc:
On Fri, Mar 29, 2019 at 12:04:31AM +0800, Alex Williamson wrote:
> On Thu, 28 Mar 2019 10:21:38 +0100
> Erik Skultety wrote:
>
> > On Thu, Mar 28, 2019 at 04:36:03AM -0400, Zhao Yan wrote:
> > > hi Alex and Dave,
> > > Thanks for your replies.
> > > Please see my comments inline.
> > >
> > > On T
On Fri, Mar 29, 2019 at 09:51:06AM +0800, Yi Sun wrote:
> On 19-03-28 18:49:32, Peter Xu wrote:
> > When introducing the initial support for scalable mode we added a
> > new field into vmstate however we blindly migrate that field without
> > notice. That'll break migration no matter forward or ba
On 19-03-28 18:49:32, Peter Xu wrote:
> When introducing the initial support for scalable mode we added a
> new field into vmstate however we blindly migrate that field without
> notice. That'll break migration no matter forward or backward.
>
Just curious, what is the scenario to break migration
On Thu, Mar 28, 2019 at 10:26:07AM +0100, David Hildenbrand wrote:
> On 28.03.19 02:18, David Gibson wrote:
> > On Wed, Mar 27, 2019 at 03:22:58PM +0100, David Hildenbrand wrote:
> >> On 27.03.19 10:03, David Gibson wrote:
> >>> On Wed, Mar 27, 2019 at 09:10:01AM +0100, David Hildenbrand wrote:
> >
On Thu, Mar 28, 2019 at 12:39:24PM +0100, Igor Mammedov wrote:
> On Thu, 28 Mar 2019 11:18:02 +0100
> David Hildenbrand wrote:
>
> > On 28.03.19 01:24, David Gibson wrote:
> > > On Wed, Mar 27, 2019 at 09:06:53PM +0100, David Hildenbrand wrote:
> > >> On 27.03.19 17:45, Igor Mammedov wrote:
>
Patchew URL:
https://patchew.org/QEMU/20190328230404.12909-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190328230404.12909-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PATCH for-4.1 v2 0
On Thu, Mar 28, 2019 at 11:00:44AM +0100, Cédric Le Goater wrote:
> On non-P9 machines, the XIVE interrupt mode is not advertised, see
> spapr_dt_ov5_platform_support(). Add a couple of checks on the machine
> configuration to filter bogus setups and prevent OS failures :
>
>
On Thu, Mar 28, 2019 at 12:34:58PM +0100, David Hildenbrand wrote:
> Rename qemu_getrampagesize() to qemu_getminrampagesize(). While at it,
> properly rename find_min_supported_pagesize() to find_max_pagesize().
>
> s390x is actually interrested into the maximum ram pagesize, so
s/interrested/int
On Thu, Mar 28, 2019 at 01:56:48PM +0100, Greg Kurz wrote:
> On Thu, 28 Mar 2019 15:40:25 +1100
> David Gibson wrote:
>
> > 27461d69a0f "ppc: add host-serial and host-model machine attributes
> > (CVE-2019-8934)" introduced 'host-serial' and 'host-model' machine
> > properties for spapr to explic
On Thu, Mar 28, 2019 at 02:21:51PM +0100, Greg Kurz wrote:
> On Wed, 27 Mar 2019 17:41:00 -0300
> "Maxiwell S. Garcia" wrote:
>
> > Here are two patches to add a handler for ibm,get-vpd RTAS calls.
> > This RTAS exposes host information in case of set QEMU options
> > 'host-serial' and 'host-mode
On Thu, Mar 28, 2019 at 12:34:57PM +0100, David Hildenbrand wrote:
> Right now we configure the pagesize quite early, when initializing KVM.
> This is long before system memory is actually allocated via
> memory_region_allocate_system_memory(), and therefore memory backends
> marked as mapped.
>
>
On Thu, Mar 28, 2019 at 11:18:02AM +0100, David Hildenbrand wrote:
> On 28.03.19 01:24, David Gibson wrote:
> > On Wed, Mar 27, 2019 at 09:06:53PM +0100, David Hildenbrand wrote:
> >> On 27.03.19 17:45, Igor Mammedov wrote:
> >>> On Wed, 27 Mar 2019 14:59:44 +0100
> >>> David Hildenbrand wrote:
>
On Thu, Mar 28, 2019 at 8:39 AM Peter Maydell wrote:
>
> In the stripe8() function we use a variable length array; however
> we know that the maximum length required is MAX_NUM_BUSSES. Use
> a fixed-length array and an assert instead.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alistair Franci
Move all softmmu tlb data into this structure. Arrange the
members so that we are able to place mask+table together and
at a smaller absolute offset from ENV.
Acked-by: Alistair Francis
Signed-off-by: Richard Henderson
---
accel/tcg/softmmu_template.h | 4 +-
include/exec/cpu-defs.h |
Changes from v1->v2:
* Add cpu_set_cpustate_pointers.
* Add icount_decr_ptr to CPUState.
Blurb from v1:
This started merely as an attempt to reduce the size of each
softmmu lookup by using smaller offsets from env. But in the
end it also represents a significant cleanup in the boilerplate
th
Combined uses of CPU(arm_env_get_cpu()) were failures to use
the more proper, ENV_GET_CPU macro, now replaced by env_cpu.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 5 --
linux-user/aarch64/cpu_loop.c | 6 +-
linux-user/aarch64/signal.c | 4 +-
linux-user/arm/cp
Signed-off-by: Richard Henderson
---
target/lm32/cpu.h | 5 -
target/lm32/helper.c| 19 ++-
target/lm32/op_helper.c | 6 +++---
target/lm32/translate.c | 2 +-
4 files changed, 10 insertions(+), 22 deletions(-)
diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h
i
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 17 -
accel/tcg/cputlb.c | 24
2 files changed, 16 insertions(+), 25 deletions(-)
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 8f2a848bf5..52d150aaf1 100644
--- a/
Combined uses of CPU(x86_env_get_cpu()) were failures to use
the more proper, ENV_GET_CPU macro, now replaced by env_cpu.
Signed-off-by: Richard Henderson
---
target/i386/cpu.h | 5 -
bsd-user/main.c| 3 +--
hw/i386/kvmvapic.c | 4 ++--
hw/i386/pc.c
For all targets, do this just before including exec/cpu-all.h.
Acked-by: Alistair Francis
Signed-off-by: Richard Henderson
---
target/alpha/cpu.h | 1 +
target/arm/cpu.h| 1 +
target/cris/cpu.h | 1 +
target/hppa/cpu.h | 1 +
target/i386/cpu.h | 1 +
target/lm32/c
Signed-off-by: Richard Henderson
---
target/mips/cpu.h| 5 -
hw/intc/mips_gic.c | 2 +-
hw/mips/mips_int.c | 2 +-
linux-user/mips/cpu_loop.c | 2 +-
target/mips/helper.c | 15 +--
target/mips/op_helper.c |
Signed-off-by: Richard Henderson
---
linux-user/m68k/target_cpu.h | 2 +-
target/m68k/cpu.h| 5 -
linux-user/m68k-sim.c| 3 +--
linux-user/m68k/cpu_loop.c | 2 +-
target/m68k/helper.c | 33 -
target/m68k/m68k-semi.c | 4 +
Signed-off-by: Richard Henderson
---
target/openrisc/cpu.h | 5 -
linux-user/openrisc/cpu_loop.c | 2 +-
target/openrisc/exception_helper.c | 5 ++---
target/openrisc/sys_helper.c | 8
4 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/target/openr
Signed-off-by: Richard Henderson
---
target/ppc/cpu.h| 7 +-
target/ppc/helper_regs.h| 4 +-
hw/ppc/ppc.c| 18 ++---
hw/ppc/ppc405_uc.c | 2 +-
hw/ppc/ppc_booke.c | 4 +-
linux-user/ppc/cpu_loop.c | 2 +-
targe
Signed-off-by: Richard Henderson
---
target/sparc/cpu.h | 5 -
bsd-user/main.c | 2 +-
hw/sparc/leon3.c| 4 ++--
hw/sparc/sun4m.c| 4 ++--
hw/sparc64/sparc64.c| 2 +-
linux-user/sparc/cpu_loop.c | 2 +-
target/sparc/fop_helper.c |
Now that we have both ArchCPU and CPUArchState, we can define
this generically instead of via macro in each target's cpu.h.
Acked-by: Alistair Francis
Signed-off-by: Richard Henderson
---
accel/tcg/atomic_template.h | 8 +--
accel/tcg/softmmu_template.h | 20
Signed-off-by: Richard Henderson
---
target/microblaze/cpu.h | 35 ++--
linux-user/microblaze/cpu_loop.c | 2 +-
target/microblaze/mmu.c | 5 ++---
target/microblaze/op_helper.c| 2 +-
target/microblaze/translate.c| 2 +-
5 files changed,
For all targets, into this new file move TARGET_LONG_BITS,
TARGET_PAGE_BITS, TARGET_PHYS_ADDR_SPACE_BITS,
TARGET_VIRT_ADDR_SPACE_BITS, and NB_MMU_MODES.
Include this new file from exec/cpu-defs.h.
This now removes the somewhat odd requirement that target/arch/cpu.h
defines TARGET_LONG_BITS before
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 5 -
hw/nios2/cpu_pic.c | 5 +
target/nios2/mmu.c | 10 +-
3 files changed, 6 insertions(+), 14 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index e0e12a910e..3fc27ead81 100644
--- a/target/nios2/cpu
Signed-off-by: Richard Henderson
---
target/xtensa/cpu.h | 17 ++---
hw/xtensa/pic_cpu.c | 2 +-
linux-user/xtensa/cpu_loop.c | 2 +-
target/xtensa/dbg_helper.c | 4 ++--
target/xtensa/exc_helper.c | 9 -
target/xtensa/helper.c | 2 +-
target/x
Signed-off-by: Richard Henderson
---
target/moxie/cpu.h | 5 -
target/moxie/helper.c| 6 +++---
target/moxie/translate.c | 2 +-
3 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h
index c050d6e15d..71e7cf0f08 100644
--- a/target/mo
Nothing in there so far, but all of the plumbing done
within the target ArchCPU state.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 25 +
include/exec/cpu-defs.h | 8
target/alpha/cpu.h | 1 +
target/arm/cpu.h| 1 +
target/cris/c
For all targets, do this just before including exec/cpu-all.h.
Acked-by: Alistair Francis
Signed-off-by: Richard Henderson
---
target/alpha/cpu.h | 4 ++--
target/arm/cpu.h| 4 ++--
target/cris/cpu.h | 4 ++--
target/hppa/cpu.h | 4 ++--
target/i386/cpu.h | 5 ++--
Signed-off-by: Richard Henderson
---
target/s390x/cpu.h | 5
linux-user/s390x/cpu_loop.c | 2 +-
target/s390x/cc_helper.c| 5 ++--
target/s390x/diag.c | 2 +-
target/s390x/excp_helper.c | 6 ++---
target/s390x/fpu_helper.c | 4 +--
target/s390x/helper.c |
Signed-off-by: Richard Henderson
---
target/tilegx/cpu.h | 5 -
linux-user/tilegx/cpu_loop.c | 2 +-
target/tilegx/helper.c | 2 +-
3 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h
index 135df63523..7f8fe7c513 100644
--- a
Signed-off-by: Richard Henderson
---
target/riscv/cpu.h | 5 -
linux-user/riscv/cpu_loop.c | 2 +-
target/riscv/cpu_helper.c | 4 ++--
target/riscv/csr.c | 12 ++--
target/riscv/op_helper.c| 8
5 files changed, 13 insertions(+), 18 deletions(-)
di
Now that we have ArchCPU, we can define this generically,
in the one place that needs it.
Signed-off-by: Richard Henderson
---
include/exec/gen-icount.h | 2 ++
target/alpha/cpu.h| 1 -
target/arm/cpu.h | 2 --
target/cris/cpu.h | 1 -
target/hppa/cpu.h | 1 -
ta
Signed-off-by: Richard Henderson
---
target/cris/cpu.h | 5 -
linux-user/cris/cpu_loop.c | 2 +-
target/cris/mmu.c | 3 +--
target/cris/op_helper.c| 10 +++---
target/cris/translate.c| 2 +-
5 files changed, 6 insertions(+), 16 deletions(-)
diff --git a/targ
Signed-off-by: Richard Henderson
---
target/tricore/cpu.h | 5 -
target/tricore/op_helper.c | 4 ++--
2 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index ed32622388..9ea5060a87 100644
--- a/target/tricore/cpu.h
+++ b/target/tr
Signed-off-by: Richard Henderson
---
target/sh4/cpu.h | 5 -
linux-user/sh4/cpu_loop.c | 2 +-
target/sh4/helper.c | 26 --
target/sh4/op_helper.c| 9 +++--
4 files changed, 16 insertions(+), 26 deletions(-)
diff --git a/target/sh4/cpu.h b/ta
This will foo_env_get_cpu with a generic definition.
No changes to the target specific code so far.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
inde
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index ac765137ae..979efbcfe4 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-t
Amusingly, we had already ignored the comment to keep this value at the
end of CPUState. This restores the minimum negative offset from TCG_AREG0
for code generation.
For the couple of uses within qom/cpu.c, add a pointer from the CPUState
object to the IcountDecr object within CPUNegativeOffsetS
We have for some time had code within the tcg backends to
handle large positive offsets from env. This move makes
sure that need not happen. Indeed, we are able to assert
at build time that simple offsets suffice for all hosts.
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h
Signed-off-by: Richard Henderson
---
target/unicore32/cpu.h | 5 -
hw/unicore32/puv3.c | 2 +-
target/unicore32/helper.c | 8 ++--
target/unicore32/op_helper.c| 2 +-
target/unicore32/softmmu.c | 11 ---
target/unicore32/translate.c| 26
Combined uses of CPU(hppa_env_get_cpu()) were failures to use
the more proper, ENV_GET_CPU macro, now replaced by env_cpu.
Signed-off-by: Richard Henderson
---
target/hppa/cpu.h | 5 -
linux-user/hppa/cpu_loop.c | 2 +-
target/hppa/helper.c | 3 +--
target/hppa/int_helper.c
This macro is now always empty, so remove it. This leaves the
entire contents of CPUArchState under the control of the guest
architecture.
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 2 --
target/alpha/cpu.h | 3 ---
target/arm/cpu.h| 4 +---
target/cris/cpu.h
Consolidate some boilerplate from foo_cpu_initfn.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 12 +++-
target/alpha/cpu.c | 3 +--
target/arm/cpu.c| 3 +--
target/cris/cpu.c | 3 +--
target/hppa/cpu.c
With exactly one exception, most uses of alpha_env_get_cpu
were failures to use the more proper, ENV_GET_CPU macro,
now replaced by env_cpu.
Signed-off-by: Richard Henderson
---
target/alpha/cpu.h | 5 -
linux-user/alpha/cpu_loop.c | 2 +-
target/alpha/helper.c | 8 +++-
t
On [2019 Mar 28] Thu 15:26:35, Peter Maydell wrote:
> In the stripe8() function we use a variable length array; however
> we know that the maximum length required is MAX_NUM_BUSSES. Use
> a fixed-length array and an assert instead.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Francisco Iglesias
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 109 +++
1 file changed, 52 insertions(+), 57 deletions(-)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index 4a8c12e9a4..7601eff16e 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b
Le lun. 18 mars 2019 14:04, Markus Armbruster a écrit :
> Daniel P. Berrangé writes:
>
> > On Mon, Mar 18, 2019 at 11:59:43AM +, Peter Maydell wrote:
> >> On Mon, 18 Mar 2019 at 11:54, Daniel P. Berrangé
> wrote:
> >> > > TYPE_ACPI_DEVICE_IF
> >> > > TYPE_ARM_LINUX_BOOT_IF
> >> > >
On 3/28/19 7:30 AM, Eric Blake wrote:
> On 3/28/19 5:59 AM, Richard W.M. Jones wrote:
>> This error message is confusing and looks wrong to me:
>
> Confusing, but intentional design decision at the time (that said, I
> would also welcome an improvement).
>
>>
>> $ ./nbdkit -U - data data="1" size
On 03/28/2019 12:29 PM, Peter Maydell wrote:
The Raspberry Pi boards have a physical memory map which does
not allow for more than 1GB of RAM. Currently if the user tries
to ask for more then we fail in a confusing way:
$ qemu-system-aarch64 --machine raspi3 -m 8G
Unexpected error in visit_typ
On Thu, 28 Mar 2019 16:56:48 +0100
Michal Suchánek wrote:
> Hello,
>
> I tried to update my machine definitions to work with current qemu.
>
> Unfortunately, while qemu 2.11 supports disk sharing with raw images
> qemu 3.1 does not. That looks bogus to me. What is not supported about
> writing
On 3/25/19 10:23 AM, Paolo Bonzini wrote:
> I think you should, because moving it to obj-y would be a major headache
> if we ever were to resurrect the multiarch patches by Peter C.
>
> That said, does cpu_neg really need env_neg and thus ArchCPU? Perhaps
> you could:
>
> 1) define CPUTLB in ter
On 3/28/19 8:29 AM, Peter Maydell wrote:
> The Raspberry Pi boards have a physical memory map which does
> not allow for more than 1GB of RAM. Currently if the user tries
> to ask for more then we fail in a confusing way:
>
> $ qemu-system-aarch64 --machine raspi3 -m 8G
> Unexpected error in visit
On 3/28/19 3:06 PM, Eric Blake wrote:
> On 3/28/19 2:32 PM, Markus Armbruster wrote:
>
Adding Markus to CC so we can figure out how to wire up the
introspection for such command line options.
>>>
>
> Alternative 6:
>
> Don't worry about patching q-c-l-o, but instead patch query-qemu-f
On 3/28/19 2:32 PM, Markus Armbruster wrote:
>>> Adding Markus to CC so we can figure out how to wire up the
>>> introspection for such command line options.
>>
>> query-command-line-options has always been woefully incomplete. Sadly,
>> my replacement is still not ready.
>>
>> A reliable "witnes
Markus Armbruster writes:
> Pavel Hrdina writes:
>
>> On Tue, Mar 12, 2019 at 08:12:40AM +0100, Gerd Hoffmann wrote:
>>> From: Kővágó, Zoltán
>>>
>>> Audio drivers now get an Audiodev * as config paramters, instead of the
>>> global audio_option structs. There is some code in audio/audio_lega
On 3/28/19 7:30 AM, Peter Maydell wrote:
> -void *hostaddr[maxidx];
> +void *hostaddr[DIV_ROUND_UP(2 * KiB, 1 << TARGET_PAGE_BITS_MIN)];
A very fancy way of writing "2".
> int try, i;
> unsigned mmu_idx = cpu_mmu_index(env, false);
> TCGMemOpIdx oi = mak
Le jeu. 28 mars 2019 14:36, Peter Maydell a
écrit :
> In usb_mask_to_str() we convert a mask of USB speeds into
> a human-readable string (like "full+high") for use in
> tracing and error messages. However the conversion code
> doesn't do anything to the string buffer if the passed in
> speedmask
Le jeu. 28 mars 2019 15:30, Peter Maydell a
écrit :
> Currently the dc_zva helper function uses a variable length
> array. In fact we know (as the comment above remarks) that
> the length of this array is bounded because the architecture
> limits the block size and QEMU limits the target page siz
Le jeu. 28 mars 2019 16:29, Peter Maydell a
écrit :
> The Raspberry Pi boards have a physical memory map which does
> not allow for more than 1GB of RAM. Currently if the user tries
> to ask for more then we fail in a confusing way:
>
> $ qemu-system-aarch64 --machine raspi3 -m 8G
> Unexpected er
On 3/28/19 1:28 PM, Kevin Wolf wrote:
> auto-read-only=on changed its behaviour in file-posix for the 4.0
> release. This change cannot be detected through the usual mechanisms
> like schema introspection. Add a new feature to query-qemu-features to
> allow libvirt to detect the presence of the new
Le jeu. 28 mars 2019 16:41, Edgar E. Iglesias a
écrit :
> + Francisco
>
> On Thu, 28 Mar. 2019, 16:26 Peter Maydell,
> wrote:
>
>> In the stripe8() function we use a variable length array; however
>> we know that the maximum length required is MAX_NUM_BUSSES. Use
>> a fixed-length array and an a
On 3/28/19 1:28 PM, Kevin Wolf wrote:
> From: Stefan Hajnoczi
>
> QMP clients can usually detect the presence of features via schema
> introspection. There are rare features that do not involve schema
> changes and are therefore impossible to detect with schema
> introspection.
>
> This patch a
Am 28.03.2019 um 08:21 hat Vladimir Sementsov-Ogievskiy geschrieben:
> bdrv_replace_child() calls bdrv_check_perm() with error_abort on
> loosening permissions. However file-locking operations may fail even
> in this case, for example on NFS. And this leads to Qemu crash.
>
> Let's ignore such err
Hi,
On Thu, Mar 28, 2019 at 02:21:51PM +0100, Greg Kurz wrote:
> On Wed, 27 Mar 2019 17:41:00 -0300
> "Maxiwell S. Garcia" wrote:
>
> > Here are two patches to add a handler for ibm,get-vpd RTAS calls.
> > This RTAS exposes host information in case of set QEMU options
> > 'host-serial' and 'host
auto-read-only=on changed its behaviour in file-posix for the 4.0
release. This change cannot be detected through the usual mechanisms
like schema introspection. Add a new feature to query-qemu-features to
allow libvirt to detect the presence of the new behaviour.
Signed-off-by: Kevin Wolf
---
q
auto-read-only=on changed its behaviour in file-posix for the 4.0
release. This change cannot be detected through the usual mechanisms
like schema introspection.
I took Stefan's patch 'qmp: add query-qemu-capabilities', removed the
feature that he originally wanted this for and addressed the revie
On 3/28/19 3:46 AM, Vladimir Sementsov-Ogievskiy wrote:
> 28.03.2019 1:39, Eric Blake wrote:
>> Both NBD_CMD_BLOCK_STATUS and structured NBD_CMD_READ will split their
>> reply according to bdrv_block_status() boundaries. If the block device
>> has a request_alignment smaller than 512, but we advert
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