From: Jagannathan Raman
Add rdrive_del HMP command to hot-unplug drive from remote device.
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
---
hmp-commands.hx | 14 ++
hw/proxy/monitor.c| 37 +
From: Elena Ufimtseva
Do not allow BAR,MMIO handlers and irq setup to run before
the configuration of the devices completes.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
---
remote/remote-main.c | 29 -
1 file chang
From: Elena Ufimtseva
Add processing of command line options rdrive and rdevice.
After remote devices are created along with their proxies,
signal the proxies to finish the configuration steps.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Ple
On 3/7/19 5:27 AM, David Gibson wrote:
> On Wed, Mar 06, 2019 at 09:50:26AM +0100, Cédric Le Goater wrote:
>> The OCC on POWER9 is very similar to the one found on POWER8. Provide
>> the same routines with P9 values for the registers and IRQ number.
>>
>> Signed-off-by: Cédric Le Goater
>> ---
>>
From: Elena Ufimtseva
These command option have the same notion as the drive and device,
except these will be emulated in remote process.
Added parameter rid identified the remote process group.
As an example, this will create the device emulated by the remote
process:
/usr/local/bin/qemu-syste
From: Elena Ufimtseva
TODO: Make relevant changes to the doc.
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
---
docs/devel/qemu-multiprocess.txt | 1109 ++
1 file changed, 1109 insertions(+)
create mode 1006
From: Jagannathan Raman
Adds rblock_resize QMP/HMP commands to resize block devices on the remote
process.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
---
hmp-commands.hx | 14 +
hmp.h | 1 +
hw/proxy/mo
From: Elena Ufimtseva
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
---
docs/qemu-multiprocess.txt | 104 +
1 file changed, 104 insertions(+)
create mode 100644 docs/qemu-multiprocess.txt
diff --git
From: Jagannathan Raman
Add rdrive_add HMP command to hot-plug drive to the remote device.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
---
hmp-commands.hx | 16
hw/proxy/monitor.c | 45 +++
From: Jagannathan Raman
Add query-remote QMP command and remote-proc-list HMP command, to list
the remote processes spawned by QEMU.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
---
hmp-commands.hx| 16 +
hmp.h
From: Elena Ufimtseva
Receive by remote side the configuration messages and build the device
object from JSON device descriptions.
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
---
remote/remote-main.c | 126
From: Elena Ufimtseva
This is handled while parsing the command line options.
The parsed options are being sent to remote process
as the messgaes containing JSON strings.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
---
include/hw/proxy/qemu-p
From: Jagannathan Raman
Adds proxy-lsi53c895a object, as a derivative of the pci-proxy-dev
object. This object is the proxy for the lsi53c895a object
instantiated by the remote process.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
---
hw/proxy
From: Elena Ufimtseva
and reply back to proxy object.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
---
remote/remote-main.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/remote/remote-main.c b/remote/remote-main.c
index 3fa6cbd..1e
From: Elena Ufimtseva
Add functions to configure remote devices.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
---
hw/proxy/qemu-proxy.c | 41 +++--
include/hw/proxy/qemu-proxy.h | 2 ++
include/io/p
From: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
---
remote/remote-main.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/remote/remote-main.c b/remote/remote-main.c
index 52da3c8..fa32f2a 100644
From: Elena Ufimtseva
Store info about the remote process in a hash table, so that
it could be used later for QMP/HMP commands.
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
---
hw/i386/pc.c | 1 +
hw/proxy/qemu-proxy.c | 7 +++
in
From: Elena Ufimtseva
Defines a PCI Device proxy object as a parent of TYPE_PCI_DEVICE.
PCI Proxy Object is responsible for registering PCI BARs,i
MemoryRegionOps to handle access to the BARs and forwarding those
to the remote device.
PCI Proxy object intercepts config space reads and writes. In
From: Jagannathan Raman
Add rdevice_del QMP & HMP commands to hot-unplug device from remote
device.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
---
hmp-commands.hx | 14 ++
hmp.h | 1 +
hw/proxy/monitor.
From: Jagannathan Raman
IOHUB object is added to manage PCI IRQs. It uses KVM_IRQFD
ioctl to create irqfd to injecting PCI interrupts to the guest.
IOHUB object forwards the irqfd to the remote process. Remote process
uses this fd to directly send interrupts to the guest, bypassing QEMU.
Signed-
From: Elena Ufimtseva
Add isignal handler for launched remote processes and set up
the heartbit timer for remote processes.
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
---
hw/proxy/qemu-proxy.c | 101
From: Jagannathan Raman
PCI host bridge is setup for the remote device process. It is
implemented using remote-pcihost object. It is an extension of the PCI
host bridge setup by QEMU.
Remote-pcihost configures a PCI bus which could be used by the remote
PCI device to latch on to.
Signed-off-by:
From: Jagannathan Raman
Add memory-listener object which is used to keep the view of the RAM
in sync between QEMU and remote process.
A MemoryListener is registered for system-memory AddressSpace. The
listener sends SYNC_SYSMEM message to the remote process when memory
listener commits the change
From: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
---
hw/proxy/qemu-proxy.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/proxy/qemu-proxy.c b/hw/proxy/qemu-proxy.c
index d1560d9..f519beb 1
From: Jagannathan Raman
In some cases, for example MMIO read, QEMU has to wait for the remote to
complete a command before proceeding. An eventfd based mechanism is
added to synchronize QEMU & remote process.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena U
From: Jagannathan Raman
Proxy device object implements handler for PCI BAR writes. The handler
sends BAR_WRITE message to the remote process with the BAR address and
value to be written
The remote process implements handler for BAR_WRITE message.
Signed-off-by: Jagannathan Raman
Signed-off-by:
From: Jagannathan Raman
sync_sysmem_msg_t message format is defined. It is used to send
file descriptors of the RAM regions to remote device.
RAM on the remote device is configured with a set of file descriptors.
Old RAM regions are deleted and new regions, each with an fd, is
added to the RAM.
From: Jagannathan Raman
Adds rdevice_add QMP & HMP commands to hotplug device to a remote device.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
---
hmp-commands.hx | 14
hmp.h | 1 +
hw/proxy/monitor.c |
From: Jagannathan Raman
Allow RAM MemoryRegion to be created from an offset in a file, instead
of allocating at offset of 0 by default. This is needed to synchronize
RAM between QEMU & remote process.
This will be needed for the following patches.
Signed-off-by: Jagannathan Raman
Signed-off-by:
From: Jagannathan Raman
Adds the handler to process message from QEMU,
Initialize remote process main loop, handles SYNC_SYSMEM
message by updating its "system_memory" container using
shared file descriptors received from QEMU.
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
Signe
From: Jagannathan Raman
Defines proxy-link object which forms the communication link between
QEMU & emulation program.
Adds functions to configure members of proxy-link object instance.
Adds functions to send and receive messages over the communication
channel.
Adds GMainLoop to handle events rec
From: Jagannathan Raman
Proxy device object implements the read handler for PCI BAR accesses.
The handler sends BAR_READ message to the remote process.
The remote process implements handler for BAR_READ message.
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Signed-off-by: Joh
From: Jagannathan Raman
Modify Makefile to support the building of the remote
device process. Implements main() function of remote
device process.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
---
Makefile| 5 -
Makefile.ob
From: Jagannathan Raman
Add a configuration option to separate multi-process code
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
---
configure | 11 +++
1 file changed, 11 insertions(+)
diff --git a/configure b/configure
index cefeb8f..
From: Jagannathan Raman
Add stub functions that are needed during compile time but not in
runtime.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
---
accel/stubs/kvm-stub.c| 5 +++
accel/stubs/tcg-stub.c| 85
From: Jagannathan Raman
remote-machine object sets up various subsystems of the remote device
process. Instantiate PCI host bridge object and initialize RAM, IO &
PCI memory regions.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
---
exec.c
From: Jagannathan Raman
qemu_thread_cancel() added to destroy a given running thread.
This will be needed in the following patches.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
---
include/qemu/thread.h| 1 +
util/qemu-thread-posix.c | 10
From: Elena Ufimtseva
Can be used with -d rdebug command options when starting qemu.
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
---
include/qemu/log.h | 1 +
util/log.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/include/q
From: Elena Ufimtseva
Initial support of multi-process qemu
CCing people who were discussing this functionality with Jag
during KVM forum last (2018) year to continue the conversation.
Started with the presentation in October 2017 made by
Marc-Andre (Red Hat) and Konrad Wilk (Oracle)
(http://ev
After two weeks of running the new QEMU package everything is fine.
Moreover I migrated the rest of the guests (both Windows and Linux) to
virtio-scsi and no issues so far.
I will monitor for another week but this issue seems pretty much fixed!
Kudos to each and everyone of you that helped findin
On 3/7/19 5:18 AM, David Gibson wrote:
> On Wed, Mar 06, 2019 at 09:50:23AM +0100, Cédric Le Goater wrote:
>> The LPC Controller on POWER9 is very similar to the one found on
>> POWER8 but accesses are now done via on MMIOs, without the XSCOM and
>> ECCB logic. The device tree is populated differen
Philippe Mathieu-Daudé writes:
> Commit fa1d36df746 missed to convert this ifdef'ed out code.
> Introduce the pflash_blk variable.
>
> This fixes:
>
> hw/mips/mips_malta.c:1273:16: error: implicit declaration of function
> ‘blk_name’; did you mean ‘basename’? [-Werror=implicit-function-declara
Alex Bennée writes:
> Markus Armbruster writes:
>
>> Machine "ref405ep" maps its flash memory at address 2^32 - image size.
>> Image size is rounded up to the next multiple of 64KiB. Useless,
>> because pflash_cfi02_realize() fails with "failed to read the initial
>> flash content" unless the r
On Wed, Mar 06, 2019 at 02:50:36PM +0100, BALATON Zoltan wrote:
> On Wed, 6 Mar 2019, Gerd Hoffmann wrote:
> > On Wed, Mar 06, 2019 at 12:48:59AM +0100, BALATON Zoltan wrote:
> > > On Tue, 5 Mar 2019, Gerd Hoffmann wrote:
> > > > Use dpy_cursor_define().
> > >
> > > I've done that but it's not wor
On 06/03/2019 19.12, Paolo Bonzini wrote:
> Hi all,
>
> lately I have been thinking of converting the QEMU build system to
> Meson. Meson is a relatively new build system that can replace
> Autotools or hand-written Makefiles such as QEMU; as a die-hard
> Autotools fan, I must say that Meson is b
On 3/7/19 5:10 AM, David Gibson wrote:
> On Wed, Mar 06, 2019 at 09:50:20AM +0100, Cédric Le Goater wrote:
>> The PSI bridge on POWER9 is very similar to POWER8. The BAR is still
>> set through XSCOM but the controls are now entirely done with MMIOs.
>> More interrupts are defined and the interrupt
On 3/7/19 6:21 AM, David Gibson wrote:
> On Wed, Mar 06, 2019 at 08:22:51AM +0100, Cédric Le Goater wrote:
>> Hello,
>>
>> On 3/6/19 5:38 AM, David Gibson wrote:
>>> The qemu coding standard is to use CamelCase for type and structure names,
>>> and the pseries code follows that... sort of. There a
hi Peter:
Thanks for your suggestion.
but anyway we have to modify qemu code when binfmt_misc passes argv[0] in,
right?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1818483
Title:
qemu user mode
On 07/03/2019 16:21, David Gibson wrote:
> The qemu coding standard is to use CamelCase for type and structure names,
> and the pseries code follows that... sort of. There are quite a lot of
> places where we bend the rules in order to preserve the capitalization of
> internal acronyms like "PH
On Wed, Mar 06, 2019 at 08:22:51AM +0100, Cédric Le Goater wrote:
> Hello,
>
> On 3/6/19 5:38 AM, David Gibson wrote:
> > The qemu coding standard is to use CamelCase for type and structure names,
> > and the pseries code follows that... sort of. There are quite a lot of
> > places where we bend
This is for passing through NVIDIA V100 GPUs on POWER9 systems.
This implements a subdriver for NVIDIA V100 GPU with coherent memory and
NPU/ATS support available in the POWER9 CPU.
Here is the kernel driver:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/vfio/p
This makes vfio_get_region_info_cap() to be used in quirks.
Signed-off-by: Alexey Kardashevskiy
---
include/hw/vfio/vfio-common.h | 2 ++
hw/vfio/common.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/hw/vfio/vfio-common.h b/include/hw/vfio/vfio-commo
On sPAPR vfio_listener_region_add() is called in 2 situations:
1. a new listener is registered from vfio_connect_container();
2. a new IOMMU Memory Region is added from rtas_ibm_create_pe_dma_window().
In both cases vfio_listener_region_add() calls
memory_region_iommu_replay() to notify newly regi
NVIDIA V100 GPUs have on-board RAM which is mapped into the host memory
space and accessible as normal RAM via an NVLink bus. The VFIO-PCI driver
implements special regions for such GPUs and emulates an NVLink bridge.
NVLink2-enabled POWER9 CPUs also provide address translation services
which inclu
On 07/03/2019 14:57, David Gibson wrote:
> On Thu, Mar 07, 2019 at 01:40:33PM +1100, Alexey Kardashevskiy wrote:
>>
>>
>> On 05/03/2019 12:47, David Gibson wrote:
>>> On Thu, Feb 28, 2019 at 05:11:32PM +1100, Alexey Kardashevskiy wrote:
On 28/02/2019 14:31, David Gibson wrote:
> On Wed,
On Wed, Mar 06, 2019 at 09:50:27AM +0100, Cédric Le Goater wrote:
> Add a couple of XSCOM addresses controlling the power management
> states of the core.
>
> Signed-off-by: Cédric Le Goater
> ---
> hw/ppc/pnv_core.c | 22 --
> 1 file changed, 20 insertions(+), 2 deletions(-)
On Wed, Mar 06, 2019 at 09:50:26AM +0100, Cédric Le Goater wrote:
> The OCC on POWER9 is very similar to the one found on POWER8. Provide
> the same routines with P9 values for the registers and IRQ number.
>
> Signed-off-by: Cédric Le Goater
> ---
> include/hw/ppc/pnv.h | 1 +
> include/
On Wed, Mar 06, 2019 at 09:50:25AM +0100, Cédric Le Goater wrote:
> It will ease the introduction of the OCC model for POWER9.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
> ---
> include/hw/ppc/pnv_occ.h | 14 ++
> hw/ppc/pnv.c | 2 +-
> hw/ppc/pnv_o
On Wed, Mar 06, 2019 at 09:50:20AM +0100, Cédric Le Goater wrote:
> The PSI bridge on POWER9 is very similar to POWER8. The BAR is still
> set through XSCOM but the controls are now entirely done with MMIOs.
> More interrupts are defined and the interrupt controller interface has
> changed to XIVE.
On Wed, Mar 06, 2019 at 09:50:21AM +0100, Cédric Le Goater wrote:
This absolutely needs a commit message explaining why/how they were
wrong in the first place.
> Signed-off-by: Cédric Le Goater
> ---
> hw/ppc/pnv_lpc.c | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --g
On Wed, Mar 06, 2019 at 09:50:19AM +0100, Cédric Le Goater wrote:
> It will ease the introduction of the PSI bridge model for POWER9.
>
> Signed-off-by: Cédric Le Goater
Applied, thanks.
> ---
> include/hw/ppc/pnv_psi.h | 21 +++-
> hw/ppc/pnv.c | 2 +-
> hw/ppc/pnv_psi.c
On Wed, Mar 06, 2019 at 09:50:22AM +0100, Cédric Le Goater wrote:
> It will ease the introduction of the LPC Controller model for POWER9.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
> ---
> include/hw/ppc/pnv_lpc.h | 16
> hw/ppc/pnv.c | 2 +-
> hw/ppc/
On Wed, Mar 06, 2019 at 09:50:23AM +0100, Cédric Le Goater wrote:
> The LPC Controller on POWER9 is very similar to the one found on
> POWER8 but accesses are now done via on MMIOs, without the XSCOM and
> ECCB logic. The device tree is populated differently so we add a
> specific POWER9 routine fo
On Thu, Mar 07, 2019 at 03:05:19PM +1100, David Gibson wrote:
> On Wed, Mar 06, 2019 at 09:50:19AM +0100, Cédric Le Goater wrote:
> > It will ease the introduction of the PSI bridge model for POWER9.
> >
> > Signed-off-by: Cédric Le Goater
>
> Applied, thanks.
And now unapplied, due to issues r
> Checked off-list, just for the record: looks like your compiled binary tries
> to set up a flat-panel display besides the CRT but flat-panel part of GPU is
> not modelled and with both screens pmon tries to put CRT screen at an 80MB
> offset which can't work as chip has only 16MB VRAM. This re
On Thu, Mar 07, 2019 at 01:40:33PM +1100, Alexey Kardashevskiy wrote:
>
>
> On 05/03/2019 12:47, David Gibson wrote:
> > On Thu, Feb 28, 2019 at 05:11:32PM +1100, Alexey Kardashevskiy wrote:
> >> On 28/02/2019 14:31, David Gibson wrote:
> >>> On Wed, Feb 27, 2019 at 07:51:49PM +1100, Alexey Karda
Tried this with mac99 machine and lubuntu 16.04 ppc.
After upgrading r128 driver to -hwe part to get past this bug
https://bugs.freedesktop.org/show_bug.cgi?id=91622
and disabling accel I can see some image and cursor!
qemu command:
ppc64-softmmu/qemu-system-ppc64 -M mac99 -device ati-vga \
-cd
On Wed, Mar 06, 2019 at 09:50:18AM +0100, Cédric Le Goater wrote:
> Reset all regs but keep the MMIO BAR enabled as it is at realize time.
>
> Signed-off-by: Cédric Le Goater
Again, I don't like the duplication of information between psi->reg
and psi->bar. But that's out of scope for this patch
On Wed, Mar 06, 2019 at 05:14:06PM +0100, Igor Mammedov wrote:
>On Wed, 27 Feb 2019 15:51:01 +0800
>Wei Yang wrote:
>
>> Currently we initialize nvdimm device like below:
>>
>> device_set_realized
>> dc->realize
>> nvdimm_plug
>> nvdimm_build_fit_buffer
>> acpi_build
On Wed, Mar 06, 2019 at 09:50:16AM +0100, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater
Wow, that's a deeply weird starting point. Applied.
> ---
> hw/ppc/pnv_lpc.c | 10 +-
> hw/ppc/pnv_psi.c | 4 ++--
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/h
On Wed, Mar 06, 2019 at 09:50:15AM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> It should be generic Hypervisor Virtualization interrupts for HV
> directed rings and traditional External Interrupts for the OS directed
> ring.
>
> Don't generate anything for the user ring as
On Wed, Mar 06, 2019 at 09:50:17AM +0100, Cédric Le Goater wrote:
> This is a simple helper to translate XSCOM addresses to MMIO addresses
>
> Signed-off-by: Cédric Le Goater
A worthy cleanup, regardless of anything else. Applied.
> ---
> hw/ppc/pnv_psi.c | 6 --
> 1 file changed, 4 inser
On Wed, Mar 06, 2019 at 09:50:11AM +0100, Cédric Le Goater wrote:
> This is a simple model of the POWER9 XIVE interrupt controller for the
> PowerNV machine which only addresses the needs of the skiboot
> firmware. The PowerNV model reuses the common XIVE framework developed
> for sPAPR as the fund
On Wed, Mar 06, 2019 at 09:50:13AM +0100, Cédric Le Goater wrote:
> The POWER9 and POWER8 processors have different interrupt controllers,
> and reporting their state requires calling different helper routines.
>
> However, the interrupt presenters are still handled in the higher
> level pic_print
On Wed, Mar 06, 2019 at 09:50:06AM +0100, Cédric Le Goater wrote:
> By default on P9, the HW CAM line (23bits) is hardwired to :
>
> 0x000||0b1||4Bit chip number||7Bit Thread number.
>
> When the block group mode is enabled at the controller level (PowerNV),
> the CAM line is changed for CA
On Wed, Mar 06, 2019 at 09:50:14AM +0100, Cédric Le Goater wrote:
> The NSR register of the HV ring has a different, although similar, bit
> layout. TM_QW3_NSR_HE_PHYS bit should now be raised when the
> Hypervisor interrupt line is signaled. Other bits TM_QW3_NSR_HE_POOL
> and TM_QW3_NSR_HE_LSI ar
On Wed, Mar 06, 2019 at 09:50:12AM +0100, Cédric Le Goater wrote:
> The POWER9 and POWER8 processors have a different set of devices and a
> different device tree layout.
>
> Signed-off-by: Cédric Le Goater
Applied, thanks.
> ---
> include/hw/ppc/pnv.h | 1 +
> hw/ppc/pnv.c | 27 +
On Wed, Mar 06, 2019 at 09:50:10AM +0100, Cédric Le Goater wrote:
> The POWER9 PowerNV machine will use a XIVE interrupt presenter type.
>
> Signed-off-by: Cédric Le Goater
Applied patches 2..5.
> ---
> include/hw/ppc/pnv_core.h | 2 +-
> hw/ppc/pnv.c | 6 +++---
> hw/ppc/pnv_core
On Wed, Mar 06, 2019 at 07:55:28PM +0800, Peter Xu wrote:
> Only sending an init-done message using lock+cond seems an overkill to
> me. Replacing it with a simpler semaphore.
>
> Meanwhile, init the semaphore unconditionally, then we can destroy it
> unconditionally too in finalize which seems c
On 05/03/2019 12:47, David Gibson wrote:
> On Thu, Feb 28, 2019 at 05:11:32PM +1100, Alexey Kardashevskiy wrote:
>> On 28/02/2019 14:31, David Gibson wrote:
>>> On Wed, Feb 27, 2019 at 07:51:49PM +1100, Alexey Kardashevskiy wrote:
NVIDIA V100 GPUs have on-board RAM which is mapped into the
Public bug reported:
On macOS host running Windows 10 guest, qemu crashed with error message:
Error: HV_ERROR.
Host: macOS Mojave 10.14.3 (18D109) Late 2014 Mac mini presumably Core i5 4278U.
QEMU: git commit a3e3b0a7bd5de211a62cdf2d6c12b96d3c403560
QEMU parameter: qemu-system-x86_64 -m 3000 -dri
On Thu, Feb 28, 2019 at 10:05:02 -0800, Richard Henderson wrote:
> On 2/28/19 9:18 AM, Stephen Checkoway wrote:
> > I wonder if it would make sense to maintain a small cache of TLBs. The
> > majority of cases are likely to involving setting segment registers to one
> > of a handful of segments (e.g
On Tue, Mar 05, 2019 at 05:21:35PM +, Peter Maydell wrote:
> By default Sphinx wants to build a single manual at once.
> For QEMU, this doesn't suit us, because we want to have
> separate manuals for "Developer's Guide", "User Manual",
> and so on, and we don't want to ship the Developer's Guid
On 3/6/19 9:09 PM, Laurent Vivier wrote:
> Add QEMU_IFLA_BR_VLAN_STATS_PER_PORT (from linux v4.20),
> QEMU_IFLA_BR_MULTI_BOOLOPT (from linux v5.0).
>
> The first new entry fixes the following error:
>
> Unknown QEMU_IFLA_BR type 45
>
> Signed-off-by: Laurent Vivier
Reviewed-by: Philippe
Got it; thanks.
Heyi
On 2019/3/7 0:20, Igor Mammedov wrote:
On Wed, 6 Mar 2019 21:09:11 +0800
Heyi Guo wrote:
Sorry, I didn't know the indention policy of qemu code. So we need to indent
the 2nd line just after the parentheses it belongs to?
See "[PATCH v6 0/2] CODING_STYLE: trivial update
On Thu, 7 Mar 2019, Andrew Randrianasulu wrote:
To find out if the compiled firmware does something different with the
GPU chip you can enable ati-vga traces with -trace enable="ati*" that
should print register accesses (there's also a define for even more
debug messages in ati_int.h). You coul
On Wed, Mar 06, 2019 at 01:28:12PM +0300, Andrew Randrianasulu wrote:
> Original commit message:
> This patch adds an emulation model for i2c controller found on most of the
> FSL SoCs.
> It also integrates the RTC (ds1338) that sits on the i2c Bus with e500
> machine model.
>
> Patch was origin
On Wed, Mar 06, 2019 at 05:06:08PM +1100, Suraj Jitindar Singh wrote:
> The H_CALL H_PAGE_INIT can be used to zero or copy a page of guest
> memory. Enable the in-kernel H_PAGE_INIT handler.
>
> The in-kernel handler takes half the time to complete compared to
> handling the H_CALL in userspace.
>
On Thu, 7 Mar 2019, Philippe Mathieu-Daudé wrote:
On 3/6/19 9:05 PM, BALATON Zoltan wrote:
Add (partial) emulation of the on-board GPU of the machine. This
allows the PMON2000 firmware to run and should also work with Linux
console but probably not with X yet.
Signed-off-by: BALATON Zoltan
Rev
On 3/6/19 9:05 PM, BALATON Zoltan wrote:
> Add (partial) emulation of the on-board GPU of the machine. This
> allows the PMON2000 firmware to run and should also work with Linux
> console but probably not with X yet.
>
> Signed-off-by: BALATON Zoltan
> Reviewed-by: Philippe Mathieu-Daudé
> Test
Patchew URL:
https://patchew.org/QEMU/20190305172139.32662-1-peter.mayd...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190305172139.32662-1-peter.mayd...@linaro.org
Subject: [Qemu-devel] [PATCH v3 00/1
Patchew URL:
https://patchew.org/QEMU/20190306235850.30110-1-samuel.thiba...@ens-lyon.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190306235850.30110-1-samuel.thiba...@ens-lyon.org
Subject: [Qemu-devel] [PULL
On Tue, Mar 05, 2019 at 05:21:29PM +, Peter Maydell wrote:
> Convert the memory API documentation from plain text
> to restructured text format.
>
> This is a very minimal conversion: all I had to change
> was to mark up the ASCII art parts as Sphinx expects
> for 'literal blocks', and fix up
Patchew URL:
https://patchew.org/QEMU/20190305172139.32662-1-peter.mayd...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190305172139.32662-1-peter.mayd...@linaro.org
Subject: [Qemu-devel] [PATCH v3 00/1
From: Marc-André Lureau
slirp migration code uses QEMU vmstate so far, when building WITH_QEMU.
Introduce slirp_state_{load,save,version}() functions to move the
state saving handling to libslirp side.
So far, the bitstream compatibility should remain equal with current
QEMU, as this is effecti
From: Marc-André Lureau
Prepare for making slirp/ a standalone project.
Remove some useless includes while at it.
Signed-off-by: Marc-André Lureau
Message-Id: <20190212162524.31504-5-marcandre.lur...@redhat.com>
Signed-off-by: Samuel Thibault
---
net/slirp.c | 2 +-
slirp/M
From: Marc-André Lureau
Use the "system" libslirp if its present or requested.
Else build with a static libslirp.a if slirp/ is checked
out ("internal") or a submodule ("git").
Signed-off-by: Marc-André Lureau
Message-Id: <20190212162524.31504-7-marcandre.lur...@redhat.com>
Signed-off-by: Samu
On Tue, Mar 05, 2019 at 05:21:28PM +, Peter Maydell wrote:
> sphinx-build complains:
>
> docs/cpu-hotplug.rst:67: ERROR: Unexpected indentation.
> docs/cpu-hotplug.rst:69: ERROR: Unexpected indentation.
> docs/cpu-hotplug.rst:74: WARNING: Block quote ends without a blank line;
> unexpected un
From: Marc-André Lureau
QEMU no longer includes it, and treats slirp/ as a separate project.
Signed-off-by: Marc-André Lureau
Message-Id: <20190212162524.31504-8-marcandre.lur...@redhat.com>
Signed-off-by: Samuel Thibault
---
slirp/Makefile.objs | 36
1 fi
From: Marc-André Lureau
Add a simple Makefile to build libslirp.a, a static library version of
libslirp, to be used by QEMU during a transition period, until a
shared library is available.
Signed-off-by: Marc-André Lureau
Message-Id: <20190212162524.31504-6-marcandre.lur...@redhat.com>
Signed-o
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