On 2019-02-09 07:31, Richard Henderson wrote:
Patch description somehow moved into the subject?
Apart from that, the patch looks fine to me, so with a proper subject
and the description moved into the right location:
Reviewed-by: Thomas Huth
> Signed-off-by: Richard Henderson
> ---
> target
IMX25, IMX7 and IMX6UL were still missing the Kconfig dependencies.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 2 --
hw/arm/Kconfig | 20
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/default-configs/arm-softmmu.mak b
Add Kconfig dependencies for the Sabrelite / iMX6 machine.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 4 +---
hw/arm/Kconfig | 7 +++
hw/arm/Makefile.objs| 3 ++-
3 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/default-config
Add Kconfig dependencies for the DIGIC / canon-a1100 machine.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 2 +-
hw/arm/Kconfig | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.
On 2019-02-09 07:31, Richard Henderson wrote:
> We will need these from CONFIG_USER_ONLY as well,
> which cannot access include/hw/.
>
> Signed-off-by: Richard Henderson
> ---
> include/hw/s390x/tod.h | 16 +---
> target/s390x/s390-tod.h | 29 +
> 2 files
The PCI devices should be pulled in by default if PCI_DEVICES
is set, so there is no need anymore to enforce them in the configs
file.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 9 -
1 file changed, 9 deletions(-)
diff --git a/default-configs/arm-softmmu.mak b/defa
Add Kconfig dependencies for the NRF51 / microbit machine.
Signed-off-by: Thomas Huth
---
hw/arm/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index c4b3cd2..aad2dd3 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -379,6 +379,8 @@ config FSL_IM
Netduino only depends on the stm32f205 SoC which in turn depends on
its components.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 9 +
hw/arm/Kconfig | 7 +++
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/default-configs/arm-softmm
This cleans up most settings in default-configs/aarch64-softmmu.mak.
Signed-off-by: Thomas Huth
---
default-configs/aarch64-softmmu.mak | 4
hw/arm/Kconfig | 12
hw/display/Kconfig | 1 +
3 files changed, 13 insertions(+), 4 deletions(-)
Dependencies have been determined with trial-and-error and by
looking at the xlnx-versal.c source file.
Signed-off-by: Thomas Huth
---
hw/arm/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 3577550..d9150cd 100644
--- a/hw/arm/Kconfig
+++ b/h
Dependencies have been determined by looking at hw/arm/virt.c
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 14 +-
hw/arm/Kconfig | 19 +++
hw/arm/Makefile.objs| 3 ++-
3 files changed, 22 insertions(+), 14 deletions(-)
Add Kconfig dependencies for the mps2-an* machines.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 19 +--
hw/arm/Kconfig | 17 +
2 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/default-configs/arm-softmmu.mak b/
Add Kconfig dependencies for the emcraft-sf2 machine.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 3 +--
hw/arm/Kconfig | 4
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
Add dependencies for the Cubitech Cubieboard.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 6 +-
hw/arm/Kconfig | 10 ++
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 6 +-
hw/arm/Kconfig | 6 ++
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/de
Dependencies have been determined by looking at hw/arm/aspeed.c
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 7 +--
hw/arm/Kconfig | 10 ++
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/default-configs/arm-softmmu.mak b/default-
Most of the code is directly controlled by the CONFIG_RASPI switch,
so not much to add here additionally.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 4 +---
hw/arm/Kconfig | 4
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/default-conf
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 23 +++-
hw/arm/Kconfig | 47 +
hw/arm/Makefil
Add Kconfig dependencies for the OMAP machines (cheetah, n800, n810,
sx1 and sx1-v1).
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 15 +++
hw/arm/Kconfi
Add Kconfig dependencies for the Strongarm collie machine.
This patch is based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 3 +--
hw/arm/Kconfig | 7 +++
hw/arm/Makefile.o
Add Kconfig dependencies for the xilinx-zynq-a9 board.
This patch is based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 7 +--
hw/arm/Kconfig | 14 ++
2 files
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 7 +--
hw/arm/Kconfig | 10 ++
2 files changed, 11 insertions(+), 6 deletions(-)
diff --
This series reworks the default-configs/arm-softmmu.mak and
default-configs/aarch64-softmmu.mak files to use the new Kconfig-style
dependencies instead.
Based-on: 1549562254-41157-1-git-send-email-pbonz...@redhat.com
("Support Kconfig in QEMU")
The first half of the patches is slightly
Add Kconfig dependencies for the Exynos-related boards (nuri and
smdkc210).
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 16 ++--
hw/arm/Kconfig
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 11 +--
hw/arm/Kconfig | 9 +
hw/display/Kconfig | 1 +
3 files changed
Add Kconfig dependencies for the highbank machine (and the midway
machine).
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 4 +---
hw/arm/Kconfig |
Add Kconfig dependencies for the fsl-imx31 / kzm machine.
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 3 +--
hw/arm/Kconfig | 5 +
hw/misc/Kco
Add Kconfig dependencies for the PXA2xx machines (akita, borzoi,
connex and verdex gumstix, tosa, mainstone, spitz, terrier and z2).
This patch is based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.m
Changes since v1:
* Move more of hw/s390x/tod.h to a new header.
* Use time2tod.
r~
Richard Henderson (2):
target/s390x: Split out s390-tod.h
This is a non-privileged instruction that was only implemented for
system mode. However, the stck instruction is used by glibc, so
this
We will need these from CONFIG_USER_ONLY as well,
which cannot access include/hw/.
Signed-off-by: Richard Henderson
---
include/hw/s390x/tod.h | 16 +---
target/s390x/s390-tod.h | 29 +
2 files changed, 30 insertions(+), 15 deletions(-)
create mode 10064
Signed-off-by: Richard Henderson
---
target/s390x/helper.h | 2 +-
target/s390x/misc_helper.c | 34 ++
target/s390x/translate.c | 2 ++
target/s390x/insn-data.def | 11 ++-
4 files changed, 31 insertions(+), 18 deletions(-)
diff --git a/target/s39
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1743441
Title:
OS/2 Warp 4
Public bug reported:
Host OS: macOS High Sierra (10.13.6)
MacBook Pro (Retina, Mid 2015)
Processor: 2.8GHz Intel Core i7
Guest OS: OpenBSD 6.4 install media (install64.iso)
Qemu 3.1.0 release, built with:
./configure --prefix=/usr/local/Cellar/qemu/3.1.0_1 --cc=clang
--host-cc=clang
--
Patchew URL:
https://patchew.org/QEMU/20190209033847.9014-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH v3 00/12] target/arm: tcg vector cleanups
Type: series
Message-id: 2019020903
Besides the obvious reasons of testing more, and somewhat for free,
running the qemu-iotests along the other tests on Travis also makes
sure that changes to shared code such as "scripts/qemu.py" and the
like won't break other users of the same code.
Cleber Rosa (2):
qemu-iotests: only enable kvm
I usually keep an eye if I'm breaking stuff by looking at Travis
(too). So it seems like a good idea to add a job that will do that.
A few things deserve a better explanation:
* test 233 requires "--enable-gnutls", and fails without it
* QEMU seems unable to initialize sound devices on the
There are certainly some improvements to be made with regards
to kvm capabilities detection, but this seems good enough for
this specific case.
Signed-off-by: Cleber Rosa
---
tests/qemu-iotests/235 | 5 +++--
tests/qemu-iotests/238 | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
dif
Patchew URL:
https://patchew.org/QEMU/20190209033847.9014-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH v3 00/12] target/arm: tcg vector cleanups
Message-id: 20190209033847.9014-1-r
For same-sign saturation, we have tcg vector operations. We can
compute the QC bit by comparing the saturated value against the
unsaturated value.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 33 +++
target/arm/translate.h | 4 +
target/arm/translate-a64.c | 36
Minimize the code within a macro by splitting out a helper function.
Use deposit32 instead of manual bit manipulation.
Signed-off-by: Richard Henderson
---
target/arm/helper.c | 45 +++--
1 file changed, 27 insertions(+), 18 deletions(-)
diff --git a/targ
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index f0101d2788..9b426f4271 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -13641,7 +13641,7 @@ voi
Fortunately, the functions affected are so far only called from SVE,
so there is no tail to be cleared. But as we convert more of AdvSIMD
to gvec, this will matter.
Signed-off-by: Richard Henderson
---
target/arm/vec_helper.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/arm/vec_
The 32-bit PMIN/PMAX has been decomposed to scalars,
and so can be trivially expanded inline.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index df1cd3fa3e..
Change the representation of this field such that it is easy
to set from vector code.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 5 -
target/arm/helper.c | 19 +++
target/arm/neon_helper.c | 2 +-
target/arm/vec_helper.c | 2 +-
4 files changed,
Given that we mask bits properly on set, there is no reason
to mask them again on get. We failed to clear the exception
status bits, 0x9f, which means that the wrong value would be
returned on get. Except in the (probably normal) case in which
the set clears all of the bits.
Simplify the code in
The components of this register is stored in several
different locations.
Signed-off-by: Richard Henderson
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 520ceea7a4..6ac81c2ca2 100644
--- a/target/ar
Since we're now handling a == b generically, we no longer need
to do it by hand within target/arm/.
Reviewed-by: David Gibson
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 6 +-
target/arm/translate-sve.c | 6 +-
target/arm/translate.c | 12 +++-
3 file
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 9d2dba7ed2..df1cd3fa3e 100644
--- a/target/arm/translate.c
+
Changes since v2:
* Fix some representational issues with FPSCR.
* Use host vector saturation for SQADD/UQADD.
This requires changing the internal representation of FPSR.QC.
* Fix a latent vector bug, noticed during the rest.
Correct RISU results depend on Mark C-A's patch from today,
"t
These are now unused.
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 12
target/arm/neon_helper.c | 12
2 files changed, 24 deletions(-)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 53a38188c6..9874c35ea9 100644
--- a/target/arm/helper.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 35 ++-
1 file changed, 14 insertions(+), 21 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index a12bfac719..fd5ceb6613 100644
--- a/t
Thanks, all:
I only want to know:
1. Is this a bug?
2. Which qemu version will fix the bug?
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https://bugs.launchpad.net/bugs/1814418
Title:
persistent bitmap will be inconsistent whe
Patchew URL: https://patchew.org/QEMU/20190208224020.GA4670@nyan/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH] hw/arm/bcm2835_peripheral: add bcm283x
sp804-alike timer
Message-id: 20190208224020.GA4670@nyan
Type
I forgot to add that the kernel in that image
(/usr/lib/kernel/org.clearlinux.*) does not have 9p support. So to
compile the kernel I used the attached config
--
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devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/
I forgot to add that the kernel in that image
(/usr/lib/kernel/org.clearlinux.*) does not have 9p support. So to
compile the kernel I used the attached config
** Attachment added: "Kernel config"
https://bugs.launchpad.net/qemu/+bug/1815252/+attachment/5237112/+files/.config
--
You received
Public bug reported:
Tested against QEMU: e47f81b617684c4546af286d307b69014a83538a
and $qemu-system-x86_64 --version
QEMU emulator version 2.11.1(Debian 1:2.11+dfsg-1ubuntu7.9)
Copyright (c) 2003-2017 Fabrice Bellard and the QEMU Project developers
+ exec sudo qemu-system-x86_64 -enable-kvm -bio
>From cf7dd33136c143d17c623e1a7277c1bf870b0863 Mon Sep 17 00:00:00 2001
From: Mark
Date: Fri, 8 Feb 2019 16:48:34 +0200
Subject: [PATCH] hw/arm/bcm2835_peripheral: add bcm283x sp804-alike timer
Signed-off-by: Mark
---
hw/arm/bcm2835_peripherals.c | 15 ++
hw/timer/Makefile.objs
From: Michael Clark
Cc: Palmer Dabbelt
Cc: Alistair Francis
Signed-off-by: Michael Clark
Signed-off-by: Alistair Francis
---
target/riscv/cpu_helper.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 6d3fbc
From: Michael Clark
If vectored interrupts are enabled (bits[1:0]
of mtvec/stvec == 1) then use the following
logic for trap entry address calculation:
pc = mtvec + cause * 4
In addition to adding support for vectored interrupts
this patch simplifies the interrupt delivery logic
by making sync
From: Michael Clark
This effectively changes riscv_cpu_update_mip
from edge to level. i.e. cpu_interrupt or
cpu_reset_interrupt are called regardless of
the current interrupt level.
Fixes WFI doesn't return when a IPI is issued:
- https://github.com/riscv/riscv-qemu/issues/132
To test:
1) App
From: Kito Cheng
This change checks elf_flags for EF_RISCV_RVE and if
present uses the RVE linux syscall ABI which uses t0
for the syscall number instead of a7.
Warn and exit if a non-RVE ABI binary is run on a
cpu with the RVE extension as it is incompatible.
Cc: Palmer Dabbelt
Cc: Sagar Kara
From: Michael Clark
Refer to the RISC-V PSABI specification for details:
- https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
Cc: Michael Tokarev
Cc: Richard Henderson
Cc: Alistair Francis
Reviewed-by: Laurent Vivier
Signed-off-by: Michael Clark
Signed-off-by: Alistair F
From: Michael Clark
Cc: Palmer Dabbelt
Cc: Alistair Francis
Signed-off-by: Michael Clark
Signed-off-by: Alistair Francis
---
Makefile.objs | 1 +
target/riscv/cpu_helper.c | 12 +++-
target/riscv/trace-events | 2 ++
3 files changed, 6 insertions(+), 9 deletions(-)
cre
From: Michael Clark
Remove machine generated constraints that are not
referenced by the pseudo-instruction constraints.
Cc: Palmer Dabbelt
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Cc: Alistair Francis
Signed-off-by: Michael Clark
Signed-off-by: Alistair Francis
---
disas/riscv.c | 138
From: Michael Clark
We can't allow the supervisor to control SEIP as this would allow the
supervisor to clear a pending external interrupt which will result in
lost a interrupt in the case a PLIC is attached. The SEIP bit must be
hardware controlled when a PLIC is attached.
This logic was previo
Signed-off-by: Alistair Francis
---
target/riscv/pmp.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 15a5366616..b11c4ae22f 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -113,10 +113,11 @@ stat
From: Michael Clark
The mode variable only uses the lower 4-bits (M,H,S,U) so
replace the GCC specific __builtin_popcount with ctpop8.
Cc: Palmer Dabbelt
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Cc: Alistair Francis
Signed-off-by: Michael Clark
Signed-off-by: Alistair Francis
---
hw/ri
Cast the kernel start address to the target bit length.
This ensures that we calculate the initrd offset to a valid address for
the architecture.
Steps to reproduce the original problem (reported by Alex):
Build U-Boot for the virt machine for riscv32. Then run it with
$ qemu-system-riscv3
Based-on: <20190130173601.3268-1-pal...@sifive.com>
Alistair Francis (2):
riscv: Ensure the kernel start address is correctly cast
riscv: pmp: Log pmp access errors as guest errors
Kito Cheng (1):
RISC-V: linux-user support for RVE ABI
Michael Clark (8):
RISC-V: Replace __builtin_popcoun
On 2/7/19 3:15 AM, Thomas Huth wrote:
> On 2019-02-06 18:29, John Snow wrote:
>>
>>
>> On 2/5/19 4:47 AM, Thomas Huth wrote:
>>> On 2019-02-05 10:42, Gerd Hoffmann wrote:
On Tue, Feb 05, 2019 at 10:31:24AM +0100, Thomas Huth wrote:
> On 2019-02-05 08:52, Gerd Hoffmann wrote:
>> On M
Hi Emilio,
On Fri, Feb 8, 2019 at 3:27 PM Emilio G. Cota wrote:
> On Fri, Feb 08, 2019 at 13:00:44 -0800, Max Filippov wrote:
> > after updating to the latest qemu mainline I get segfault with the following
> > backtrace when I run qemu-system-xtensa:
> The problem is that tlb_fill can end up tr
On Fri, Feb 08, 2019 at 13:00:44 -0800, Max Filippov wrote:
> after updating to the latest qemu mainline I get segfault with the following
> backtrace when I run qemu-system-xtensa:
>
> Thread 3 "qemu-system-xte" received signal SIGSEGV, Segmentation fault.
> [Switching to Thread 0x7fffde9d3700 (L
On Friday, February 8, 2019 4:48:19 AM EST Dr. David Alan Gilbert wrote:
> * Stefan Hajnoczi (stefa...@redhat.com) wrote:
> > On Thu, Feb 07, 2019 at 05:33:25PM -0500, Neil Skrypuch wrote:
> >
> > Thanks for your email!
> >
> > Please post your QEMU command-line.
For the test VM, we're using the
Hi
On Fri, Feb 8, 2019 at 10:14 PM Michael S. Tsirkin wrote:
>
> On Fri, Feb 08, 2019 at 12:23:55PM +0100, Marc-André Lureau wrote:
> > Add a new virtio-input device, which connects to a vhost-user
> > backend.
> >
> > vhost-user-input is similar to virtio-input-host, it is wrapped by
> > vhost-u
On 2/8/19 11:34 PM, John Snow wrote:
> On 2/7/19 1:51 PM, Thomas Huth wrote:
>> On 2019-02-07 17:50, Philippe Mathieu-Daudé wrote:
>>> On 2/5/19 1:18 AM, Philippe Mathieu-Daudé wrote:
Since the ahci-test uses qemu-img, add a dependency to build it
before using it.
This fixes:
>>
On 2/7/19 1:51 PM, Thomas Huth wrote:
> On 2019-02-07 17:50, Philippe Mathieu-Daudé wrote:
>> On 2/5/19 1:18 AM, Philippe Mathieu-Daudé wrote:
>>> Since the ahci-test uses qemu-img, add a dependency to build it
>>> before using it.
>>> This fixes:
>>>
>>> $ gmake check-qtest V=1
>>> QTEST_QE
Introduce the z14 GA2 cpu model for QEMU. There are no new features
introduced with this model, and will inherit the same feature set as
z14 GA1.
Signed-off-by: Collin Walling
---
target/s390x/cpu_models.c | 1 +
target/s390x/gen-features.c | 7 +++
2 files changed, 8 insertions(+)
diff -
Latest systems and host kernels support mepoch, which is a
feature that was meant to be supported for z14 GA1 from the
get-go. Let's copy it to the z14 GA1 default CPU model.
Machines s390-ccw-virtio-3.1 and older will retain the old CPU
models and will not provide this bit in the default model.
On 2/8/19 7:12 PM, Marc-André Lureau wrote:
> Once libslirp has received its first release, we can link with the
> external libslirp library.
Is there a scheduled date?
> The migration data should be compatible with current and older qemu
> versions (same compatibility as today). See "slirp: add
Hi,
That LTP test case deliberately tries to invoke a system call with an invalid
address to make sure that the kernel fails safely. There seems to be an
impedance mismatch between access_ok() and page_check_range() here, where the
later assumes that the address is in guest range:
/* Th
On 2/8/19 3:38 PM, Stefan Berger wrote:
On 2/8/19 3:10 PM, Liam Merwick wrote:
From staring at the code, I do have one other question - why does the
check of the lower localities below only check 'l < locty - 1' before
setting s->loc[locty] - it seems like s->loc[locty - 1] is skipped.
On 01/30/2019 08:22 AM, Cornelia Huck wrote:
Introduce a mutex to disallow concurrent reads or writes to the
I/O region. This makes sure that the data the kernel or user
space see is always consistent.
The same mutex will be used to protect the async region as well.
Signed-off-by: Cornelia H
On 02/06/2019 09:00 AM, Cornelia Huck wrote:
On Wed, 30 Jan 2019 14:22:06 +0100
Cornelia Huck wrote:
[This is the Linux kernel part, git tree is available at
https://git.kernel.org/pub/scm/linux/kernel/git/kvms390/vfio-ccw.git
vfio-ccw-eagain-caps-v3
I've pushed out the changes I've made
Split mode doesn't make sense on pseries, neither with XICS nor XIVE. But
passing kernel-irqchip=split silently behaves like kernel-irqchip=on.
Other architectures that support kernel-irqchip do terminate QEMU when
split mode is requested but not available though. Do the same with pseries
for consi
On Fri, Feb 08, 2019 at 12:23:55PM +0100, Marc-André Lureau wrote:
> Add a new virtio-input device, which connects to a vhost-user
> backend.
>
> vhost-user-input is similar to virtio-input-host, it is wrapped by
> vhost-user-input-pci. Instead of reading configuration directly from
> an input dev
Hello,
after updating to the latest qemu mainline I get segfault with the following
backtrace when I run qemu-system-xtensa:
Thread 3 "qemu-system-xte" received signal SIGSEGV, Segmentation fault.
[Switching to Thread 0x7fffde9d3700 (LWP 13583)]
0x55794252 in tlb_addr_write (entry=0x7fffd
On 2/8/19 8:37 AM, Rémi Denis-Courmont wrote:
> Rather than assert that the first byte of a checked range is within the
> guest address space, assert that the last byte is. The assertion is
> moved past the overflow check to ensure that the last byte is actually
> the one with the highest address.
From: Marc-André Lureau
Hi,
As discussed earlier in "[PATCH for-3.2 00/41] RFC: slirp: make it
again a standalone project" and other threads, it would be useful to
make slirp a separate project (the submodule approach was discarded)
for various projects to share.
The first patch describes how t
On Wed, Jan 30, 2019 at 2:20 PM Luke Nelson wrote:
>
> pmpcfg_csr_{read,write} do not correctly handle accesses to PMP
> configurations 8 through 15 (CSR pmpcfg2) on RV64.
>
> The current code computes the pmpcfg index using:
>
> (reg_index * sizeof(target_ulong))
>
> This is incorrect on RV64.
On 08/02/2019 16:38, Remi Denis Courmont wrote:
>Hi,
>
> That LTP test case deliberately tries to invoke a system call with an invalid
> address to make sure that the kernel fails safely. There seems to be an
> impedance mismatch between access_ok() and page_check_range() here, where the
>
On 07.02.19 07:56, Markus Armbruster wrote:
> Max Reitz writes:
>
>> This patch allows specifying a discriminator that is an optional member
>> of the base struct. In such a case, a default value must be provided
>> that is used when no value is given.
>>
>> Signed-off-by: Max Reitz
>> ---
>>
On Fri, Feb 8, 2019 at 11:09 AM Jim Wilson wrote:
>
> On Fri, Feb 8, 2019 at 10:17 AM Alistair Francis wrote:
> > Can we just write a wrapper function then that sets and unsets the variable?
> > Something like this:
> >
> > riscv_csrrw_debug(...) {
> > #if !defined(CONFIG_USER_ONLY)
> >
On Wed, Feb 6, 2019 at 6:05 PM Jim Wilson wrote:
>
> On Wed, Feb 6, 2019 at 4:04 PM Alistair Francis wrote:
> > Would it not be easier to add an extra argument to the functions
> > intstead of setting and unsetting this?
> >
> > That's what you had in the earlier version of this set.
>
> The csr
From: Marc-André Lureau
$ git filter-branch --tree-filter "git ls-files '*.c' '*.h' | xargs
clang-format -i" -f --subdirectory-filter "slirp" --prune-empty
--tag-name-filter cat -- --all
$ git rm Makefiles.objs
$ mkdir src && git mv *.c *.h src/
$ git tag --no-merged | xargs git tag -d
$ git refl
From: Marc-André Lureau
Add SLIRP_CHECK_VERSION() macro, and a slirp_version_string() helpers.
Signed-off-by: Marc-André Lureau
---
meson.build | 13 +
src/libslirp-version.h.in | 22 ++
src/libslirp.h| 5 +
src/util.h
On 2/8/19 3:10 PM, Liam Merwick wrote:
trace_tpm_tis_abort(s->next_locty);
/*
@@ -531,6 +534,8 @@ static void tpm_tis_mmio_write(void *opaque,
hwaddr addr,
uint16_t len;
uint32_t mask = (size == 1) ? 0xff : ((size == 2) ? 0x : ~0);
+ assert(TPM_TIS_IS_VALID_LOCTY
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
.gitlab-ci.yml | 20
1 file changed, 20 insertions(+)
create mode 100644 .gitlab-ci.yml
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
new file mode 100644
index 000..71fda28
--- /dev/null
+++ b/.gitlab-ci.yml
From: Marc-André Lureau
Based on qemu vmstate serialization code. At this point it should
produce the same result. However, with future state versions, slirp
should be free to change its format, by bumping the reported state
version.
Signed-off-by: Marc-André Lureau
---
meson.build| 3 +
On 06.02.19 21:43, Eric Blake wrote:
> On 2/6/19 1:55 PM, Max Reitz wrote:
>
> In the subject, s/well typed/well-typed/
>
>> By applying a health mix of qdict_flatten(), qdict_crumple(),
>
> s/health/healty/
>
>> qdict_stringify_for_keyval(), the keyval input visitor, and the QObject
>> output
From: Marc-André Lureau
Build a shared library, exporting only slirp_* symbols.
Install API headers and a slirp.pc pkg-config.
It has been tested to build on Linux and with mingw64 cross-compilation.
Signed-off-by: Marc-André Lureau
---
meson.build | 111
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