These fields have now been replaced by equivalents under the machine
data.
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index a62ff60414f4..2c22292e7f41 100644
--- a/target/ppc/cpu.h
+++ b/target/
Is the XXX in the subject meant to go on permanent record?
> > > > Intel Processor Trace required CPUID[0x14] but the cpuid level is
> > > > 0xd when create a kvm guest with e.g. "-cpu qemu64,+intel-pt".
> > > >
> > > > Signed-off-by: Luwei Kang
> > > > ---
> > > > target/i386/cpu.c | 7 +++
> > > > 1 file changed, 7 insertions(+)
> > > >
> > > > dif
The tests tries to let qemu server mode to process the connection
which turns out to be racy after commit 8258292e18c3 ("monitor: Remove
"x-oob", offer capability "oob" unconditionally"). This is because the
filter may try to mirror the packets before UNIX socket object is
ready (connected was set
MX PIC can support up to 32 CPUs on xtfpga boards, raise per-board
limit accordingly.
Signed-off-by: Max Filippov
---
hw/xtensa/xtfpga.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index 792a225e03a2..1d21162a2773 1
Hello,
this series adds SMP-capable interrupt controller model amd instantiates
it on the XTFPGA boards when more than one CPU is specified in command
line. It also adds an MMUv2 SMP-capable xtensa core.
Max Filippov (4):
target/xtensa: expose core runstall as an IRQ line
target/xtensa: add M
Create and use MX PIC as a peripheral interrupt controller when more
than 1 processor is enabled on xtfpga board. Connect xtensa CPU cores to
the MX PIC and select secondary reset vector on all cores except the
first one.
Signed-off-by: Max Filippov
---
hw/xtensa/xtfpga.c | 22 ++
Runstall signal looks very much like a level-triggered IRQ line. Provide
xtensa_get_runstall function that returns runstall IRQ.
Signed-off-by: Max Filippov
---
hw/xtensa/pic_cpu.c | 12
target/xtensa/cpu.h | 2 ++
2 files changed, 14 insertions(+)
diff --git a/hw/xtensa/pic_cpu.c
MX interrupt controller is a collection of the following devices
accessible through the external registers interface:
- interrupt distributor can route each external IRQ line to the
corresponding external IRQ pin of selected subset of connected xtensa
cores. It has per-CPU and per-IRQ enable si
QEMU have already supported to load up to 4G initrd if the sepcified memory is
enough and XLF_CAN_BE_LOADED_ABOVE_4G is set by guest kernel
linux-3.6 kernel shipped by Fedora-18 cannot support xldflags so that it
cannot support loading more than 2GiB initrd
CC: Wainer dos Santos Moschetta
CC: Ca
XLF_CAN_BE_LOADED_ABOVE_4G is set on vmlinuz shipped by Fedora-28 so that
it's allowed to be loaded below 4 GB address.
timeout is updated to 5 minutes as well since we need more time to load a
large initrd to the guest
CC: Wainer dos Santos Moschetta
CC: Caio Carrara
CC: Cleber Rosa
CC: Eduar
On Sun, 27 Jan 2019, Peter Maydell wrote:
On Wed, 19 Dec 2018 at 19:42, Ben Hekster wrote:
Should have tested a little more:
While the crashing has stopped, the window isn't responsive to
keystrokes. This includes the frame buffer emulation itself (so
I can't actually log in) as well as the
On Sun, Jan 27, 2019 at 03:32:15PM +0530, kumar sourav wrote:
> Sets the category of adb as DEVICE_CATEGORY_INPUT
> Devices should be assigned to one of DEVICE_CATEGORY_
>
> Signed-off-by: kumar sourav
Applied, thanks.
> ---
> hw/input/adb.c | 1 +
> 1 file changed, 1 insertion(+)
>
> dif
On Sun, 27 Jan 2019, BALATON Zoltan wrote:
On Sun, 27 Jan 2019, Mark Cave-Ayland wrote:
On 27/01/2019 17:26, Richard Henderson wrote:
On 1/27/19 7:19 AM, Mark Cave-Ayland wrote:
Could this make the loop slower? I certainly haven't noticed any obvious
performance difference during testing (OS
On Sun, 27 Jan 2019, Mark Cave-Ayland wrote:
On 27/01/2019 17:26, Richard Henderson wrote:
On 1/27/19 7:19 AM, Mark Cave-Ayland wrote:
Could this make the loop slower? I certainly haven't noticed any obvious
performance difference during testing (OS X uses merge quite a bit for
display renderi
On Wed, 19 Dec 2018 at 19:42, Ben Hekster wrote:
>
> Should have tested a little more:
>
> While the crashing has stopped, the window isn't responsive to
>keystrokes. This includes the frame buffer emulation itself (so
>I can't actually log in) as well as the QEMU Monitor; nothing I
>type has any
On 1/27/19 1:03 AM, Mark Cave-Ayland wrote:
> The original purpose of these macros was to correctly reference the high and
> low
> parts of the VSRs regardless of the host endianness.
>
> Replace these direct references to high and low parts with the relevant VsrD
> macro instead, and completely
There is a patch on list for this:
https://lists.gnu.org/archive/html/qemu-devel/2019-01/msg06728.html
Using the flag is a good idea.
** Changed in: qemu
Status: New => In Progress
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On 1/27/19 3:46 AM, Samuel Thibault wrote:
> Signed-off-by: Samuel Thibault
> ---
> slirp/ip.h | 4 ++--
> slirp/ip6.h | 4 ++--
> slirp/ip6_icmp.h | 10 +-
> 3 files changed, 9 insertions(+), 9 deletions(-)
Reviewed-by: Richard Henderson
r~
On 1/25/19 3:40 PM, Richard Henderson wrote:
> On 1/25/19 1:49 PM, Rémi Denis-Courmont wrote:
>> From: Remi Denis-Courmont
>>
>> A flawed test lead to the instructions always being treated as
>> unallocated encodings.
>>
>> Signed-off-by: Remi Denis-Courmont
>> ---
>> target/arm/translate-a64.c
On 1/23/19 6:08 AM, Thomas Huth wrote:
> Thomas Huth (4):
> COPYING.LIB: Synchronize the LGPL 2.1 with the version from gnu.org
> target/openrisc: Fix LGPL version number
> target/tricore: Fix LGPL version number
> tcg: Fix LGPL version number
Reviewed-by: Richard Henderson
r~
On 1/26/19 5:44 PM, Max Filippov wrote:
> It's a one-liner used in a single place, move its implementation there
> and remove its declaration.
>
> Signed-off-by: Max Filippov
> ---
> hw/xtensa/pic_cpu.c | 7 +--
> target/xtensa/cpu.h | 1 -
> 2 files changed, 1 insertion(+), 7 deletions(-)
On 1/25/19 10:52 PM, Rémi Denis-Courmont wrote:
> From: Remi Denis-Courmont
>
> This always enables IA, IB, DA and DB keys in user mode on the maximum
> CPU, in a manner that is consistent with the other CPUs. That is to say
> redefining the reset value of SCTLR_ELx registers.
>
> Without this p
On 1/25/19 10:52 PM, Rémi Denis-Courmont wrote:
> From: Remi Denis-Courmont
>
> Since QEMU does not support the ARMv8.2-LVA, Large Virtual Address,
> extension (yet), the VA address space is 48-bits plus a sign bit. User
> mode can only handle the positive half of the address space, so that
> mak
On Sun, Jan 27, 2019 at 12:57:20PM +, Stefan Hajnoczi wrote:
> On Fri, Jan 25, 2019 at 02:17:01PM -0500, Michael S. Tsirkin wrote:
> > On Fri, Jan 25, 2019 at 03:12:45PM +, Stefan Hajnoczi wrote:
> > > Based on the Linux guest driver code and the lack of more evidence in
> > > the spec, I'm
On 1/27/19 9:45 AM, Mark Cave-Ayland wrote:
>> I would expect the i < n/2 loop to be faster, because the assignments are
>> unconditional. FWIW.
>
> Do you have any idea as to how much faster? Is it something that would show
> up as significant within the context of QEMU?
I don't have any number
On 27/01/2019 17:26, Richard Henderson wrote:
> On 1/27/19 7:19 AM, Mark Cave-Ayland wrote:
>> Could this make the loop slower? I certainly haven't noticed any obvious
>> performance difference during testing (OS X uses merge quite a bit for
>> display rendering), and I'd hope that with a good com
On 1/27/19 7:19 AM, Mark Cave-Ayland wrote:
> Could this make the loop slower? I certainly haven't noticed any obvious
> performance difference during testing (OS X uses merge quite a bit for
> display rendering), and I'd hope that with a good compiler and modern branch
> prediction then any effect
On 27/01/2019 12:07, BALATON Zoltan wrote:
> On Sun, 27 Jan 2019, Mark Cave-Ayland wrote:
>> The current implementations make use of the endian-specific macros
>> MRGLO/MRGHI
>> and also reference HI_IDX and LO_IDX directly to calculate array offsets.
>>
>> Rework the implementation to use the Vs
On Fri, Jan 25, 2019 at 02:17:01PM -0500, Michael S. Tsirkin wrote:
> On Fri, Jan 25, 2019 at 03:12:45PM +, Stefan Hajnoczi wrote:
> > Based on the Linux guest driver code and the lack of more evidence in
> > the spec, I'm pretty sure data[] doesn't need to be padded to 512 bytes
> > for discar
On Fri, Jan 25, 2019 at 05:18:13PM +0100, Stefano Garzarella wrote:
> On Fri, Jan 25, 2019 at 02:58:56PM +, Stefan Hajnoczi wrote:
> > On Thu, Jan 24, 2019 at 06:23:22PM +0100, Stefano Garzarella wrote:
> > > +virtio_error(vdev, "virtio-blk discard/wzeroes header too
> > > short");
From: Marc-André Lureau
Replace:
- u_char -> uint8_t
- u_short -> uint16_t
- u_long -> uint32_t
- u_int -> unsigned
- caddr_t -> char *
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/ip_icmp.c| 6 +++---
slirp/ip_icmp.h| 18 +-
slirp/ip_inpu
On Sun, 27 Jan 2019, Mark Cave-Ayland wrote:
The current implementations make use of the endian-specific macros MRGLO/MRGHI
and also reference HI_IDX and LO_IDX directly to calculate array offsets.
Rework the implementation to use the Vsr* macros so that these per-endian
references can be remove
From: Marc-André Lureau
Use a more descriptive name for the callback.
Reuse the SlirpWriteCb type. Wrap it to check that all data has been written.
Return a ssize_t for potential error handling and data-loss reporting.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
incl
From: Marc-André Lureau
Except for the migration code which is gated by WITH_QEMU, only
include our own headers, so libslirp can be built standalone.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/arp_table.c | 1 -
slirp/bootp.c | 1 -
slirp/cksum.c |
From: Marc-André Lureau
It would be legitimate to use libslirp without glib. Let's
add_poll/get_revents pair of callbacks to provide the same
functionality.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 72 ++
From: Marc-André Lureau
Make it possible to use headers easily with C++ projects.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/libslirp.h | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/slirp/libslirp.h b/slirp/libslirp.h
index 9b13d825
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/qtailq.h | 193 +
slirp/slirp.h | 3 +-
2 files changed, 194 insertions(+), 2 deletions(-)
create mode 100644 slirp/qtailq.h
diff --git a/slirp
From: Marc-André Lureau
Remove hard-coded dependency on slirp in main-loop, and use a "poll"
notifier instead. The notifier is registered per slirp instance.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
include/qemu/main-loop.h | 15 ++
net/slirp.c | 24 +
From: Marc-André Lureau
qemu_set_nonblock() is slightly more problematic and will be dealt
with in a separate patch.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/Makefile.objs | 3 +-
slirp/ip_icmp.c | 6 +-
slirp/misc.c| 20 ++---
slirp/socket.c
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/ip.h | 10 +-
slirp/ip6_icmp.h | 6 +++---
slirp/slirp.h| 5 +++--
slirp/util.h | 32
4 files changed, 43 insertions(+), 10 deletions(-)
c
From: Marc-André Lureau
This is friendlier for FFI bindings.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 25 -
slirp/dhcpv6.c | 2 +-
slirp/if.c | 2 +-
slirp/ip6_icmp.c | 15 +--
slirp/ip_icmp.c | 2 +-
From: Marc-André Lureau
Add a counter-part to register_poll_fd() for completeness.
(so far, register_poll_fd() is called only on struct socket fd)
Suggested-by: Paolo Bonzini
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 6 ++
slirp/ip_icmp.c |
From: Marc-André Lureau
Introduce a SlirpCb callback to kick the main io-thread.
Add an intermediary sodrop() function that will call SlirpCb.notify
callback when sbdrop() returns true.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 1 +
slirp/libslir
From: Marc-André Lureau
Some of those could have been squashed earlier, but it is easier to do
it all here.
Signed-off-by: Marc-André Lureau
Signed-off-by: samuel Thibault
---
slirp/dhcpv6.c | 1 -
slirp/ip6_icmp.c | 2 --
slirp/misc.c | 2 --
slirp/sbuf.c | 1 -
slirp/slirp.c|
This is actually superseded by the complete pull I have just sent.
Samuel
From: Marc-André Lureau
Make state saving optional: this will allow to build SLIRP without
QEMU. (eventually, the vmstate helpers will be extracted, so an
external project & process could save its state)
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/Makefile.objs |
Signed-off-by: Samuel Thibault
Reviewed-by: Marc-André Lureau
---
slirp/ip.h | 4 ++--
slirp/ip6.h | 4 ++--
slirp/ip6_icmp.h | 10 +-
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/slirp/ip.h b/slirp/ip.h
index 2baeeb9a3a..73a4d2a3d2 100644
--- a/slirp/ip.h
From: Marc-André Lureau
Remove a dependency on qemu util.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/slirp.c | 4 ++--
slirp/tftp.c | 2 +-
slirp/util.c | 17 +
slirp/util.h | 2 ++
4 files changed, 22 insertions(+), 3 deletions(-)
diff --
From: Marc-André Lureau
Our API usage requires Vista, set WIN32_LEAN_AND_MEAN to fix a number
of issues (winsock2.h include order for ex, which is better to include
first for legacy reasons).
While at it, group redundants #ifndef _WIN32 blocks.
Signed-off-by: Marc-André Lureau
Signed-off-by: S
From: Marc-André Lureau
Now that polling is done per-instance, we don't need a global list of
slirp instances.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/slirp.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/slirp/slirp.c b/slirp/slirp.c
index a0de8b71
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/ip6.h | 1 -
slirp/slirp.h | 1 -
slirp/util.h | 10 ++
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/slirp/ip6.h b/slirp/ip6.h
index 1e3e329ce6..4e7c366505 100644
-
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/if.c | 1 -
slirp/ip6_icmp.c | 1 -
slirp/slirp.c| 1 -
slirp/util.h | 2 ++
4 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/slirp/if.c b/slirp/if.c
index 73e3705740..
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/libslirp.h | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/slirp/libslirp.h b/slirp/libslirp.h
index 679a25422b..02cbec9f8b 100644
--- a/slirp/libslirp.h
+++ b/sli
From: Marc-André Lureau
Instead of calling into QEMU chardev directly, and mixing it with
slirp_add_exec() handling, add a new function slirp_add_guestfwd()
which takes a write callback.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 14 ++
From: Peter Maydell
Various ipv6 structs in the slirp headers are marked QEMU_PACKED,
but they are actually naturally aligned and will have no padding
in them. Instead of marking them with the 'packed' attribute,
assert at compile time that they are the size we expect. This
allows us to take the
The following changes since commit ad7a21e81231ae64540310384fb0f87ac8758b02:
Merge remote-tracking branch 'remotes/ehabkost/tags/python-next-pull-request'
into staging (2019-01-25 17:22:20 +)
are available in the Git repository at:
https://people.debian.org/~sthibault/qemu.git tags/samu
From: Marc-André Lureau
Replace qemu_set_nonblock() with slirp_set_nonblock()
qemu_set_nonblock() does some event registration with the main
loop. Add a new callback register_poll_fd() for that reason.
Always build the fd-register stub, to avoid #if WIN32.
Signed-off-by: Marc-André Lureau
Sig
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 21 +
slirp/ip6_icmp.c | 16 +++-
slirp/libslirp.h | 14 +++---
slirp/slirp.h| 2 +-
4 files changed, 40 insertions(+), 13 deletions(-)
d
From: Peter Maydell
There is no reason to mark the struct ipq and struct ipasfrag as
packed: they are naturally aligned anyway, and are not representing
any on-the-wire packet format. Indeed they vary in size depending on
the size of pointers on the host system, because the 'struct qlink'
member
pkt parameter may be unaligned, so we must access it byte-wise.
This fixes sparc64 host SIGBUS during pxe boot.
Signed-off-by: Samuel Thibault
Reviewed-by: Richard Henderson
---
slirp/slirp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/slirp/slirp.c b/slirp/slirp.c
inde
From: Marc-André Lureau
Remove a dependency on QEMU. Use the existing logging facilities.
Set SLIRP_DEBUG=tftp to get tftp log.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
Makefile.objs | 1 -
slirp/debug.h | 13 ++---
slirp/slirp.c | 1 +
slir
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/slirp.c b/net/slirp.c
index ec07f662c0..b91741b8fc 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -773,7 +773,7 @@ stat
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 25 ++---
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/net/slirp.c b/net/slirp.c
index b91741b8fc..750105a466 100644
--- a/net/slirp.c
+++ b/net/slirp
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/slirp.c b/net/slirp.c
index 750105a466..0b15f427f5 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -807,6 +807,7 @@ static int slirp_g
On Sun, Jan 27, 2019 at 3:56 PM Samuel Thibault
wrote:
>
> Signed-off-by: Samuel Thibault
Reviewed-by: Marc-André Lureau
> ---
> slirp/ip.h | 4 ++--
> slirp/ip6.h | 4 ++--
> slirp/ip6_icmp.h | 10 +-
> 3 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/sl
Hi
On Sun, Jan 27, 2019 at 4:17 AM Samuel Thibault wrote:
>
> Applied too, but
>
> Marc-André Lureau, le jeu. 17 janv. 2019 15:43:37 +0400, a ecrit:
> > +/* Create a new timer with the given callback and opaque data */
> > +void *(*timer_new)(SlirpTimerCb cb, void *opaque);
> > +/* Re
Signed-off-by: Samuel Thibault
---
slirp/ip.h | 4 ++--
slirp/ip6.h | 4 ++--
slirp/ip6_icmp.h | 10 +-
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/slirp/ip.h b/slirp/ip.h
index 2baeeb9a3a..73a4d2a3d2 100644
--- a/slirp/ip.h
+++ b/slirp/ip.h
@@ -229,8 +229,
Marc-André Lureau, le dim. 27 janv. 2019 15:37:38 +0400, a ecrit:
> On Sun, Jan 27, 2019 at 5:55 AM Samuel Thibault
> wrote:
> >
> > (Which I'll fold as appropriate within Marc-André's patch series)
>
> Did you try using G_STATIC_ASSERT* instead?
Ah, right, that can be used instead, sent refine
Marc-André Lureau, le dim. 27 janv. 2019 15:42:41 +0400, a ecrit:
> On Sun, Jan 27, 2019 at 4:17 AM Samuel Thibault
> wrote:
> > Marc-André Lureau, le jeu. 17 janv. 2019 15:43:37 +0400, a ecrit:
> > > +/* Create a new timer with the given callback and opaque data */
> > > +void *(*timer_n
Hi
On Sun, Jan 27, 2019 at 5:55 AM Samuel Thibault wrote:
>
> (Which I'll fold as appropriate within Marc-André's patch series)
Did you try using G_STATIC_ASSERT* instead?
looks good otherwise
>
> Samuel Thibault, le dim. 27 janv. 2019 02:51:13 +0100, a ecrit:
> > Signed-off-by: Samuel Thibaul
Sets the category of lm832x as DEVICE_CATEGORY_INPUT
Devices should be assigned to one of DEVICE_CATEGORY_
Signed-off-by: kumar sourav
---
hw/input/lm832x.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/input/lm832x.c b/hw/input/lm832x.c
index cffbf586d4..07ae5e0aee 100644
--- a/hw/
Sets the category of adb as DEVICE_CATEGORY_INPUT
Devices should be assigned to one of DEVICE_CATEGORY_
Signed-off-by: kumar sourav
---
hw/input/adb.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/input/adb.c b/hw/input/adb.c
index bbb40aeef1..6ca7c5641c 100644
--- a/hw/input/adb.c
Maybe using gcc flag -Wlogical-op might help find bugs like this in
future.
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https://bugs.launchpad.net/bugs/1813460
Title:
qemu/target/arm/translate-a64.c:2039: bad test ?
Status in
Public bug reported:
qemu/target/arm/translate-a64.c:2039]: (warning) Logical disjunction
always evaluates to true: op3 != 2 || op3 != 3.
Source code is
if (op3 != 2 || op3 != 3) {
Maybe better code
if (op3 != 2 && op3 != 3) {
** Affects: qemu
Importance: Undecided
Richard points out that these macros suffer from a -fsanitize=shift bug in that
they improperly handle n == 0 turning it into a shift by 32/64 respectively.
Replace them with QEMU's existing ror32() and ror64() functions instead.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
---
The original purpose of these macros was to correctly reference the high and low
parts of the VSRs regardless of the host endianness.
Replace these direct references to high and low parts with the relevant VsrD
macro instead, and completely remove the now-unused HI_IDX and LO_IDX macros.
Signed-o
As pointed out by Richard: it does not need the mask argument, nor does it need
the recast argument. The masking is implied by the cast argument, and the
recast is implied by the assignment.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
---
target/ppc/int_helper.c | 14 +++-
>From working on the TCG vector operations patchset, it is apparent that there
are a large number of endian-based hacks in int_helper.c which can be removed by
making use of the various Vsr* macros.
Patch 1 is simple enough, and implements the complete set of Vsr* macros for
both big endian and li
The current implementations make use of the endian-specific macros HI_IDX and
LO_IDX directly to calculate array offsets.
Rework the implementation to use the Vsr* macros so that these per-endian
references can be removed.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
---
targ
These macros can be eliminated by instead using the relavant Vsr* macros in
the few locations where they appear.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
---
target/ppc/int_helper.c | 66 -
1 file changed, 27 insertions(+), 3
Following on from the previous work, there are numerous endian-related hacks
in int_helper.c that can now be replaced with Vsr* macros.
There are also a few places where the VECTOR_FOR_INORDER_I macro can be
replaced with a normal iterator since the processing order is irrelevant.
Signed-off-by:
The current implementations make use of the endian-specific macros MRGLO/MRGHI
and also reference HI_IDX and LO_IDX directly to calculate array offsets.
Rework the implementation to use the Vsr* macros so that these per-endian
references can be removed.
Signed-off-by: Mark Cave-Ayland
---
targe
This prepares us for eliminating the use of direct array access within the VMX
instruction implementations.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
---
target/ppc/internal.h | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/target/ppc/internal.h
On 26/01/2019 01:53, David Gibson wrote:
> On Mon, Jan 21, 2019 at 05:15:20AM +, Mark Cave-Ayland wrote:
>> On 20/01/2019 20:28, David Gibson wrote:
>>> On Fri, Jan 18, 2019 at 01:25:37PM +, Mark Cave-Ayland wrote:
On 02/01/2019 02:59, David Gibson wrote:
> On Fri, Dec 28, 20
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