LUNs >= 256 have to be encoded with the so-called "flat space
addressing method" for virtio-scsi, where an additional bit has to
be set. SLOF already took care of this with the following commit:
https://git.qemu.org/?p=SLOF.git;a=commitdiff;h=f72a37713fea47da
(see https://bugzilla.redhat.com/sho
On 20.11.2017 08:17, Yu Ning wrote:
>
>
> On 11/20/2017 5:31, Eduardo Habkost wrote:
>> On Fri, Nov 17, 2017 at 05:03:27PM +0800, Yu Ning wrote:
>>> On 11/17/2017 2:00, Eduardo Habkost wrote:
On Thu, Nov 16, 2017 at 07:47:44AM +0100, Stefan Weil wrote:
> Am 16.11.2017 um 07:50 schrieb yu
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH] spapr: Implement bug in spapr-vty device to be
compatible with PowerVM
Type: series
Message-id: 20171120071423.11693-1-da...@gibson.dropbear.id.au
=== TEST SCRIPT BEGIN
On 11/20/2017 5:31, Eduardo Habkost wrote:
On Fri, Nov 17, 2017 at 05:03:27PM +0800, Yu Ning wrote:
On 11/17/2017 2:00, Eduardo Habkost wrote:
On Thu, Nov 16, 2017 at 07:47:44AM +0100, Stefan Weil wrote:
Am 16.11.2017 um 07:50 schrieb yu.n...@linux.intel.com:
From: Yu Ning
hax-interface.h
The spapr-vty device implements the PAPR defined virtual console,
which is also implemented by IBM's proprietary PowerVM hypervisor.
PowerVM's implementation has a bug where it inserts an extra \0 after
every \r going to the guest. Because of that Linux's guest side
driver has a workaround which
Hi Paolo,
What's your opinion about this patch? We found it just before finishing patches
for the past two days.
Thanks,
-Gonglei
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
> Behalf Of Herongguang (Stephen)
> Sent: Thursday, April 06,
Now v9fs in linux has already supported O_DIRECT(v9fs_direct_IO),
when guest user open file with O_DIRECT flag and return success,
so user hopes data doesn't pass through page cache, but 9pfs in
qemu ignore direct disk access and use host page cache, it is not
match to DIRECT_IO semantic, so we sho
The following changes since commit 2e02083438962d26ef9dcc7100f3b378104183db:
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
(2017-11-17 19:08:07 +)
are available in the Git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-2.11-20171120
for you
From: Greg Kurz
A DRC with a pending unplug request releases its associated device at
machine reset time.
In the case of LMB, when all DRCs for a DIMM device have been reset,
the DIMM gets unplugged, causing guest memory to disappear. This may
be very confusing for anything still using this memo
From: Suraj Jitindar Singh
The device tree nodes ibm,arch-vec-5-platform-support and ibm,pa-features
are used to communicate features of the cpu to the guest operating
system. The properties of each of these are determined based on the
selected cpu model and the availability of hypervisor feature
On 20.11.2017 04:44, no-re...@patchew.org wrote:
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Subject: [Qemu-devel] [PULL 0/6] Net patches
> Type: series
> Message-id: 1511148687-24909-1-git-send-email-jasow...@redhat.com
>
> === TE
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 0/6] Net patches
Type: series
Message-id: 1511148687-24909-1-git-send-email-jasow...@redhat.com
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --onel
From: Thomas Huth
Since commit ab06ec43577177a442e8 we test the vmxnet3 device in the
pxe-tester, too (when running "make check SPEED=slow"). This now
revealed that the code is not working there if the host is a big
endian machine (for example ppc64 or s390x) - "make check SPEED=slow"
is now fail
From: Ed Swierk
The checksum algorithm used by IPv4, TCP and UDP allows a zero value
to be represented by either 0x and 0x. But per RFC 768, a zero
UDP checksum must be transmitted as 0x because 0x is a special
value meaning no checksum.
Substitute 0x whenever a checksum is c
From: Stefan Weil
Signed-off-by: Stefan Weil
Signed-off-by: Jason Wang
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ffd77b4..83434e0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1183,6 +1183,11 @@ M: Dmitry Fleytman
S: Maintained
From: Thomas Huth
Since commit 1865e288a823c764cd4344d ("Fix eepro100 simple transmission
mode"), the test/pxe-test is broken for the eepro100 device on big
endian hosts. However, it seems like that commit did not introduce the
problem, but just uncovered it: The EEPRO100State->tx.tbd_array_addr
This reverts commit 5e89dc01133f8f5e621f6b66b356c6f37d31dafb since:
- we should use ID in the spec instead the one used by OEM
- in the future, we should allow changing id through either property
or EEPROM file.
Cc: Stefan Weil
Cc: Michael Nawrocki
Cc: Peter Maydell
Cc: Michael S. Tsirkin
R
only basic functionality implemented (read time and sram).
no set time or alarms.
Signed-off-by: Michael Davidsaver
---
default-configs/ppc-softmmu.mak | 1 +
hw/timer/Makefile.objs | 1 +
hw/timer/ds1375-i2c.c | 293
3 files change
Signed-off-by: Michael Davidsaver
---
hw/ppc/Makefile.objs | 1 +
hw/ppc/mvme3100.c | 688 +
hw/ppc/mvme3100_cpld.c | 192 ++
3 files changed, 881 insertions(+)
create mode 100644 hw/ppc/mvme3100.c
create mode 100644 hw/ppc/mv
From: Mao Zhongyi
Cc: Peter Maydell
Cc: Jason Wang
Cc: Zhang Chen
Cc: Li Zhijian
Cc: Paolo Bonzini
Fixes: 8ec14402029d783720f4312ed8a925548e1dad61
Reported-by: Peter Maydell
Reported-by: Paolo Bonzini
Signed-off-by: Mao Zhongyi
Reviewed-by: Darren Kenny
Signed-off-by: Jason Wang
---
ne
Signed-off-by: Michael Davidsaver
---
hw/nvram/Makefile.objs | 1 +
hw/nvram/eeprom_at24c.c | 205
2 files changed, 206 insertions(+)
create mode 100644 hw/nvram/eeprom_at24c.c
diff --git a/hw/nvram/Makefile.objs b/hw/nvram/Makefile.objs
index
Exercise some features of the mvme3100 CPLD logic
and read from the eeprom w/ VPD.
Signed-off-by: Michael Davidsaver
---
tests/Makefile.include | 3 ++
tests/mvme3100-test.c | 79 ++
2 files changed, 82 insertions(+)
create mode 100644 tests/mvm
The following changes since commit 2e02083438962d26ef9dcc7100f3b378104183db:
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
(2017-11-17 19:08:07 +)
are available in the git repository at:
https://github.com/jasowang/qemu.git tags/net-pull-request
for you to
Add interface for testing i2c devices
with PPC e500.
Signed-off-by: Michael Davidsaver
---
tests/Makefile.include | 1 +
tests/libqos/i2c-e500.c | 66 +
tests/libqos/i2c.h | 3 +++
3 files changed, 70 insertions(+)
create mode 100644 tests
Signed-off-by: Michael Davidsaver
---
hw/ppc/e500.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 057be1751b..6f77844303 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -685,6 +685,8 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500Params
*para
This series adds simulation of MVME3100 powerpc SBCs, originally from Motorola,
and now sold by Artesyn[1]. There are two variants differing in CPU
speed and memory size.
I've been working on this sporadically for the past 2 year. Recently I've
finished all the features which I have in mind. If
Signed-off-by: Michael Davidsaver
---
hw/i2c/Makefile.objs | 1 +
hw/i2c/mpc8540_i2c.c | 287 +++
2 files changed, 288 insertions(+)
create mode 100644 hw/i2c/mpc8540_i2c.c
diff --git a/hw/i2c/Makefile.objs b/hw/i2c/Makefile.objs
index 0594dea3a
Signed-off-by: Michael Davidsaver
---
hw/pci-host/ppce500.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
index f2d108bc8a..0e2833bd98 100644
--- a/hw/pci-host/ppce500.c
+++ b/hw/pci-host/ppce500.c
@@ -424,6 +424,9 @@ static void e500_pcihost
Add CCSRBAR to allow CCSR region to be relocated.
Guest memory size introspection.
Dummy RAM error controls.
Guest clock introspection.
Signed-off-by: Michael Davidsaver
---
hw/ppc/e500.c | 2 ++
hw/ppc/e500.h | 1 +
hw/ppc/e500_ccsr.c | 72 +++
Signed-off-by: Michael Davidsaver
---
hw/ppc/e500.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 6f77844303..bef7d313d4 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -861,6 +861,14 @@ void ppce500_init(MachineState *machine, PPCE500Params
*p
allow board code to skip common NIC and guest image setup
and configure decrementor frequency.
Existing boards unchanged.
Signed-off-by: Michael Davidsaver
---
hw/ppc/e500.c | 8 ++--
hw/ppc/e500.h | 3 +++
hw/ppc/e500plat.c | 1 +
hw/ppc/mpc8544ds.c | 1 +
4 files changed, 11 ins
Signed-off-by: Jeff Cody
---
tests/qemu-iotests/200 | 99 ++
tests/qemu-iotests/200.out | 14 +++
tests/qemu-iotests/group | 1 +
3 files changed, 114 insertions(+)
create mode 100755 tests/qemu-iotests/200
create mode 100644 tests/qemu-iot
The previous patch fixed a race condition, in which there were
coroutines being executing doubly, or after coroutine deletion.
We can detect common scenarios when this happens, and print an error
and abort before we corrupt memory / data, or segfault.
This patch will abort if an attempt to enter
Add option to echo response to QMP / HMP command only on mismatch.
Useful for ignore all normal responses, but catching things like
segfaults.
Signed-off-by: Jeff Cody
---
tests/qemu-iotests/common.qemu | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/tests/qemu-iotest
When block_job_sleep_ns() is called, the co-routine is scheduled for
future execution. If we allow the job to be re-entered prior to the
scheduled time, we present a race condition in which a coroutine can be
entered recursively, or even entered after the coroutine is deleted.
The job->busy flag
Once a coroutine is "sleeping", the timer callback will either enter the
coroutine, or schedule it for the next AioContext if using iothreads.
It is illegal to enter that coroutine while waiting for this timer
event and subsequent callback. This patch will catch such an attempt,
and abort QEMU wi
This series fixes a race condition segfault when using iothreads with
blockjobs.
The qemu iotest in this series is a reproducer, as is the reproducer
script attached in this bug report:
https://bugzilla.redhat.com/show_bug.cgi?id=1508708
There are two additional patches to try and catch this sor
On 11/11/17 12:10, Alexey Kardashevskiy wrote:
> On 11/11/17 01:22, Daniel P. Berrange wrote:
>> On Sat, Nov 11, 2017 at 12:46:36AM +1100, Alexey Kardashevskiy wrote:
>>> On 10/11/17 21:41, Daniel P. Berrange wrote:
On Fri, Nov 10, 2017 at 09:35:54PM +1100, Alexey Kardashevskiy wrote:
> On
On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
> Following on from the previous commit, we can also do the same with
> with legacy OBIO interrupts in pci_pbmA_map_irq().
>
> Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/pci-host/apb.c |4 ++--
> i
Hi Mark,
On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
> This enables us to remove the static array mapping in the ISA IRQ
> handler (and the embedded reference to the APB device) by formalising
> the interrupt wiring via the qdev GPIO API.
>
> For more clarity we replace the APB OBIO interrupt
On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
> This enables us to remove these parameters from pci_apb_init().
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/pci-host/apb.c | 14 +-
> hw/sparc64/sun4u.c|5 -
> include/hw/pci-host/apb.h |5 +++--
> 3 f
On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
> This also includes the related IOMMUState typedef and defines.
>
> Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/pci-host/apb.c | 85
> include/hw/pci-host
On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
> Use DeviceClass rather than SysBusDeviceClass in pbm_host_class_init() and
> adjust pci_pbm_init_device() accordingly.
>
> Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/pci-host/apb.c | 17 -
>
On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
> This belongs in the PCI-ISA bridge rather than at the machine level.
nice, this helps me in another series (clean out i386/pc, refactor
superio devices).
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/sparc64/sun4u.c | 78
> +
On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
> This is initialisation that should really take place in the ebus realize
> function. As part of this we also rework the ebus IRQ mapping so that
> instead of having to pass in the array of pbm_irqs, we obtain a reference
> to them by looking up the
Hi Mark,
On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
> This is in preparation for switching code in hw/sparc64 from DPRINTF over to
> trace events.
This could be squashed with next commit,
Either way:
Reviewed-by: Philippe Mathieu-Daudé
>
> Signed-off-by: Mark Cave-Ayland
> ---
> Makefi
On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
> Since the EBus is effectively a PCI-ISA bridge then the underlying ISA bus
> should be contained within the PCI bridge itself.
>
> Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/sparc64/sun4u.c |7 +--
>
On Fri, Nov 17, 2017 at 06:42:25PM -0200, Daniel Henrique Barboza wrote:
>
>
> On 11/17/2017 04:19 PM, Michael Roth wrote:
> > Quoting Daniel Henrique Barboza (2017-11-17 10:21:27)
> > >
> > > On 11/17/2017 10:56 AM, Greg Kurz wrote:
> > > > A DRC with a pending unplug request releases its assoc
On Tue, Nov 14, 2017 at 08:59:43AM +0100, Greg Kurz wrote:
> On Tue, 7 Nov 2017 06:04:55 +1100
> David Gibson wrote:
>
> > On Mon, Nov 06, 2017 at 04:03:07PM +0100, Greg Kurz wrote:
> > > On Tue, 17 Oct 2017 17:16:09 +1100
> > > David Gibson wrote:
> > >
> > > > On Mon, Oct 16, 2017 at 10:26:
On Fri, Nov 17, 2017 at 01:56:48PM +0100, Greg Kurz wrote:
> A DRC with a pending unplug request releases its associated device at
> machine reset time.
>
> In the case of LMB, when all DRCs for a DIMM device have been reset,
> the DIMM gets unplugged, causing guest memory to disappear. This may
>
On 19 November 2017 at 22:42, Eduardo Habkost wrote:
> Hi,
>
> I've noticed that README, MAINTAINERS .gitmodules, and other
> files in qemu.git are pointing to qemu-project.org, while the
> QEMU web site and other files in qemu.git are pointing to
> qemu.org.
>
> I assume that the situation mentio
Hi,
I've noticed that README, MAINTAINERS .gitmodules, and other
files in qemu.git are pointing to qemu-project.org, while the
QEMU web site and other files in qemu.git are pointing to
qemu.org.
I assume that the situation mentioned in commit
8593898109 ("Use qemu-project.org domain name") has im
On Fri, Nov 17, 2017 at 05:03:27PM +0800, Yu Ning wrote:
> On 11/17/2017 2:00, Eduardo Habkost wrote:
> > On Thu, Nov 16, 2017 at 07:47:44AM +0100, Stefan Weil wrote:
> > > Am 16.11.2017 um 07:50 schrieb yu.n...@linux.intel.com:
> > > > From: Yu Ning
> > > >
> > > > hax-interface.h defines the in
I just updated to the latest build and applied this patch set, now on VM
reset the qemu crashes with the following assert:
ivshmem.c:467: ivshmem_add_kvm_msi_virq: Assertion
`!s->msi_vectors[vector].pdev' failed.
On 2017-11-15 18:31, Ladi Prosek wrote:
Fixes bugs in the ivshmem device implem
On Sat, Nov 18, 2017 at 05:22:28AM +, Wang, Wei W wrote:
> On Friday, November 17, 2017 8:45 PM, Michael S. Tsirkin wrote:
> > On Fri, Nov 17, 2017 at 07:35:03PM +0800, Wei Wang wrote:
> > > On 11/16/2017 09:27 PM, Wei Wang wrote:
> > > > On 11/16/2017 04:32 AM, Michael S. Tsirkin wrote:
> > >
Hello,
I am using Qemu to emulate a Leon3 based board.
In the software I am running on Qemu, I configured the virtual memory
through MMU programming.
In particular, I mapped the built-in UART to a 4K page.
To check that my MMU table was OK I switched on (at compile time) the
DEBUG_MMU facil
On 17/11/17 14:33, Artyom Tarasenko wrote:
> On Fri, Nov 17, 2017 at 2:42 PM, Mark Cave-Ayland
> wrote:
>> After the previous refactoring it is now possible to use separate functions
>> to improve clarity of the interrupt paths. Similarly by checking the PCI
>> devnfn to identify busA during apb_
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