On 2017-10-18 17:50, Ladi Prosek wrote:
On Wed, Oct 18, 2017 at 7:50 AM, wrote:
On 2017-10-18 16:31, Ladi Prosek wrote:
Hi Geoff,
On Mon, Oct 16, 2017 at 8:31 PM, wrote:
Hi Yan & Ladi.
I have written an initial implementation that supports just the
shared
memory
mapping at this time.
On Wed, Oct 18, 2017 at 7:50 AM, wrote:
> On 2017-10-18 16:31, Ladi Prosek wrote:
>>
>> Hi Geoff,
>>
>> On Mon, Oct 16, 2017 at 8:31 PM, wrote:
>>>
>>> Hi Yan & Ladi.
>>>
>>> I have written an initial implementation that supports just the shared
>>> memory
>>> mapping at this time. I plan to ad
Hi,
> This is still missing proper handling for VMState-migration, which I
> will need a bit of assistance with.
See attachment. It adds a bool to the state and a property to turn
on/off the timer. It also adds a vmstate subsection, which will only
saved in case the timer is in use. Also ext
On Tue, 10/17 11:56, Peter Xu wrote:
> I don't sure I know the reason. Anyway, it originated from one of
> Fam's request for some NVMe testsr
FWIW, I was basically trying to test a driver code under development with 48bit
vIOMMU. I ended up using real hardware and also made the code compatible wi
On Mon, Oct 16, 2017 at 01:58:59PM +0200, Paolo Bonzini wrote:
> On 16/10/2017 12:20, Xiao Guangrong wrote:
> >
> >> Qemu does not need pin NVDIMM memory for VFIO device during VFIO
> >> hotplug, what's more, if there is no NVDIMM hw in the test machine,
> >> the VFIO hotplug operation will need a
On 2017-10-18 16:31, Ladi Prosek wrote:
Hi Geoff,
On Mon, Oct 16, 2017 at 8:31 PM, wrote:
Hi Yan & Ladi.
I have written an initial implementation that supports just the shared
memory
mapping at this time. I plan to add events also but before I go
further I
would
like some feedback if possi
Hi,
> +if [ "$capstone_internal" = "yes" ]; then
> + echo "config-host.h: subdir-capstone" >> $config_host_mak
> +fi
I think this isn't going to work correctly. In case both capstone and
dtc are used we need a single line with the dependencies, i.e.
config-host.h: subdir-dtc subdir-capston
On Mon, Oct 16, 2017 at 06:20:32PM +0800, Xiao Guangrong wrote:
>
>
> On 10/16/2017 04:56 PM, Yang Zhong wrote:
> >Qemu does not need pin NVDIMM memory for VFIO device during VFIO
> >hotplug, what's more, if there is no NVDIMM hw in the test machine,
> >the VFIO hotplug operation will need at lea
Hi Geoff,
On Mon, Oct 16, 2017 at 8:31 PM, wrote:
> Hi Yan & Ladi.
>
> I have written an initial implementation that supports just the shared
> memory
> mapping at this time. I plan to add events also but before I go further I
> would
> like some feedback if possible on what I have implemented t
On Tue, Oct 17, 2017 at 09:49:14PM +0200, Greg Kurz wrote:
> While trying to make KVM PR usable again, commit 5dfaa532ae introduced a
> regression: the current compat_pvr value is passed to KVM instead of the
> new one. This means that we always pass 0 instead of the max-cpu-compat
> PVR during the
On Mon, Oct 16, 2017 at 06:22:52PM +0200, Igor Mammedov wrote:
> it will allow to reuse parse_NumaOptions() for parsing
> configuration commands received via QMP interface
>
> Signed-off-by: Igor Mammedov
Revieed-by: David Gibson
> ---
> include/sysemu/numa.h | 1 +
> numa.c|
On 10/17/2017 09:15 PM, Emilio G. Cota wrote:
> On Mon, Oct 16, 2017 at 10:25:42 -0700, Richard Henderson wrote:
>> ---
>> accel/tcg/cpu-exec.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
>> index 39ec9508d1..99f1d519c
On Mon, Oct 16, 2017 at 10:26:05 -0700, Richard Henderson wrote:
> From: "Emilio G. Cota"
(snip)
> Suggested-by: Richard Henderson
> Signed-off-by: Emilio G. Cota
>
> Signed-off-by: Richard Henderson
>
> Signed-off-by: Richard Henderson
Note the double Sob tag.
Also, does this still break
On Mon, Oct 16, 2017 at 10:25:44 -0700, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
Does this patch work with icount for you? On my end, aarch64
stops booting with -icount 1.
E.
On 10/17/2017 03:16 PM, Emilio G. Cota wrote:
> On Mon, Oct 16, 2017 at 10:25:33 -0700, Richard Henderson wrote:
>> From: Richard Henderson
>>
>> While we're touching many of the lines anyway, adjust the naming
>> of the functions to better distinguish when "TCGArg" vs "TCGTemp"
>> should be used.
On 10/17/2017 03:03 PM, Emilio G. Cota wrote:
> On Mon, Oct 16, 2017 at 10:25:29 -0700, Richard Henderson wrote:
>> From: Richard Henderson
>>
>> Copy s->nb_globals or s->nb_temps to a local variable for the purposes
>> of iteration. This should allow the compiler to use low-overhead
>> looping c
On Wed, Oct 04, 2017 at 12:39:28PM +0200, Juan Quintela wrote:
[...]
> +/* A simple PC boot sector that modifies memory (1-100MB) quickly
> + * outputing a 'B' every so often if it's still running.
> + */
> +unsigned char bootsect[] = {
> + 0xfa, 0x0f, 0x01, 0x16, 0x74, 0x7c, 0x66, 0xb8, 0x01, 0
On 10/17/2017 05:00 PM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> v2: add spaces for checkpatch...
>
> ERROR: spaces required around that '*' (ctx:VxV)
> #82: FILE: hw/alpha/typhoon.c:880:
> +create_unimplemented_device("pci0-io", 0x801fc00ULL, 32*MB);
On Fri, Sep 08, 2017 at 10:48:10AM -0500, Brijesh Singh wrote:
> > > > 11. GO verifies the measurement and if measurement matches then it
> > > may
> > > > give a secret blob -- which must be injected into the guest before
> > > > libvirt starts the VM. If verification failed, GO
On Mon, Oct 16, 2017 at 10:25:42 -0700, Richard Henderson wrote:
> ---
> accel/tcg/cpu-exec.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
> index 39ec9508d1..99f1d519c5 100644
> --- a/accel/tcg/cpu-exec.c
> +++ b/accel/t
On Mon, Oct 16, 2017 at 10:25:40 -0700, Richard Henderson wrote:
> This limits the indexing into tcg_ctx.temps to initial
> opcode generation time.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Emilio G. Cota
E.
On Mon, Oct 16, 2017 at 10:25:19 -0700, Richard Henderson wrote:
>Thus, an extra 20 patches in the patch set rearranging how temps
>are referenced within the TCG backend. Some of them have appeared
>on the list before, but it would have been last November.
I remember seeing these on t
Hi all,
It seems that a month has passed
So, Ping...
Thanks,
dou.
At 09/21/2017 05:23 PM, Dou Liyang wrote:
Linux and Windows need ACPI SRAT table to make memory hotplug work properly,
however currently QEMU doesn't create SRAT table if numa options aren't present
on CLI.
Which break
At 10/18/2017 11:48 AM, Dou Liyang wrote:
As QEMU supports the memory-less node, it is possible that there is
no RAM in the first numa node(also be called as node0). eg:
... \
-m 128,slots=3,maxmem=1G \
-numa node -numa node,mem=128M \
But, this makes it hard for QEMU to build a known-to-
As QEMU supports the memory-less node, it is possible that there is
no RAM in the first numa node(also be called as node0). eg:
... \
-m 128,slots=3,maxmem=1G \
-numa node -numa node,mem=128M \
But, this makes it hard for QEMU to build a known-to-work ACPI SRAT
table. Only fixing it is not e
On Tue, Oct 17, 2017 at 12:31:55PM -0400, Jeff Cody wrote:
> This adds support for running qemu-iotests in an arbitrary number
> of sub-processes, so that tests can be run in parallel.
>
> This necessarily changes the output format, although it should still
> be familiar. If you run in a single t
Fixed incorrect frame size mask, validated maximum frame
size in spi_write and removed dead code.
Signed-off-by: Subbaraya Sundeep
---
v2:
else if -> else in set_fifodepth
log guest error when frame size is more than 32
hw/ssi/mss-spi.c | 12
1 file changed, 8 inser
On Wed, Oct 11, 2017 at 08:13:13PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Wait for a semaphore before completing the migration,
> if the previously added capability was enabled.
>
> Signed-off-by: Dr. David Alan Gilbert
> ---
> migration/migration.c | 4
Hi Peter,
On Wed, Oct 18, 2017 at 8:45 AM, sundeep subbaraya
wrote:
> Hi Peter,
>
> On Tue, Oct 17, 2017 at 8:58 PM, Peter Maydell
> wrote:
>
>> On 16 October 2017 at 18:54, Subbaraya Sundeep
>> wrote:
>> > Fixed incorrect frame size mask, validated maximum frame
>> > size in spi_write and rem
Hi Peter,
On Tue, Oct 17, 2017 at 8:58 PM, Peter Maydell
wrote:
> On 16 October 2017 at 18:54, Subbaraya Sundeep
> wrote:
> > Fixed incorrect frame size mask, validated maximum frame
> > size in spi_write and removed dead code.
> >
> > Signed-off-by: Subbaraya Sundeep
> > ---
> > hw/ssi/mss-s
On Tue, Oct 17, 2017 at 08:03:56PM -0500, Eric Blake wrote:
> On 10/17/2017 11:31 AM, Jeff Cody wrote:
> > Currently, not all qemu-iotests work if TEST_DIR has spaces, and they
> > also might not be safe. Refuse to run if TEST_DIR in this case, at
> > least until all tests are fixed sometime in th
On 10/17/2017 11:31 AM, Jeff Cody wrote:
> For bash tests, this allows 'check' to reap all launch protocol
> servers / processes, after a test has finished running.
Nice stuff!
>
> Signed-off-by: Jeff Cody
> ---
> tests/qemu-iotests/check | 13 +++
> tests/qemu-iotests/common.rc | 93
On 10/17/2017 11:31 AM, Jeff Cody wrote:
> Currently, not all qemu-iotests work if TEST_DIR has spaces, and they
> also might not be safe. Refuse to run if TEST_DIR in this case, at
> least until all tests are fixed sometime in the future.
>
> Signed-off-by: Jeff Cody
> ---
> tests/qemu-iotests
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20171017225025.25451-1-f4...@amsat.org
Subject: [Qemu-devel] [PATCH] hw/alpha/typhoon: simplify using the
"unimplemented" sysbus device
=== TEST SCRIPT BEGIN ===
#!/bin/bash
On a successful address translation instruction, PAR is supposed to
contain cacheability and shareability attributes determined by the
translation. Previous versions of QEMU returned 0 for these bits (in
line with the general strategy of ignoring caches and memory
attributes), but some guests may d
Advertise the presence of the GIC system register interface (1<<24)
according to H9.248 of the ARM ARM.
This patch allows Xen to boot on QEMU aarch64.
Signed-off-by: Stefano Stabellini
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 670c07a..a451763 100644
--- a/target/arm/cpu64.c
++
Signed-off-by: Philippe Mathieu-Daudé
---
v2: add spaces for checkpatch...
ERROR: spaces required around that '*' (ctx:VxV)
#82: FILE: hw/alpha/typhoon.c:880:
+create_unimplemented_device("pci0-io", 0x801fc00ULL, 32*MB);
^
to
On Mon, Oct 16, 2017 at 10:25:39 -0700, Richard Henderson wrote:
> Move target cpu tcg initialization to common code,
> called from cpu_exec_realizefn.
>
> Cc: Andreas Färber
> Signed-off-by: Richard Henderson
Much cleaner!
Reviewed-by: Emilio G. Cota
E.
On Tue, Oct 17, 2017 at 7:31 PM, Alistair Francis
wrote:
> The BCM2836 uses a Cortex-A7 not a Cortex-A15. Update the device to use
> the correct CPU.
> https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf
>
> Signed-off-by: Alistair Francis
Reviewed-by: Philippe
On Mon, Oct 16, 2017 at 10:25:38 -0700, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target/alpha/cpu.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
> index b8a21f4e01..b52ebd7356 100644
> --- a/target/
On Mon, Oct 16, 2017 at 10:25:37 -0700, Richard Henderson wrote:
> Since we cast indicies to pointers, reserving 0 allows
s/indicies/indices/
> us to use NULL for unused/dummy instead of (T *)-1.
>
> Signed-off-by: Richard Henderson
> ---
(snip)
> @@ -737,7 +737,7 @@ extern bool parallel_cpus;
The problem is with virtio-mmio.
https://bugzilla.redhat.com/show_bug.cgi?id=1422413
Instances launched with virtio-mmio on aarch64 will not get DHCP (will
not have a nic)
xml with libvirt 2.5.0
I have updated libvirt-daemon to 3.6.0 on a particul
On Mon, Oct 16, 2017 at 10:25:36 -0700, Richard Henderson wrote:
> For multi-threaded tcg we have one TCGContext per thread. With that,
> plus static cpu_* variables, we need the translators to handle indicies.
s/indicies/indices/
> We transform those to "arguments" at opcode generating time.
>
Signed-off-by: Philippe Mathieu-Daudé
---
hw/alpha/alpha_sys.h | 1 -
hw/alpha/pci.c | 26 --
hw/alpha/typhoon.c | 6 ++
3 files changed, 2 insertions(+), 31 deletions(-)
diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h
index b6d8369ed7..9e67f78c60 1
List all possible valid CPU options.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
---
V3:
- Make variable static
V2:
- Fixup alignment
hw/arm/xilinx_zynq.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 1836
List all possible valid CPU options.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
---
V3:
- Add static property
V2:
- Fix the indentation
hw/arm/raspi.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 5941c9f751..d64e80
List all possible valid CPU options.
Signed-off-by: Alistair Francis
---
An implementation for single CPU machines is still being discussed. A
solution proposed by Eduardo is this:
1) Change the default on TYPE_MACHINE to:
mc->valid_cpu_types = { TYPE_CPU, NULL };
This will keep the ex
The BCM2836 uses a Cortex-A7 not a Cortex-A15. Update the device to use
the correct CPU.
https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf
Signed-off-by: Alistair Francis
---
V3:
- Use ARM_CPU_TYPE_NAME() macro
V2:
- Fix the BCM2836 CPU
hw/arm/bcm2836.c | 2
List all possible valid CPU options.
Although the board only ever has a Cortex-M3 we mark the Cortex-M4 as
supported because the Netduino2 Plus supports the Cortex-M4 and the
Netduino2 Plus is similar to the Netduino2.
Signed-off-by: Alistair Francis
Reviewed-by: Eduardo Habkost
Reviewed-by: Ph
There are numorous QEMU machines that only have a single or a handful of
valid CPU options. To simplyfy the management of specificying which CPU
is/isn't valid let's create a property that can be set in the machine
init. We can then check to see if the user supplied CPU is in that list
or not.
I h
On Mon, Oct 16, 2017 at 10:25:35 -0700, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
Reviewed-by: Emilio G. Cota
E.
On Mon, Oct 16, 2017 at 10:25:34 -0700, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
Reviewed-by: Emilio G. Cota
E.
On Mon, Oct 16, 2017 at 10:25:33 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> While we're touching many of the lines anyway, adjust the naming
> of the functions to better distinguish when "TCGArg" vs "TCGTemp"
> should be used.
>
> Signed-off-by: Richard Henderson
(snip)
> -st
On Mon, Oct 16, 2017 at 10:25:32 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> At the same time, drop the TCGContext argument and use tcg_ctx instead.
>
> Signed-off-by: Richard Henderson
As I said earlier I'd combine this with the temp_arg patch.
But even without that change:
On Mon, Oct 16, 2017 at 10:25:31 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> Reviewed-by: Alex Bennée
> Signed-off-by: Richard Henderson
Reviewed-by: Emilio G. Cota
E.
On Mon, Oct 16, 2017 at 10:25:30 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> Signed-off-by: Richard Henderson
Reviewed-by: Emilio G. Cota
E.
On Mon, Oct 16, 2017 at 10:25:29 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> Copy s->nb_globals or s->nb_temps to a local variable for the purposes
> of iteration. This should allow the compiler to use low-overhead
> looping constructs on some hosts.
>
> Reviewed-by: Alex Benn
On Mon, Oct 16, 2017 at 10:25:28 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> This avoids having to allocate external memory for each temporary.
>
> Signed-off-by: Richard Henderson
> ---
Unfortunately, this patch undoes the small perf gains we made so far in
this series.
We
On 10/17/2017 10:16 AM, Kevin Wolf wrote:
> Am 17.10.2017 um 17:11 hat Kevin Wolf geschrieben:
>> This changes test case 191 to include a backing image that has
>> backing_fmt set in the image file, but is referenced by node name in the
>> qemu command line.
>>
>> Signed-off-by: Kevin Wolf
>> ---
On 10/12/2017 09:14 AM, Peter Krempa wrote:
> When refering to a backing file of an image via node name
s/refering/referring/ (here and in the subject)
> bdrv_open_backing_file would add the 'driver' option to the option list
> filling it with the backing format driver. This breaks construction o
On 10/17/2017 07:57 AM, Vladimir Sementsov-Ogievskiy wrote:
> Minimal implementation: for structured error only error_report error
> message.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
>
>
> RFC: I don't like resulting error handling: it is rather confusing,
> requires a lot of
On Mon, Oct 16, 2017 at 10:25:27 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> Signed-off-by: Richard Henderson
Reviewed-by: Emilio G. Cota
I'd consider combining this patch with the "Export temp_idx" one.
E.
On Mon, Oct 16, 2017 at 10:25:26 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> Signed-off-by: Richard Henderson
> ---
> tcg/tcg.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tcg/tcg.h b/tcg/tcg.h
> index fc4d1ed58b..5fcdec1fc5 100644
> --- a/tcg/tcg
On Mon, Oct 16, 2017 at 10:25:24 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> Reviewed-by: Alex Bennée
> Signed-off-by: Richard Henderson
Reviewed-by: Emilio G. Cota
E.
On Mon, Oct 16, 2017 at 10:25:25 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> This avoids needing to test the index of a temp against nb_globals.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Emilio G. Cota
E.
On Mon, Oct 16, 2017 at 10:25:23 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> Reviewed-by: Alex Bennée
> Signed-off-by: Richard Henderson
Reviewed-by: Emilio G. Cota
E.
On 10/17/2017 01:28 PM, Emilio G. Cota wrote:
>> -TCGArg * const args = op->args;
>
> Reviewed-by: Emilio G. Cota
>
> Just for my own education: why doesn't gcc generate the same code when
> leaving 'args' as above? I thought we could simplify the diff without
> any side effects, but it
On Mon, Oct 16, 2017 at 10:25:22 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> Reviewed-by: Alex Bennée
> Signed-off-by: Richard Henderson
Reviewed-by: Emilio G. Cota
E.
On Mon, Oct 16, 2017 at 10:25:21 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> Reviewed-by: Alex Bennée
> Signed-off-by: Richard Henderson
> ---
> tcg/optimize.c | 430
> ++---
(snip)
> @@ -559,7 +557,7 @@ static bool swap_com
On Mon, Oct 16, 2017 at 10:25:20 -0700, Richard Henderson wrote:
> From: Richard Henderson
>
> Rather than have a separate buffer of 10*max_ops entries,
> give each opcode 10 entries. The result is actually a bit
> smaller and should have slightly more cache locality.
>
> Signed-off-by: Richard
On Oct 17 16:09, Peter Maydell wrote:
> On 30 September 2017 at 03:08, Aaron Lindsay wrote:
> > The ARM PMU implementation currently contains a basic cycle counter, but it
> > is
> > often useful to gather counts of other events and filter them based on
> > execution mode. These patches flesh out
While trying to make KVM PR usable again, commit 5dfaa532ae introduced a
regression: the current compat_pvr value is passed to KVM instead of the
new one. This means that we always pass 0 instead of the max-cpu-compat
PVR during the initial machine reset. And at CAS time, we either pass
the PVR fro
On Oct 17 15:57, Peter Maydell wrote:
> On 30 September 2017 at 03:08, Aaron Lindsay wrote:
> > The pmu_counter_filtered and pmu_sync functions are generic (as opposed
> > to PMCCNTR-specific) to allow for the implementation of other events.
> >
> > RFC: I know that many of the locations of the ca
On Tue, Oct 17, 2017 at 11:35:14AM +0100, Alex Bennée wrote:
> This adds the -dfilter support to linux-user. There is a minor
> checkpatch complaint about formatting which I've ignored for aesthetic
> reasons.
Applied to linux-user, thanks
> Signed-off-by: Alex Bennée
> Reviewed-by: Laurent Viv
On Sun, Oct 1, 2017 at 7:06 AM, Thomas Huth wrote:
> On 30.09.2017 02:15, Alistair Francis wrote:
>> Replace a large number of the fprintf(stderr, "*\n" calls with
>> error_report(). The functions were renamed with these commands and then
>> compiler issues where manually fixed.
> [...]
>> diff --
On 10/17/2017 02:36 PM, Thomas Huth wrote:
On 17.10.2017 18:27, Daniel Henrique Barboza wrote:
On 10/17/2017 11:32 AM, Thomas Huth wrote:
So far the CPU hot-plug qtest was only checking "cpu-add" on x86. With
these patches, we now test "device_add" for hot-plugging CPUs on x86,
and enable th
You shouldn't need to read the MIDR at all.
There are two sensible strategies for software I think:
(1) trust the architectural statement that v8 implies that the AIFSR
and ADFSR both exist -- AIUI both QEMU and the hardware implementations
that report 0001 in this MMFR0 field do actually implem
Add the PMU IO Module Interrupt controller device.
Signed-off-by: Alistair Francis
---
default-configs/microblaze-softmmu.mak | 1 +
hw/intc/Makefile.objs | 1 +
hw/intc/xlnx-pmu-iomod-intc.c | 554 +
include/hw/intc/xlnx-pmu-iomod-i
On Wed, Oct 11, 2017 at 6:23 AM, Laurent Vivier wrote:
> Le 26/09/2017 à 01:19, Carlo Marcelo Arenas Belón a écrit :
>> remove unnecessary sock_type enum and other unused surrounding code to
>> allow for per arch sockbits to mirror better linux headers for maintenance
>>
>> Signed-off-by: Carlo Ma
Signed-off-by: Alistair Francis
---
hw/microblaze/xlnx-zynqmp-pmu.c | 24
1 file changed, 24 insertions(+)
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index c6a0b3b8a1..828eeedc9f 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/m
This is the initial version of the Inter Processor Interrupt device.
Signed-off-by: Alistair Francis
---
hw/intc/Makefile.objs | 1 +
hw/intc/xlnx-zynqmp-ipi.c | 377 ++
include/hw/intc/xlnx-zynqmp-ipi.h | 57 ++
3 files changed, 43
In preperation for having an ARM and MicroBlaze ZynqMP machine let's
split out the current ARM specific config options.
Signed-off-by: Alistair Francis
Acked-by: Peter Maydell
---
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/Makefile.objs| 2 +-
hw/display/Makefile.objs
Connect the MicroBlaze CPU and the ROM and RAM memory regions.
Signed-off-by: Alistair Francis
---
V4:
- Remove the ZCU102 name
V2:
- Fix the pmu-cpu name
- Use err and errp for CPU realise instead of error_fatal
hw/microblaze/xlnx-zynqmp-pmu.c | 70 +++--
Signed-off-by: Alistair Francis
---
V4:
- Move the IPI to the machine instead of the SoC
hw/microblaze/xlnx-zynqmp-pmu.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index 828eeedc9f..14b8e
The Xilinx ZynqMP SoC has two main processing systems in it. The ARM
processing system (which is already modeled in QEMU) and the MicroBlaze
Power Management Unit (PMU). This is the inital work for adding support
for the PMU.
The PMU susbsystem runs along side the ARM system on hardware, but due
t
This series adds the ZynqMP Power Management Unit (PMU) machine with basic
functionality.
The machine only has the
- CPU
- Memory
- Interrupt controller
- IPI device
connected, but that is enough to run some of the ROM and firmware
code on the machine
The series also adds the IPI device and
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 150824572545.6816.5099701189660002212.st...@misha-pc.lan02.inno
Subject: [Qemu-devel] [PATCH v2 00/43] Windbg supporting
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
---
hw/char/debugcon.c | 1 -
hw/intc/lm32_pic.c | 1 -
hw/moxie/moxiesim.c | 1 -
hw/sparc/sun4m.c| 1 -
hw/watchdog/wdt_ib700.c | 1 -
5 files changed, 5 deletions(-)
diff --git a/hw/char/debugcon.c b/hw/char
It's a x86-only device, so it does not make sense to keep it
in the shared misc folder.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/{misc => i386}/vmport.c | 0
hw/i386/Makefile.objs | 1 +
hw/misc/Makefile.objs | 2 --
3 files changed, 1 insertion(+), 2 deletions(-)
rename hw/{misc
On 10/14/2017 10:45 AM, Fam Zheng wrote:
On Fri, 10/13 15:20, Guilherme Moro wrote:
Hi,
I'm trying to convert some images from raw to vmdk to run in a ESXi6.5
server but I need to rectify the image before being able to run.
The scenario goes like that:
qemu-img convert -f raw image.raw -O vmd
On 10/17/2017 10:32 AM, Thomas Huth wrote:
> The test will be extended to work on other architectures, too, so let's
> use a more generic name for the file and the functions in here first.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
> ---
> tests/Makefile.include
and remove the old i386/pc dependency.
Signed-off-by: Philippe Mathieu-Daudé
---
no MAINTAINERS entry, does this belong to "PC Chipset"?
include/hw/i386/pc.h | 3 ---
include/hw/misc/pvpanic.h | 21 +
hw/i386/acpi-build.c | 2 +-
hw/misc/pvpanic.c | 9 ++
On 10/17/2017 05:17 AM, Paolo Bonzini wrote:
> Aligned 8-byte memory writes by a 64-bit target on a 64-bit host should
> always turn into atomic 8-byte writes on the host, however a write
> write watchpoint would end up tearing the 8-byte write into two 4-byte
> writes in access_with_adjusted_size(
On 13 October 2017 at 15:28, Cédric Le Goater wrote:
> Specs are available here :
>
> https://www.nxp.com/docs/en/data-sheet/PCA9552.pdf
>
> This is a simple model supporting the basic registers for led and GPIO
> mode. The device also supports two blinking rates but not the model
> yet.
>
> Sig
enable_tco is specific to i386/pc.
Suggested-by: Paolo Bonzini
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/acpi/ich9.h | 2 ++
include/hw/i386/pc.h | 2 --
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index a352c94fde.
and remove the old i386/pc dependency.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/display/vga.h | 25 +
include/hw/i386/pc.h | 12
hw/display/vga-isa-mm.c | 3 +--
hw/display/vga-isa.c | 2 +-
hw/display/vga.c | 2 +-
hw/mips/mip
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
---
hw/i2c/pm_smbus.c | 1 -
hw/i2c/smbus_ich9.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c
index 6fc3923f56..a044dd1b27 100644
--- a/hw/i2c/pm_smbus.c
+++ b/hw/i2c/pm_smbus.c
@@ -19,
- add "hw/net/ne2000-isa.h"
- remove the old i386 dependency
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Hervé Poussineau
Acked-by: David Gibson
---
hw/net/ne2000.h | 3 +++
include/hw/i386/pc.h| 20
include/hw/net/ne2000-isa.h | 33
Signed-off-by: Philippe Mathieu-Daudé
---
hw/display/{vga.h => vga_regs.h} | 0
hw/display/vga.c | 2 +-
2 files changed, 1 insertion(+), 1 deletion(-)
rename hw/display/{vga.h => vga_regs.h} (100%)
diff --git a/hw/display/vga.h b/hw/display/vga_regs.h
similarity index 100%
rena
It's a x86-only device, so it does not make sense to keep it
in the shared misc folder.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/{input => i386}/vmmouse.c | 0
hw/i386/Makefile.objs| 1 +
hw/input/Makefile.objs | 1 -
3 files changed, 1 insertion(+), 1 deletion(-)
rename hw/{i
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