On Wed, 2017-09-20 at 16:50 +0200, David Hildenbrand wrote:
> pflash toggles mr->romd_mode. So this assert does not always hold.
>
> 1) a device was added with !mr->romd_mode, therefore effectively not
> creating a kvm slot as we want to trap every access (add = false).
> 2) mr->romd_mode was t
On 13/09/17 14:03, Artyom Tarasenko wrote:
> Looks good to me, but networking is not my domain, so can only give Acked-by.
>
> Dmitry, Jason can you please take a look at it?
>
> Regards,
> Artyom
No further comments, so applied to my qemu-sparc branch.
ATB,
Mark.
On 13/09/17 13:54, Artyom Tarasenko wrote:
> On Fri, Sep 8, 2017 at 3:58 PM, Mark Cave-Ayland
> wrote:
>> Signed-off-by: Mark Cave-Ayland
>
> Reviewed-by: Artyom Tarasenko
Applied to my qemu-sparc branch.
ATB,
Mark.
We had a per-chardev cache for context, then we don't need this
parameter to be passed in every time when chr_update_read_handler()
called. As long as we are calling chr_update_read_handler() using
qemu_chr_be_update_read_handlers() we'll be fine.
Signed-off-by: Peter Xu
---
chardev/char-fd.c
It was only passed in by chr_update_read_handlers(). However when
reconnect, we'll lose that context information. So if a chardev was
running on another context (rather than the default context, the NULL
pointer), it'll switch back to the default context if reconnection
happens. But, it should r
It caches the gcontext that is used to poll the chardev IO. Before this
patch, we only passed it in via chr_update_read_handlers(). However
that may not be enough if the char backend is disconnected and
reconnected afterward. There are chardev codes that still assumed the
context be NULL (which
Add a wrapper for the chr_update_read_handler().
Signed-off-by: Peter Xu
---
chardev/char-fe.c | 7 ++-
chardev/char.c | 10 ++
include/chardev/char.h | 10 ++
3 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/chardev/char-fe.c b/chardev/char-fe.c
The old chardev may not fully support non-default GMainContext. One
direct clue is that when we call io_add_watch_poll() sometimes we are
still passing in the NULL context pointer.
IIUC we are fine during setup since the context will be passed
correctly during setup via chr_update_read_handler().
Hi,
Any update?
Thanks,
Zhang Haoyu
On 2016/8/30 12:11, Lai Jiangshan wrote:
> On Wed, Aug 10, 2016 at 5:03 PM, Juan Quintela wrote:
>> Lai Jiangshan wrote:
>>
>> Hi
>>
>> First of all, I like a lot the patchset, but I would preffer to split it
>> to find "possible" bugs along the lines, espec
On Thu, Sep 21, 2017 at 09:24:46AM +0530, Nikunj A Dadhania wrote:
> David Gibson writes:
>
> > On Wed, Sep 20, 2017 at 12:48:55PM +0530, Nikunj A Dadhania wrote:
> >> David Gibson writes:
> >>
> >> > On Wed, Sep 20, 2017 at 12:10:48PM +0530, Nikunj A Dadhania wrote:
> >> >> David Gibson write
On Wed, Sep 20, 2017 at 11:21:47PM -0700, no-re...@patchew.org wrote:
> Hi,
>
> This series failed automatic build test. Please find the testing commands and
> their output below. If you have docker installed, you can probably reproduce
> it
> locally.
>
Oops. This should not be out yet. Pleas
On 21/09/17 15:22, Alexey Kardashevskiy wrote:
> On 21/09/17 10:02, Alexey Kardashevskiy wrote:
>> On 21/09/17 03:15, Paolo Bonzini wrote:
>>> On 20/09/2017 13:46, Alexey Kardashevskiy wrote:
Address spaces get to keep a root MR (alias or not) but FlatView stores
the actual MR as this is
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Subject: [Qemu-devel] [PATCH 0/4] chardev: support non-default gcontext
Message-id: 1505974414-6033-1-git-send-email-pet...@re
Hi,
This series failed build test on s390x host. Please find the details below.
Subject: [Qemu-devel] [PATCH 0/4] chardev: support non-default gcontext
Type: series
Message-id: 1505974414-6033-1-git-send-email-pet...@redhat.com
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invok
>>> On 21.09.17 at 03:12, wrote:
> On Fri, 1 Sep 2017, Jan Beulich wrote:
>> --- a/hw/xen/xen_pt_msi.c
>> +++ b/hw/xen/xen_pt_msi.c
>> @@ -18,6 +18,11 @@
>>
>> #define XEN_PT_AUTO_ASSIGN -1
>>
>> +#ifndef XEN_DOMCTL_VMSI_X86_DEST_ID_MASK
>> +#if XEN_DOMCTL_INTERFACE_VERSION >= 0x000e
>> +
We had a per-chardev cache for context, then we don't need this
parameter to be passed in every time when chr_update_read_handler()
called. As long as we are calling chr_update_read_handler() using
qemu_chr_be_update_read_handlers() we'll be fine.
Signed-off-by: Peter Xu
---
chardev/char-fd.c
It was only passed in by chr_update_read_handlers(). However when
reconnect, we'll lose that context information. So if a chardev was
running on another context (rather than the default context, the NULL
pointer), it'll switch back to the default context if reconnection
happens. But, it should r
It caches the gcontext that is used to poll the chardev IO. Before this
patch, we only passed it in via chr_update_read_handlers(). However
that may not be enough if the char backend is disconnected and
reconnected afterward. There are chardev codes that still assumed the
context be NULL (which
Add a wrapper for the chr_update_read_handler().
Signed-off-by: Peter Xu
---
chardev/char-fe.c | 7 ++-
chardev/char.c | 10 ++
include/chardev/char.h | 10 ++
3 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/chardev/char-fe.c b/chardev/char-fe.c
The old chardev may not fully support non-default GMainContext. One
direct clue is that when we call io_add_watch_poll() sometimes we are
still passing in the NULL context pointer.
IIUC we are fine during setup since the context will be passed
correctly during setup via chr_update_read_handler().
Thanks Philippe :)
Sundeep
On Thu, Sep 21, 2017 at 1:47 AM, Philippe Mathieu-Daudé
wrote:
> Hi Peter,
>
> Now than Igor's patch landed, I respin Sundeep's series updating it to work
> after the "arm: drop intermediate cpu_model -> cpu type parsing and use cpu
> type directly" patch.
>
> v11:
>
On 09/21/2017 05:54 AM, Nikunj A Dadhania wrote:
> David Gibson writes:
>
>> On Wed, Sep 20, 2017 at 12:48:55PM +0530, Nikunj A Dadhania wrote:
>>> David Gibson writes:
>>>
On Wed, Sep 20, 2017 at 12:10:48PM +0530, Nikunj A Dadhania wrote:
> David Gibson writes:
>
>> On Wed, Se
Am 21.09.2017 um 07:39 schrieb Thomas Huth:
> If QEMU has been compiled with the flags --enable-tcg-interpreter and
> --enable-debug, the guest is running incredibly slow. The prom-env
> test is approximately 10 times slower than normal in this case, and
> it takes up to 500 seconds until the test
If QEMU has been compiled with the flags --enable-tcg-interpreter and
--enable-debug, the guest is running incredibly slow. The prom-env
test is approximately 10 times slower than normal in this case, and
it takes up to 500 seconds until the test with the pseries machine
finishs. While we should st
On 21/09/17 10:02, Alexey Kardashevskiy wrote:
> On 21/09/17 03:15, Paolo Bonzini wrote:
>> On 20/09/2017 13:46, Alexey Kardashevskiy wrote:
>>> Address spaces get to keep a root MR (alias or not) but FlatView stores
>>> the actual MR as this is going to be used later on to decide whether to
>>> sh
On Thu, Sep 21, 2017 at 12:10:39PM +0800, Peter Xu wrote:
> On Wed, Sep 20, 2017 at 08:32:46PM +0100, Peter Maydell wrote:
> > On 20 September 2017 at 12:42, Juan Quintela wrote:
> > > Juan Quintela wrote:
> > >> Hi
> > >>
> > >> To make merges easier, this includes:
> > >> - Peter Xu reviewed pa
Hi Igor,
I am sorry I missed some comments you gave to me.
my reply is below.
At 09/18/2017 05:24 PM, Dou Liyang wrote:
[...]
ranges where
*the guest will attempt to probe for a device that QEMU doesn't
*implement and a stub device is required.
+ * @numa_implicit_add_node0:
+ *E
On Wed, Sep 20, 2017 at 08:32:46PM +0100, Peter Maydell wrote:
> On 20 September 2017 at 12:42, Juan Quintela wrote:
> > Juan Quintela wrote:
> >> Hi
> >>
> >> To make merges easier, this includes:
> >> - Peter Xu reviewed patches from Postocpy recovery (3)
> >> - Alexey reviewed pages from block
David Gibson writes:
> On Wed, Sep 20, 2017 at 12:48:55PM +0530, Nikunj A Dadhania wrote:
>> David Gibson writes:
>>
>> > On Wed, Sep 20, 2017 at 12:10:48PM +0530, Nikunj A Dadhania wrote:
>> >> David Gibson writes:
>> >>
>> >> > On Wed, Sep 20, 2017 at 10:43:19AM +0530, Nikunj A Dadhania wro
Could you please check whether the problem also occurs with QEMU v2.10?
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1673976
Title:
core dump
On Wed, Sep 20, 2017 at 04:46:20PM +0200, Greg Kurz wrote:
> PHBs can be created with an index property, in which case the machine
> code automatically sets all the MMIO windows at addresses derived from
> the index. Alternatively, they can be manually created without index,
> but the user has to p
On Wed, Sep 20, 2017 at 12:29:21PM +0100, Daniel P. Berrange wrote:
> On Wed, Sep 20, 2017 at 07:18:49PM +0800, Peter Xu wrote:
> > On Wed, Sep 20, 2017 at 12:03:09PM +0100, Daniel P. Berrange wrote:
> > > On Wed, Sep 20, 2017 at 06:49:58PM +0800, Peter Xu wrote:
> > > > On Wed, Sep 20, 2017 at 10:
Hi Jiangshan,
Any update from this patch?
Thanks,
Zhang Haoyu
On 2016/8/11 22:45, Lai Jiangshan wrote:
> Note, the old local migration patchset:
> https://lists.gnu.org/archive/html/qemu-devel/2013-12/msg00073.html
>
> this patch can be considered as a new local migration implementation,
> but
在 2017/9/21 上午12:04, Dr. David Alan Gilbert 写道:
* Christian Borntraeger (borntrae...@de.ibm.com) wrote:
Something like the following seems to do the tricks.
Needs proper patch description, review, full test with different kernel
versions.
Without knowing anything about 'ais' - will this
From: Roger Pau Monne
When a MSI interrupt is bound to a guest using
xc_domain_update_msi_irq (XEN_DOMCTL_bind_pt_irq) the interrupt is
left masked by default.
This causes problems with guests that first configure interrupts and
clean the per-entry MSIX table mask bit and afterwards enable MSIX
From: Olaf Hering
g_malloc0_n is available since glib-2.24. To allow build with older glib
versions use the generic g_new0, which is already used in many other
places in the code.
Fixes commit 3284fad728 ("xen-disk: add support for multi-page shared rings")
Signed-off-by: Olaf Hering
Reviewed-
t tags/xen-20170920-tag
for you to fetch changes up to a8036336609d2e184fc3543a4c439c0ba7d7f3a2:
xen/pt: allow QEMU to request MSI unmasking at bind time (2017-09-20 19:05:27
-0700)
Xen
On 2017年09月21日 02:53, Felipe Franciosi wrote:
vhost_log_put() is called to decomission the dirty log between qemu and
a vhost device when stopping the device. Such a call can happen from
migration_completion().
Present code sets dev->log_size to zero too early in vhost_log_put(),
causing the s
Apparently GCC gets bent over comparing enum values against zero.
Replace the conditional with something less readable.
Tested-by: Mark Cave-Ayland
Signed-off-by: John Snow
---
v2: Second verse, same as the first.
Signed-off-by: John Snow
---
hw/ide/ahci.c | 2 +-
hw/ide/core.c
On Wed, Sep 20, 2017 at 02:26:32PM +0200, Cédric Le Goater wrote:
> On 09/19/2017 10:44 AM, David Gibson wrote:
> > On Mon, Sep 11, 2017 at 07:12:32PM +0200, Cédric Le Goater wrote:
> >> Like for XICS, the XIVE interface for the guest is described in the
> >> device tree under the "interrupt-contro
On Wed, Sep 20, 2017 at 02:33:37PM +0200, Cédric Le Goater wrote:
> On 09/19/2017 10:46 AM, David Gibson wrote:
> > On Tue, Sep 19, 2017 at 06:20:20PM +1000, David Gibson wrote:
> >> On Mon, Sep 11, 2017 at 07:12:14PM +0200, Cédric Le Goater wrote:
> >>> On a POWER9 sPAPR machine, the Client Archit
Signed-off-by: John Snow
---
hw/ide/core.c | 99 +--
hw/ide/trace-events | 4 +-
include/hw/ide/internal.h | 3 +-
3 files changed, 49 insertions(+), 57 deletions(-)
diff --git a/hw/ide/core.c b/hw/ide/core.c
index a19bd90..393f523
Mark, here's a quick sketch for you. There are two things I don't like,
but didn't care enough to fix:
(1) Restricting nbytes to 2 or 4 means some extra boilerplate
to quiet compilers who don't know it will only ever be 2 or 4
(2) the address value is all-but-ignored, it carries over from the
Signed-off-by: John Snow
---
hw/ide/core.c | 86 +--
hw/ide/trace-events | 3 +-
include/hw/ide/internal.h | 1 +
3 files changed, 40 insertions(+), 50 deletions(-)
diff --git a/hw/ide/core.c b/hw/ide/core.c
index 393f523..af49de5 1
On Fri, 1 Sep 2017, Jan Beulich wrote:
> Xen and qemu having identical #define-s (with different names) is a
> strong hint that these should have been part of the public interface
> from the very start. Use them if they're available, falling back to
> privately defined values only when using older
* Halil Pasic [2017-09-20 13:13:01 +0200]:
>
>
> On 09/20/2017 10:33 AM, Cornelia Huck wrote:
> > On Wed, 20 Sep 2017 15:42:38 +0800
> > Dong Jia Shi wrote:
> >
> >> * Halil Pasic [2017-09-19 20:27:45 +0200]:
> >>
> >>> Let's add indirect data addressing support for our virtual channel
> >>>
* Halil Pasic [2017-09-20 18:46:57 +0200]:
>
>
> On 09/20/2017 01:18 PM, Cornelia Huck wrote:
> > On Wed, 20 Sep 2017 13:13:01 +0200
> > Halil Pasic wrote:
> >
> >> On 09/20/2017 10:33 AM, Cornelia Huck wrote:
> >>> On Wed, 20 Sep 2017 15:42:38 +0800
> >>> Dong Jia Shi wrote:
> >>>
>
On Wed, 09/20 08:20, Eric Blake wrote:
> On 09/19/2017 10:25 PM, Fam Zheng wrote:
> > Signed-off-by: Fam Zheng
> > ---
> > scripts/archive-source.sh | 51
> > +++
> > 1 file changed, 51 insertions(+)
> > create mode 100755 scripts/archive-source.sh
>
* Halil Pasic [2017-09-20 13:02:59 +0200]:
>
>
> On 09/20/2017 10:25 AM, Cornelia Huck wrote:
> > On Wed, 20 Sep 2017 15:47:51 +0800
> > Dong Jia Shi wrote:
> >
> >> * Halil Pasic [2017-09-19 20:27:44 +0200]:
> >
> >>> @@ -828,7 +836,9 @@ void ccw_dstream_init(CcwDataStream *cds, CCW1 const
On Wed, 09/20 08:20, Eric Blake wrote:
> On 09/19/2017 10:25 PM, Fam Zheng wrote:
> > Signed-off-by: Fam Zheng
> > ---
> > scripts/archive-source.sh | 51
> > +++
> > 1 file changed, 51 insertions(+)
> > create mode 100755 scripts/archive-source.sh
>
On 21/09/17 03:15, Paolo Bonzini wrote:
> On 20/09/2017 13:46, Alexey Kardashevskiy wrote:
>> Address spaces get to keep a root MR (alias or not) but FlatView stores
>> the actual MR as this is going to be used later on to decide whether to
>> share a particular FlatView or not.
>>
>> Signed-off-by
On 21/09/17 03:14, Paolo Bonzini wrote:
> On 20/09/2017 13:46, Alexey Kardashevskiy wrote:
>> This extends memory_region_transaction_commit() to receive a MR as
>> if it is a root MR or its topmost parent is, then we can only rebuild
>> its FlatView and update it for address spaces sharing it.
>>
>
On 21/09/17 03:18, Paolo Bonzini wrote:
> On 20/09/2017 13:46, Alexey Kardashevskiy wrote:
>> +QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
>> +MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
>> +FlatView *new_view = g_hash_table_lookup(flat_views
On 21/09/17 03:13, Paolo Bonzini wrote:
> On 20/09/2017 13:46, Alexey Kardashevskiy wrote:
>> This shares an cached empty FlatView among address spaces. The empty
>> FV is used every time when a root MR renders into a FV without memory
>> sections which happens when MR or its children are not enabl
Heya,
> On 20 Sep 2017, at 13:33, Marc-André Lureau
> wrote:
>
> Hi
>
> - Original Message -
>> vhost_log_put() is called to decomission the dirty log between qemu and
>> a vhost device when stopping the device. Such a call can happen from
>> migration_completion().
>>
>> Present code
On Wed, Sep 20, 2017 at 11:53 AM, Laurent Vivier wrote:
> > the test for optlen is replaced by passing optlen to the underlying
> > setsockopt call directly, who would do the test and return the right
> error.
>
> You can't do that, because sizeof(struct linger) may be different from
> sizeof(str
On Tue, 19 Sep 2017 19:45:09 -0500
Michael Roth wrote:
> Hi everyone,
>
> The following new patches are queued for QEMU stable v2.10.1:
>
> https://github.com/mdroth/qemu/commits/stable-2.10-staging
>
> The release is planned for 2017-10-02:
>
> https://wiki.qemu.org/Planning/2.10
>
> Pl
I don't really know why we use 0xf700 as our
reserved_va value here, though. Alex, you added that
years ago, can you remember why you used that value?
IIRC I wanted to map the full 32 bits of address space possibly in use by a
32bit application, but leave some room for something, but I don'
This is the initial version of the Inter Processor Interrupt device.
Signed-off-by: Alistair Francis
---
hw/intc/Makefile.objs | 1 +
hw/intc/xlnx-zynqmp-ipi.c | 377 ++
include/hw/intc/xlnx-zynqmp-ipi.h | 57 ++
3 files changed, 43
Signed-off-by: Alistair Francis
---
hw/arm/xlnx-zynqmp.c | 14 ++
include/hw/arm/xlnx-zynqmp.h | 2 ++
2 files changed, 16 insertions(+)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 2b27daf51d..8aa1f02c62 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx
Add the PMU IO Module Interrupt controller device.
Signed-off-by: Alistair Francis
---
default-configs/microblaze-softmmu.mak | 1 +
hw/intc/Makefile.objs | 1 +
hw/intc/xlnx-pmu-iomod-intc.c | 554 +
include/hw/intc/xlnx-pmu-iomod-i
Connect the MicroBlaze CPU and the ROM and RAM memory regions.
Signed-off-by: Alistair Francis
---
V2:
- Fix the pmu-cpu name
- Use err and errp for CPU realise instead of error_fatal
hw/microblaze/xlnx-zynqmp-pmu.c | 70 +++--
1 file changed, 68 insertions
Signed-off-by: Alistair Francis
---
hw/microblaze/xlnx-zynqmp-pmu.c | 40 ++--
1 file changed, 34 insertions(+), 6 deletions(-)
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index ca98d82e87..2016e34db6 100644
--- a/hw/microbl
In preperation for having an ARM and MicroBlaze ZynqMP machine let's
split out the current ARM specific config options.
Signed-off-by: Alistair Francis
Acked-by: Peter Maydell
---
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/Makefile.objs| 2 +-
hw/display/Makefile.objs
This series adds the ZynqMP Power Management Unit (PMU) machine with basic
functionality.
The machine only has the
- CPU
- Memory
- Interrupt controller
- IPI device
connected, but that is enough to run some of the ROM and firmware
code on the machine
The series also adds the IPI device and
The Xilinx ZynqMP SoC has two main processing systems in it. The ARM
processing system (which is already modeled in QEMU) and the MicroBlaze
Power Management Unit (PMU). This is the inital work for adding support
for the PMU.
The PMU susbsystem runs along side the ARM system on hardware, but due
t
On 20/09/17 22:33, John Snow wrote:
> On 09/20/2017 05:28 PM, Mark Cave-Ayland wrote:
>> On 20/09/17 20:41, John Snow wrote:
>>
>>> Apparently GCC gets bent over comparing enum values against zero.
>>> Replace the conditional with something less readable.
>>>
>>> Signed-off-by: John Snow
>>> ---
On 09/20/2017 09:58 AM, Pavel Butsykin wrote:
> Now after shrinking the image, at the end of the image file, there might be a
> tail that probably will never be used. So we can find the last used cluster
> and
> cut the tail.
>
> Signed-off-by: Pavel Butsykin
> ---
> block/qcow2-refcount.c |
On 09/20/2017 05:28 PM, Mark Cave-Ayland wrote:
> On 20/09/17 20:41, John Snow wrote:
>
>> Apparently GCC gets bent over comparing enum values against zero.
>> Replace the conditional with something less readable.
>>
>> Signed-off-by: John Snow
>> ---
>> hw/ide/core.c | 2 +-
>> in
On 20.09.17 20:04, Peter Maydell wrote:
On 20 September 2017 at 18:05, John Reiser wrote:
Yes, the SEGV occurs on the store, "long" before the re-written
instruction ever is executed
OK, I've identified the immediate cause for this SEGV.
(1) when the guest initially mmap()s at 0xf700 a
On 20/09/17 20:41, John Snow wrote:
> Apparently GCC gets bent over comparing enum values against zero.
> Replace the conditional with something less readable.
>
> Signed-off-by: John Snow
> ---
> hw/ide/core.c | 2 +-
> include/hw/ide/internal.h | 3 +--
> 2 files changed, 2 insert
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge/pcie_pci_bridge.c | 24 ++--
1 file changed, 18 insertions(+), 6 deletions(-)
diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c
index 9aa5cc3..da562fe 100644
--- a/hw/pci-bridge/pcie_pci_bridge
On 09/20/2017 06:17 AM, Alex Bennée wrote:
> Hmm I get a link failure:
>
> LINKtilegx-linux-user/qemu-tilegx
> disas.o: In function `cap_disas_start':
> /home/alex/lsrc/qemu/qemu.git/disas.c:196: undefined reference to `cs_open'
As discussed on IRC, this turned out to be wrong link ordering
On 09/16/2017 11:46 AM, Peter Maydell wrote:
> Don't use old_mmio in the memory region ops struct.
>
> Signed-off-by: Peter Maydell
> ---
> hw/arm/omap2.c | 49 +
> 1 file changed, 37 insertions(+), 12 deletions(-)
Reviewed-by: Richard Henderson
On 20 September 2017 at 14:50, Greg Kurz wrote:
> The following changes since commit c51700273ad9802a21c19f8d2b4bcb67c38e74ac:
>
> Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20170919-v2' into
> staging (2017-09-19 18:08:48 +0100)
>
> are available in the git repository at:
>
> ht
On 09/16/2017 11:46 AM, Peter Maydell wrote:
> Don't use old_mmio in the memory region ops struct.
>
> Signed-off-by: Peter Maydell
> ---
> hw/i2c/omap_i2c.c | 44
> 1 file changed, 32 insertions(+), 12 deletions(-)
Reviewed-by: Richard Henderson
r
On 09/16/2017 11:46 AM, Peter Maydell wrote:
> Don't use the old_mmio struct in memory region ops.
>
> Signed-off-by: Peter Maydell
> ---
> hw/timer/omap_gptimer.c | 49
> +
> 1 file changed, 37 insertions(+), 12 deletions(-)
Reviewed-by: Richard
On 09/16/2017 11:46 AM, Peter Maydell wrote:
> Don't use the old_mmio in the memory region ops struct.
>
> Signed-off-by: Peter Maydell
> ---
> hw/timer/omap_synctimer.c | 35 +--
> 1 file changed, 21 insertions(+), 14 deletions(-)
Reviewed-by: Richard Henderson
On 09/16/2017 11:46 AM, Peter Maydell wrote:
> Drop the use of old_mmio in the omap2_gpio memory ops.
>
> Signed-off-by: Peter Maydell
> ---
> hw/gpio/omap_gpio.c | 26 --
> 1 file changed, 12 insertions(+), 14 deletions(-)
Reviewed-by: Richard Henderson
r~
On 09/16/2017 11:46 AM, Peter Maydell wrote:
> Update the static_ops functions to use new-style mmio
> rather than the legacy old_mmio functions.
>
> Signed-off-by: Peter Maydell
> ---
> hw/arm/palm.c | 30 ++
> 1 file changed, 10 insertions(+), 20 deletions(-)
Revie
NULL sockets are used for NDP, BOOTP, and other critical operations.
If the topmost mbuf in a NULL session is blocked pending resolution,
it may cause problems if it blocks other packets with a NULL socket.
So do not add mbufs with a NULL socket field to the same session.
Signed-off-by: Kevin Cern
if_output() originally sent one mbuf per call and used the slirp->next_m
variable to keep track of where it left off. But nowadays it tries to
send all of the mbufs from the fastq, and one mbuf from each session on
the batchq. The next_m variable is both redundant and harmful: there is
a case[0]
Hi
- Original Message -
> vhost_log_put() is called to decomission the dirty log between qemu and
> a vhost device when stopping the device. Such a call can happen from
> migration_completion().
>
> Present code sets dev->log_size to zero too early in vhost_log_put(),
> causing the sync c
I can confirm this. The ninja build system is also affected.
--
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1673976
Title:
core dump
Status in QEMU:
New
Bug description:
I'm running a command
From: Subbaraya Sundeep
Smartfusion2 SoC has hardened Microcontroller subsystem
and flash based FPGA fabric. This patch adds support for
Microcontroller subsystem in the SoC.
Signed-off-by: Subbaraya Sundeep
Reviewed-by: Alistair Francis
Signed-off-by: Philippe Mathieu-Daudé
[PMD: drop cpu_mo
From: Subbaraya Sundeep
Emulated Emcraft's Smartfusion2 System On Module starter
kit.
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Philippe Mathieu-Daudé
[PMD: drop cpu_model to directly use cpu type]
---
hw/arm/msf2-som.c| 105 +++
hw/ar
From: Subbaraya Sundeep
Modelled System Timer in Microsemi's Smartfusion2 Soc.
Timer has two 32bit down counters and two interrupts.
Signed-off-by: Subbaraya Sundeep
Reviewed-by: Alistair Francis
Acked-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
---
include/hw/timer/mss-tim
From: Subbaraya Sundeep
Modelled Microsemi's Smartfusion2 SPI controller.
Signed-off-by: Subbaraya Sundeep
Reviewed-by: Alistair Francis
Tested-by: Philippe Mathieu-Daudé
---
include/hw/ssi/mss-spi.h | 58 +++
hw/ssi/mss-spi.c | 404 ++
From: Subbaraya Sundeep
Added Sytem register block of Smartfusion2.
This block has PLL registers which are accessed by guest.
Signed-off-by: Subbaraya Sundeep
Reviewed-by: Alistair Francis
Acked-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
---
include/hw/misc/msf2-sysreg.h |
Hi Peter,
Now than Igor's patch landed, I respin Sundeep's series updating it to work
after the "arm: drop intermediate cpu_model -> cpu type parsing and use cpu
type directly" patch.
v11:
- msf2-soc.c: add a check for null m3clk
- msf2-soc.c, msf2-som.c: drop cpu_model to directly use cpu type
On 09/20/2017 09:58 AM, Pavel Butsykin wrote:
> Signed-off-by: Pavel Butsykin
> ---
> block/qcow2.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/block/qcow2.c b/block/qcow2.c
> index 2174a84d1f..8a4311d338 100644
> --- a/block/qcow2.c
> +++ b/block/qcow2.c
> @@
On 09/19/2017 10:25 PM, Fam Zheng wrote:
> The image is prepared following instructions as in:
>
> https://wiki.qemu.org/Hosts/BSD
>
> Signed-off-by: Fam Zheng
> ---
> tests/vm/freebsd | 42 ++
> 1 file changed, 42 insertions(+)
> create mode 100755 test
On 09/20/2017 07:43 AM, Manos Pitsidianakis wrote:
> blk_pread_unthrottled was used to bypass I/O throttling on the BlockBackend in
> the case of async I/O. This is not needed anymore and we can just call
> blk_pread() directly.
>
> Signed-off-by: Manos Pitsidianakis
> ---
> include/sysemu/blo
2017-09-20 17:02 GMT+03:00 Marcel Apfelbaum :
> On 20/09/2017 16:57, Eduardo Habkost wrote:
>>
>> On Wed, Sep 20, 2017 at 09:52:01AM +, Aleksandr Bezzubikov wrote:
>>>
>>> ср, 20 сент. 2017 г. в 10:13, Marcel Apfelbaum :
>>>
On 19/09/2017 23:34, Eduardo Habkost wrote:
>
> On Fri, A
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH v4 0/6] QOMify MIPS cpu
Message-id: 20170920194934.23071-1-f4...@amsat.org
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BA
From: Igor Mammedov
now cpu_mips_init() reimplements subset of cpu_generic_init()
tasks, so just drop it and use cpu_generic_init() directly.
Signed-off-by: Igor Mammedov
Reviewed-by: Hervé Poussineau
Signed-off-by: Philippe Mathieu-Daudé
[PMD: use internal.h instead of cpu.h]
Tested-by: Jame
no logical change, only code movement (and fix a comment typo).
Signed-off-by: Philippe Mathieu-Daudé
Tested-by: Igor Mammedov
Tested-by: James Hogan
Acked-by: Eduardo Habkost
---
This patch triggers 3 positive falses from checkpatch:
ERROR: space prohibited after that '&' (ctx:WxW)
#664: FIL
From: Igor Mammedov
Register separate QOM types for each mips cpu model,
so it would be possible to reuse generic CPU creation
routines.
Signed-off-by: Igor Mammedov
Signed-off-by: Philippe Mathieu-Daudé
[PMD: use internal.h, use void* to hold cpu_def in MIPSCPUClass,
mark MIPSCPU abstract, a
so it can be used in mips_cpu_realizefn() in the next commit
Signed-off-by: Philippe Mathieu-Daudé
Tested-by: Igor Mammedov
Tested-by: James Hogan
Reviewed-by: Eduardo Habkost
---
target/mips/internal.h | 1 +
target/mips/translate.c | 19 ---
2 files changed, 13 insertions(
This changes the order between cpu_mips_realize_env() and
cpu_exec_initfn(), but cpu_exec_initfn() don't have anything that
depends on cpu_mips_realize_env() being called first.
Signed-off-by: Philippe Mathieu-Daudé
Tested-by: Igor Mammedov
Tested-by: James Hogan
Reviewed-by: Eduardo Habkost
-
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