some versions of windows guest access rtc frequently because of
rtc as system tick.guest access rtc like this: write register index
to 0x70, then write or read data from 0x71. writing 0x70 port is
just as index and do nothing else. So we can use coalesced mmio to
handle this scene to reduce VM-EXIT
On Fri, 08/11 09:42, Eric Blake wrote:
> On 08/11/2017 03:09 AM, Fam Zheng wrote:
> > People get surprised when, after "qemu-img create -f raw /dev/sdX", they
> > still see qcow2 with "qemu-img info", if previously the bdev had a qcow2
> > header. While this is natural because raw doesn't need to w
On Fri, Aug 11, 2017 at 4:21 PM, Alistair Francis wrote:
> On Fri, Aug 11, 2017 at 3:17 PM, Alistair Francis
> wrote:
>> I found some issues with the way exclusive store was working. This patch
>> series seems to fix the test cases that were failing for me.
>>
>> The first patch is just a simple
On Fri, Aug 11, 2017 at 3:17 PM, Alistair Francis
wrote:
> I found some issues with the way exclusive store was working. This patch
> series seems to fix the test cases that were failing for me.
>
> The first patch is just a simple adjustment.
>
> The third patch fixes the main bug I was seeing.
>
On 08/08/2017 10:26 AM, Vladimir Sementsov-Ogievskiy wrote:
Initial review, I'm still playing with this one, and will reply again on
Monday.
> Do not communicate after the first error to avoid communicating throught
s/throught/through a/
> broken channel. The only exclusion is try to send NBD_C
When we perform the atomic_cmpxchg operation we want to perform the
operation on a pair of 32-bit registers. Previously we were just passing
the register size in which was set to MO_32. This would result in the
high register to be ignored. To fix this issue we hardcode the size to
be 64-bits long w
Acording to the ARM ARM exclusive loads require the same allignment as
exclusive stores. Let's update the memops used for the load to match
that of the store. This adds the alignment requirement to the memops.
Signed-off-by: Alistair Francis
Reviewed-by: Richard Henderson
---
target/arm/transl
I found some issues with the way exclusive store was working. This patch
series seems to fix the test cases that were failing for me.
The first patch is just a simple adjustment.
The third patch fixes the main bug I was seeing.
The second patch is left over from the RFC that seems like it is sti
Expose the tcg_gen_ext_i32() and tcg_gen_ext_i64() functions.
Signed-off-by: Alistair Francis
Reviewed-by: Richard Henderson
---
Although I no longer am using these functions I have left this patch in
as Richard thought it was a good idea.
tcg/tcg-op.c | 4 ++--
tcg/tcg-op.h | 2 ++
2 files c
On 08/11/2017 03:01 PM, Eric Blake wrote:
> On 08/11/2017 02:41 PM, Eric Blake wrote:
>>> Hmm, was it correct even before your patch? Is it safe to enter a coroutine
>>> (which we've scheduled by nbd_recv_coroutines_enter_all()), which is
>>> actually
>>> yielded inside nbd_rwv (not our yield in nb
Hello,
Programmingkid, on jeu. 10 août 2017 16:44:19 -0400, wrote:
> While compiling I saw these error messages:
>
> slirp/ip6_icmp.c:79:32: warning: taking address of packed member 'ip_src' of
> class or
> structure 'ip6' may result in an unaligned pointer value
> [-Waddress-of-pack
On Fri, Aug 11, 2017 at 1:39 PM, Alistair Francis
wrote:
> On Fri, Aug 11, 2017 at 1:38 PM, Richard Henderson
> wrote:
>> On 08/11/2017 01:29 PM, Alistair Francis wrote:
>>> On Fri, Aug 11, 2017 at 1:24 PM, Richard Henderson
>>> wrote:
On 08/11/2017 01:13 PM, Alistair Francis wrote:
>>>
On Fri, Aug 11, 2017 at 1:38 PM, Richard Henderson
wrote:
> On 08/11/2017 01:29 PM, Alistair Francis wrote:
>> On Fri, Aug 11, 2017 at 1:24 PM, Richard Henderson
>> wrote:
>>> On 08/11/2017 01:13 PM, Alistair Francis wrote:
>> +tcg_gen_ext_i64(val, val, memop);
>
> What is
On 08/11/2017 01:29 PM, Alistair Francis wrote:
> On Fri, Aug 11, 2017 at 1:24 PM, Richard Henderson
> wrote:
>> On 08/11/2017 01:13 PM, Alistair Francis wrote:
> +tcg_gen_ext_i64(val, val, memop);
What is this addition intended to accomplish? Because of the position
>>
On Fri, Aug 11, 2017 at 1:24 PM, Richard Henderson
wrote:
> On 08/11/2017 01:13 PM, Alistair Francis wrote:
+tcg_gen_ext_i64(val, val, memop);
>>>
>>> What is this addition intended to accomplish? Because of the position
>>> within
>>> the code, you know that memop contains MO_6
On 08/11/2017 01:13 PM, Alistair Francis wrote:
>>> +tcg_gen_ext_i64(val, val, memop);
>>
>> What is this addition intended to accomplish? Because of the position within
>> the code, you know that memop contains MO_64, so that this is a no-op.
>
> This is when size == 2 so it's a 32bi
On Fri, Aug 11, 2017 at 12:46 PM, Richard Henderson
wrote:
> On 08/11/2017 11:19 AM, Alistair Francis wrote:
>> The exclusive store operation should return 0 if the operation updates
>> memory and 1 if it doesn't. This means that storing tmp in the rd
>> register is incorrect.
>
> I'm confused as
On 08/11/2017 02:41 PM, Eric Blake wrote:
>> Hmm, was it correct even before your patch? Is it safe to enter a coroutine
>> (which we've scheduled by nbd_recv_coroutines_enter_all()), which is
>> actually
>> yielded inside nbd_rwv (not our yield in nbd_co_receive_reply)?
>
> I'm honestly not sure
On 08/11/2017 11:19 AM, Alistair Francis wrote:
> Expose the tcg_gen_ext_i32() and tcg_gen_ext_i64() functions as we are
> going to use them later.
>
> Signed-off-by: Alistair Francis
> ---
>
> tcg/tcg-op.c | 4 ++--
> tcg/tcg-op.h | 2 ++
> 2 files changed, 4 insertions(+), 2 deletions(-)
Thi
On 08/11/2017 11:19 AM, Alistair Francis wrote:
> Acording to the ARM ARM exclusive loads require the same allignment as
> exclusive stores. Let's update the memops used for the load to match
> that of the store. This adds the alignment requirement to the memops.
>
> Signed-off-by: Alistair Franci
On 08/11/2017 11:19 AM, Alistair Francis wrote:
> The exclusive store operation should return 0 if the operation updates
> memory and 1 if it doesn't. This means that storing tmp in the rd
> register is incorrect.
I'm confused as to what you believe is wrong.
> tcg_gen_atomic_cmpxchg
On 08/11/2017 09:53 AM, Vladimir Sementsov-Ogievskiy wrote:
> 11.08.2017 17:15, Eric Blake wrote:
>> On 08/11/2017 02:48 AM, Vladimir Sementsov-Ogievskiy wrote:
>>> 11.08.2017 05:37, Eric Blake wrote:
As soon as the server is sending us garbage, we should quit
trying to send further messa
* Juan Quintela (quint...@redhat.com) wrote:
> Now it is called qemu_file_bytes that reflects better what it does,
> and we create qemu_file_bytes_now to not have to call qemu_ftell() twice.
Yes OK, although you could lose the 'qemu_' off the start; it's local
anyway.
Reviewed-by: Dr. David Alan
On 11.08.2017 19:18, Richard Henderson wrote:
> It's not all kvm related, so I'd prefer the more general name.
Thomas suggested to have both, internal.h and kvm_s390x.h
All KVM stuff goes into kvm_s390x.h. I even moved the stubs to
kvm-stubs.c (that's the way e.g. x86 handles it).
End result loo
Expose the tcg_gen_ext_i32() and tcg_gen_ext_i64() functions as we are
going to use them later.
Signed-off-by: Alistair Francis
---
tcg/tcg-op.c | 4 ++--
tcg/tcg-op.h | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 87f673ef49..d25e3003ef
Acording to the ARM ARM exclusive loads require the same allignment as
exclusive stores. Let's update the memops used for the load to match
that of the store. This adds the alignment requirement to the memops.
Signed-off-by: Alistair Francis
---
target/arm/translate-a64.c | 2 +-
1 file changed
The exclusive store operation should return 0 if the operation updates
memory and 1 if it doesn't. This means that storing tmp in the rd
register is incorrect.
This patch updates the succesful opertion to store 0 into the rd
register instead of tmp. It also adds a branch to fail if the memory
isn'
I found some issues with the way exclusive store was working. This patch
series seems to fix the test cases that were failing for me and also
seem to follow what the ARM ARM says.
The first patch is just a simple adjustment.
The second patch is just preparing for the third patch.
The third patch
On Fri, Aug 11, 2017 at 05:44:55PM +0100, Daniel P. Berrange wrote:
> On Fri, Aug 11, 2017 at 01:33:00PM -0300, Eduardo Habkost wrote:
> > CCing Zack Cornelius.
> >
> > On Wed, Jun 14, 2017 at 05:29:55PM -0300, Eduardo Habkost wrote:
> > > This series adds a new "persistent" option to
> > > memory
On Wed, Aug 09, 2017 at 04:51:21PM -0400, Lan Tianyu wrote:
> From: Chao Gao
>
> If a vIOMMU is exposed to guest, guest will configure the msi to remapping
> format. The original code isn't suitable to the new format. A new pair
> bind/unbind interfaces are added for this usage. This patch recogn
On 11 August 2017 at 18:10, Peter Maydell wrote:
> I get an intermittent failure on aarch64 test-aio-multithread:
>
> MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}
> gtester -k --verbose -m=quick tests/test-aio-multithread
> TEST: tests/test-aio-multithread... (pid=19863)
> /a
On 08/11/2017 11:05 AM, Markus Armbruster wrote:
> We've wanted -object to support non-scalar properties for a while.
> Dan Berrange tried in "[PATCH v4 00/10]Provide a QOM-based
> authorization API". Review led to the conclusion that we need to
> replace rather than add to QemuOpts. Initial work
On Fri, Aug 11, 2017 at 04:11:37PM +0100, Anthony PERARD wrote:
> To do PCI passthrough with Xen, the property acpi-pcihp-bsel needs to be
> set, but this was done only when ACPI tables are built which is not
> needed for a Xen guest. The need for the property starts with commit
> "pc: pcihp: avoid
It's not all kvm related, so I'd prefer the more general name.
r~
On August 11, 2017 9:19:52 AM CDT, Thomas Huth wrote:
>On 11.08.2017 09:46, David Hildenbrand wrote:
>> Let's move everything into internal.h
>
>Or kvm_s390x.h ? ;-)
>
> Thomas
--
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Hi Philippe,
Thanks for that, I'll try this out when I'm back. The 15th is
blank holiday here.
Thanks,
Fred
On 08/11/2017 04:49 PM, Philippe Mathieu-Daudé wrote:
On 08/11/2017 11:25 AM, Paolo Bonzini wrote:
On 11/08/2017 16:06, Philippe Mathieu-Daudé wrote:
remove unnecessary memory_region_b
On 11 August 2017 at 15:05, Kevin Wolf wrote:
> The following changes since commit 95766c2cd04395e5712b4d5967b3251f35d537df:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request'
> into staging (2017-08-10 18:53:39 +0100)
>
> are available in the git repository at:
>
> g
On 11 August 2017 at 15:32, Diana Madalina Craciun
wrote:
> On 07/26/2017 03:23 PM, Auger Eric wrote:
>> With respect to the renaming, stream_id really is ARM specific and
>> corresponds to the ID space before the SMMU while you mostly address
>> device id problematics here (ie. space id input to
Am 11.08.2017 um 17:34 hat Christian Ehrhardt geschrieben:
> On Fri, Aug 11, 2017 at 2:37 PM, Kevin Wolf wrote:
>
> > Am 11.08.2017 um 14:04 hat Fam Zheng geschrieben:
> > > On Fri, 08/11 13:07, Christian Ehrhardt wrote:
> > > > Simplifying that to a smaller test:
> > > >
> >
> [...]
>
> > > > B
Pulseaudio is a sound *backend*. This is independent of the choice of
guest hardware frontend.
You can disable pulseaudio using an env variable QEMU_AUDIO_DRV=none
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devel-ml, which is subscribed to QEMU.
https://bugs.launchpa
On Fri, Aug 11, 2017 at 01:33:00PM -0300, Eduardo Habkost wrote:
> CCing Zack Cornelius.
>
> On Wed, Jun 14, 2017 at 05:29:55PM -0300, Eduardo Habkost wrote:
> > This series adds a new "persistent" option to
> > memory-backend-file. The new option it will be useful if
> > somebody is sharing RAM
CCing Zack Cornelius.
On Wed, Jun 14, 2017 at 05:29:55PM -0300, Eduardo Habkost wrote:
> This series adds a new "persistent" option to
> memory-backend-file. The new option it will be useful if
> somebody is sharing RAM contents on a file using share=on, but
> don't need it to be flushed to disk
On 11.08.2017 18:11, David Hildenbrand wrote:
> On 11.08.2017 16:39, Thomas Huth wrote:
>> On 11.08.2017 16:21, David Hildenbrand wrote:
>>> On 11.08.2017 16:00, Thomas Huth wrote:
On 11.08.2017 09:46, David Hildenbrand wrote:
> cpu.h should only contain what really has to be accessed outs
It looks like qemu without any specific -soundhw CLI option uses pulseaudio.
So I still think a -soundhw none would be nice to have.
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https://bugs.launchpad.net/bugs/1583420
Title:
Ple
On 11.08.2017 16:19, Thomas Huth wrote:
> On 11.08.2017 09:46, David Hildenbrand wrote:
>> Let's move everything into internal.h
>
> Or kvm_s390x.h ? ;-)
And even kvm-stubs.c!
>
> Thomas
>
>
--
Thanks,
David
On 11.08.2017 16:39, Thomas Huth wrote:
> On 11.08.2017 16:21, David Hildenbrand wrote:
>> On 11.08.2017 16:00, Thomas Huth wrote:
>>> On 11.08.2017 09:46, David Hildenbrand wrote:
cpu.h should only contain what really has to be accessed outside of
target/s390x/. Add internal.h which can
On 08/10/2017 09:37 PM, Eric Blake wrote:
> Patch 1 is a much smaller patch than Vladimir's attempt [1] at fixing
> the client in the face of a malicious server.
>
> [1] https://lists.gnu.org/archive/html/qemu-devel/2017-08/msg01501.html
>
> Patch 2 is not to be applied; it is a hack for easily c
v2:
* PATCH 1: Whitespace change dropped [Eric]
* PATCH 2: Deallocation done differently [Paolo], R-by dropped
Commit message typo [Eric]
Markus Armbruster (2):
vl: Factor object_create() out of main()
vl: Partial support for non-scalar properties with -object
qapi-schema.json | 1
We've wanted -object to support non-scalar properties for a while.
Dan Berrange tried in "[PATCH v4 00/10]Provide a QOM-based
authorization API". Review led to the conclusion that we need to
replace rather than add to QemuOpts. Initial work towards that goal
has been merged to provide -blockdev (
Signed-off-by: Markus Armbruster
Reviewed-by: Eric Blake
Reviewed-by: Philippe Mathieu-Daudé
---
vl.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/vl.c b/vl.c
index 8e247cc..96c5da1 100644
--- a/vl.c
+++ b/vl.c
@@ -2855,6 +2855,14 @@ static bool obj
On Fri, Aug 11, 2017 at 02:35:28PM +, Diana Madalina Craciun wrote:
> Hi Edgar,
>
> On 07/31/2017 06:16 PM, Edgar E. Iglesias wrote:
> > On Wed, Jul 26, 2017 at 02:22:28PM +0200, Auger Eric wrote:
> >> Hi Diana,
> >> On 23/05/2017 13:12, Diana Craciun wrote:
> >>> Device IDs are required by th
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 1502461354-11327-1-git-send-email-eric.au...@redhat.com
Subject: [Qemu-devel] [RFC v6 0/9] ARM SMMUv3 Emulation Support
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
t
On Tue, Aug 08, 2017 at 06:26:26PM +0200, Juan Quintela wrote:
> We just send the address through the alternate channels and test that it
> is ok.
>
> Signed-off-by: Juan Quintela
> ---
> migration/ram.c | 50 ++
> 1 file changed, 50 insertions(+)
On Fri, Aug 11, 2017 at 2:37 PM, Kevin Wolf wrote:
> Am 11.08.2017 um 14:04 hat Fam Zheng geschrieben:
> > On Fri, 08/11 13:07, Christian Ehrhardt wrote:
> > > Simplifying that to a smaller test:
> > >
>
[...]
> > > Block node is read-only
>
[...]
> >
> > This is actually caused by
> >
> > comm
On Tue, Aug 08, 2017 at 06:26:28PM +0200, Juan Quintela wrote:
> We switch for sending the page number to send real pages.
>
> Signed-off-by: Juan Quintela
>
> --
>
> Remove the HACK bit, now we have the function that calculates the size
> of a page exported.
> ---
> migration/migration.c | 7
On Tue, Aug 08, 2017 at 06:26:26PM +0200, Juan Quintela wrote:
> We just send the address through the alternate channels and test that it
> is ok.
>
> Signed-off-by: Juan Quintela
> ---
> migration/ram.c | 50 ++
> 1 file changed, 50 insertions(+)
On 11.08.2017 17:15, Cornelia Huck wrote:
> On Fri, 11 Aug 2017 09:46:47 +0200
> David Hildenbrand wrote:
>
>> cpu.h is accessed outside of target/s390x. It should only contain
>> what is expected to be accessed outside of this folder. Therefore, create
>> internal.h and move a lot to that file.
On Tue, Aug 08, 2017 at 06:26:25PM +0200, Juan Quintela wrote:
> We make the locking and the transfer of information specific, even if we
> are still receiving things through the main thread.
>
> Signed-off-by: Juan Quintela
>
> --
>
> We split when we create the main channel and where we start
On Tue, Aug 08, 2017 at 06:26:22PM +0200, Juan Quintela wrote:
> The function still don't use multifd, but we have simplified
> ram_save_page, xbzrle and RDMA stuff is gone. We have added a new
> counter and a new flag for this type of pages.
>
> Signed-off-by: Juan Quintela
>
> --
> Add last_p
On Tue, Aug 08, 2017 at 06:26:21PM +0200, Juan Quintela wrote:
> We create new channels for each new thread created. We send through
> them a string containing multifd so we are
> sure that we connect the right channels in both sides.
>
> Signed-off-by: Juan Quintela
>
> --
> Split SocketArgs
On Fri, 11 Aug 2017 09:46:47 +0200
David Hildenbrand wrote:
> cpu.h is accessed outside of target/s390x. It should only contain
> what is expected to be accessed outside of this folder. Therefore, create
> internal.h and move a lot to that file.
Cool, I like that.
>
> While doing that, I notic
Adding PCI passthrough before the guest start works fine (broken in 2.9 but now
fixed), but hotplug does not work anymore.
Anthony PERARD (2):
hw/acpi: Call acpi_set_pci_info when no ACPI tables needed
Revert "ACPI: don't call acpi_pcihp_device_plug_cb on xen"
hw/acpi/piix4.c | 11 +++--
To do PCI passthrough with Xen, the property acpi-pcihp-bsel needs to be
set, but this was done only when ACPI tables are built which is not
needed for a Xen guest. The need for the property starts with commit
"pc: pcihp: avoid adding ACPI_PCIHP_PROP_BSEL twice"
(f0c9d64a68b776374ec4732424a3e27753c
This reverts commit 153eba4726dfa1bdfc31d1fe973b2a61b9035492.
This patch prevents PCI passthrough hotplug on Xen. Even if the Xen tool
stack prepares its own ACPI tables, we still rely on QEMU for hotplug
ACPI notifications.
The original issue is fixed by the previous patch (hw/acpi: Call
acpi_se
On Tue, Aug 08, 2017 at 06:26:20PM +0200, Juan Quintela wrote:
> We need that on later patches.
>
> Signed-off-by: Juan Quintela
> Reviewed-by: Dr. David Alan Gilbert
> ---
> migration/migration.c | 14 --
> 1 file changed, 12 insertions(+), 2 deletions(-)
Reviewed-by: Daniel P. Be
On Tue, Aug 08, 2017 at 06:26:18PM +0200, Juan Quintela wrote:
> Indicates how many pages we are going to send in each batch to a multifd
> thread.
>
> Signed-off-by: Juan Quintela
> Reviewed-by: Dr. David Alan Gilbert
>
> --
>
> Be consistent with defaults and documentation
> Use new DEFINE_P
On Tue, Aug 08, 2017 at 06:26:16PM +0200, Juan Quintela wrote:
> Signed-off-by: Juan Quintela
> Reviewed-by: Dr. David Alan Gilbert
>
> --
>
> Use new DEFINE_PROP
> ---
> migration/migration.c | 10 ++
> migration/migration.h | 1 +
> qapi-schema.json | 3 ++-
> 3 files changed,
On Tue, Aug 08, 2017 at 06:26:17PM +0200, Juan Quintela wrote:
> Indicates the number of threads that we would create. By default we
> create 2 threads.
>
> Signed-off-by: Juan Quintela
> Reviewed-by: Dr. David Alan Gilbert
>
> --
>
> Catch inconsistent defaults (eric).
> Improve comment stat
On Tue, Aug 08, 2017 at 06:26:11PM +0200, Juan Quintela wrote:
> We pass the ioc instead of the fd. This will allow us to have more
> than one channel open. We also make sure that we set the
> from_src_file sooner, so we don't need to pass it as a parameter.
>
> Signed-off-by: Juan Quintela
> -
On 08/11/2017 03:09 AM, Fam Zheng wrote:
> People get surprised when, after "qemu-img create -f raw /dev/sdX", they
> still see qcow2 with "qemu-img info", if previously the bdev had a qcow2
> header. While this is natural because raw doesn't need to write any
> magic bytes during creation, hdev_cr
On 08/11/2017 11:25 AM, Paolo Bonzini wrote:
On 11/08/2017 16:06, Philippe Mathieu-Daudé wrote:
remove unnecessary memory_region_big_endian()
Can you explain why it's unnecessary?...
I might have missed a lot here, I'm focusing on something else and
thought this might help Frederic so I onl
11.08.2017 17:15, Eric Blake wrote:
On 08/11/2017 02:48 AM, Vladimir Sementsov-Ogievskiy wrote:
11.08.2017 05:37, Eric Blake wrote:
As soon as the server is sending us garbage, we should quit
trying to send further messages to the server, and allow all
pending coroutines for any remaining repli
On 08/11/2017 09:19 AM, Markus Armbruster wrote:
> A command is a query if it has no side effect and yields a result.
> Such commands are typically named query-FOO, but there are exceptions.
>
> The basic idea is to find candidates with query-qmp-schema, filter out
> the ones that aren't queries w
On 11.08.2017 16:21, David Hildenbrand wrote:
> On 11.08.2017 16:00, Thomas Huth wrote:
>> On 11.08.2017 09:46, David Hildenbrand wrote:
>>> cpu.h should only contain what really has to be accessed outside of
>>> target/s390x/. Add internal.h which can only be used inside target/s390x/.
>>>
>>> Mov
On 08/11/2017 04:08 AM, Markus Armbruster wrote:
> Eric Blake writes:
>
>> On 08/10/2017 01:30 PM, Markus Armbruster wrote:
>>> A command is a query if it has no side effect and yields a result.
>>> Such commands are typically named query-FOO, but there are exceptions.
>>>
>>> The basic idea is t
Hi Eric,
Thanks for looking into this.
On 07/26/2017 03:22 PM, Auger Eric wrote:
Hi Diana,
On 23/05/2017 13:12, Diana Craciun wrote:
Device IDs are required by the ARM GICv3 ITS for IRQ remapping.
Currently, for PCI devices, the requester ID was used as device
ID in the virt machine. If the sy
On Fri, Aug 11, 2017 at 09:54:12AM +0200, KONRAD Frederic wrote:
> This adds mmio-exec property to workaround the migration bug.
> When enabled the migration is blocked and will return an error.
>
> Signed-off-by: KONRAD Frederic
Thanks Fred!
Reviewed-by: Edgar E. Iglesias
>
> V1 -> V2:
>
Hi Eric,
On 07/26/2017 03:23 PM, Auger Eric wrote:
> Hi Diana,
> On 23/05/2017 13:12, Diana Craciun wrote:
>> The PCI requester ID field is 16 bits. The requester_id field
>> from MemTxAttrs is used for MSIs to specify the device ID for
>> the platforms where this device ID is needed (e.g virt mac
On Thu, 10 Aug 2017 14:37:41 +0200
Cornelia Huck wrote:
> Signed-off-by: Cornelia Huck
> ---
>
> It's that time again. I plan to put this into my first 2.11 pullreq.
> Yes, and I assume that the next version is indeed 2.11 :)
>
> ---
> hw/s390x/s390-virtio-ccw.c | 17 -
> incl
On 08/11/2017 07:18 AM, Peter Maydell wrote:
On 11 August 2017 at 10:59, KONRAD Frederic wrote:
[...]>> It seems that when I try to load a big endian image on a
Cortex-R5 it gets confused:
* the instructions are fine it executes some code.
* GDB address / insns are wrong endianness.
* in
To allow VFIO use case, let's set the smmu model to
ACPI_IORT_SMMU_V3_CACHING_MODE.
An important notice is this model is not standardized in the
ACPI IORT as this work is a proof of concept.
We also set the COHACC override flag which seems to be mandated.
Signed-off-by: Eric Auger
---
hw/arm/v
This patch allows doing PCIe passthrough with a guest exposed
with a vSMMUv3. It implements the replay and notify_flag_changed
iommu ops. Also on TLB and data structure invalidation commands,
we replay the mappings so that the physical IOMMU implements
updated stage 1 settings (Guest IOVA -> Guest
On 11/08/2017 16:23, Joseph Myers wrote:
> The SSE4.1 phminposuw instruction finds the minimum 16-bit element in
> the source vector, putting the value of that element in the low 16
> bits of the destination vector, the index of that element in the next
> three bits and zeroing the rest of the dest
Hi Edgar,
On 07/31/2017 06:16 PM, Edgar E. Iglesias wrote:
> On Wed, Jul 26, 2017 at 02:22:28PM +0200, Auger Eric wrote:
>> Hi Diana,
>> On 23/05/2017 13:12, Diana Craciun wrote:
>>> Device IDs are required by the ARM GICv3 ITS for IRQ remapping.
>>> Currently, for PCI devices, the requester ID wa
For VFIO integration we need to update physical IOMMU mappings
each time the guest updates the vIOMMU translation structures.
For that, we rely on a special smmuv3 option, "tlbi-on-map"
which forces TLB invalidations on map (this mode is similar to
the Intel VTD caching Mode). The smmuv3 driver the
In case the MSI is translated by an IOMMU we need to fixup the
MSI route with the translated address.
Signed-off-by: Eric Auger
---
v5 -> v6:
- use IOMMUMemoryRegionClass API
It is still unclear to me if we need to register an IOMMUNotifier
to handle any change in the MSI doorbell which would
On 11.08.2017 09:46, David Hildenbrand wrote:
> Let's move everything into internal.h
Or kvm_s390x.h ? ;-)
Thomas
On 08/01/2017 05:05 AM, Michael S. Tsirkin wrote:
> On Mon, Jul 31, 2017 at 03:13:09PM +, Diana Madalina Craciun wrote:
>> On 07/31/2017 05:06 PM, Michael S. Tsirkin wrote:
>>> On Mon, Jul 31, 2017 at 01:22:45PM +, Diana Madalina Craciun wrote:
>> If we are to use a value of 0 for the c
From: Prem Mallappa
This patch builds the smmuv3 node in the ACPI IORT table.
The RID space of the root complex, which spans 0x0-0x1
maps to streamid space 0x0-0x1 in smmuv3, which in turn
maps to deviceid space 0x0-0x1 in the ITS group.
The guest must feature the IOMMU probe deferr
On 11.08.2017 09:46, David Hildenbrand wrote:
> Let's just introduce an helper.
>
> Signed-off-by: David Hildenbrand
> ---
> hw/s390x/s390-virtio-ccw.c | 4 +---
> target/s390x/cpu.c | 6 ++
> target/s390x/cpu.h | 1 +
> 3 files changed, 8 insertions(+), 3 deletions(-)
>
> d
The new machine type allows smmuv3 instantiation. A new option
is introduced to turn the feature on/off (off by default).
Signed-off-by: Eric Auger
---
v5 -> v6: machine 2_11
Another alternative would be to use the -device option as
done on x86. As the smmu is a sysbus device, we would need to
A command is a query if it has no side effect and yields a result.
Such commands are typically named query-FOO, but there are exceptions.
The basic idea is to find candidates with query-qmp-schema, filter out
the ones that aren't queries with an explicit blacklist, and test the
remaining ones agai
From: Prem Mallappa
Introduces the SMMUv3 derived model. This is based on
System MMUv3 specification (v17).
Signed-off-by: Prem Mallappa
Signed-off-by: Eric Auger
---
v5 -> v6:
- Use IOMMUMemoryregion
- regs become uint32_t and fix 64b MMIO access (.impl)
- trace_smmuv3_write/read_mmio take t
The SSE4.1 phminposuw instruction finds the minimum 16-bit element in
the source vector, putting the value of that element in the low 16
bits of the destination vector, the index of that element in the next
three bits and zeroing the rest of the destination. The helper for
this operation fills the
From: Prem Mallappa
Add code to instantiate an smmu-v3 in mach-virt. A new boolean flag
is introduced in VirtMachineState to allow this instantiation. It
is currently false.
Signed-off-by: Prem Mallappa
Signed-off-by: Eric Auger
---
v4 -> v5:
- add dma-coherent property
v2 -> v3:
- vbi was r
On 11.08.2017 09:46, David Hildenbrand wrote:
> cpu.h should only contain what really has to be accessed outside of
> target/s390x/. Add internal.h which can only be used inside target/s390x/.
>
> Move everything that isn't fast enough to run away and restructure it
> right away.
>
> Minor style
On 11/08/2017 16:06, Philippe Mathieu-Daudé wrote:
> remove unnecessary memory_region_big_endian()
Can you explain why it's unnecessary?...
Paolo
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> This is part of a branch with many cross-endianness tests for 2.11
>
> Frederic does it helps your i
This series implements the emulation code for ARM SMMUv3.
This is the continuation of Prem's work [1].
This v6 fixes some VFIO integration issues:
- Block replay was corrected.
- Range unmap is done before the replay (vhost issue).
- Introduction of a new CMDQ_OP_TLBI_NH_VA_AM command to
handle
Introduces the base device and class for the ARM smmu.
Implements VMSAv8-64 table lookup and translation. VMSAv8-32
is not implemented.
Signed-off-by: Eric Auger
Signed-off-by: Prem Mallappa
---
v5 -> v6:
- use IOMMUMemoryRegion
- remove initial_lookup_level()
- fix block replay
v4 -> v5:
- ad
On 11.08.2017 16:00, Thomas Huth wrote:
> On 11.08.2017 09:46, David Hildenbrand wrote:
>> cpu.h should only contain what really has to be accessed outside of
>> target/s390x/. Add internal.h which can only be used inside target/s390x/.
>>
>> Move everything that isn't fast enough to run away and r
> By the way, all the other targets that have KVM have a separate header
> for things like this: kvm_arm.h, kvm_ppc.h, kvm_mips.h, kvm_i386.h
> ... maybe it's time for kvm_s390x.h now?
Definitely!
>
> Thomas
>
--
Thanks,
David
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