On 06/22/2017 02:29 PM, Marcel Apfelbaum wrote:
On 22/06/2017 6:47, Mao Zhongyi wrote:
On 06/21/2017 03:39 PM, Marcel Apfelbaum wrote:
On 20/06/2017 6:51, Mao Zhongyi wrote:
Hi, Marcel
On 06/19/2017 08:05 PM, Marcel Apfelbaum wrote:
On 12/06/2017 16:48, Mao Zhongyi wrote:
In order to pr
On Wed, Jun 21, 2017 at 03:10:36PM +0200, Paolo Bonzini wrote:
>
>
> On 21/06/2017 12:19, Yang Zhong wrote:
> > @@ -3738,8 +3738,13 @@ int main(int argc, char **argv, char **envp)
> > }
> > break;
> > case QEMU_OPTION_no_kvm:
> > +#ifdef CONFIG_TCG
On Thu, 22 Jun 2017 01:09:24 +0300
"Michael S. Tsirkin" wrote:
> On Wed, Jun 21, 2017 at 07:42:15PM +0200, Greg Kurz wrote:
> > The 9P protocol is transport agnostic: if the guest misconfigured the
> > buffers, the best we can do is to set the broken flag on the device.
> >
> > We check if the t
>>> On 21.06.17 at 20:46, wrote:
> On Wed, 21 Jun 2017, Jan Beulich wrote:
>> >>> On 20.06.17 at 23:48, wrote:
>> > On Tue, 20 Jun 2017, Jan Beulich wrote:
>> >> @@ -36,13 +33,7 @@ struct blkif_x86_32_request_discard {
>> >> blkif_sector_t sector_number;/* start sector idx on disk (r/w
On 22.06.2017 08:22, Paolo Bonzini wrote:
>
>> On 21.06.2017 12:19, Yang Zhong wrote:
>>> Add the disable-tcg option into configure and echo CONFIG_TCG=y into
>>> $config_target_mak. The default tcg is enabled for all build. If tcg
>>> is disabled in the build, only i386|x86_64 softmmu option can
On 22/06/2017 6:47, Mao Zhongyi wrote:
On 06/21/2017 03:39 PM, Marcel Apfelbaum wrote:
On 20/06/2017 6:51, Mao Zhongyi wrote:
Hi, Marcel
On 06/19/2017 08:05 PM, Marcel Apfelbaum wrote:
On 12/06/2017 16:48, Mao Zhongyi wrote:
In order to propagate error message better, convert shpc_init() t
> On 21.06.2017 12:19, Yang Zhong wrote:
> > Add the disable-tcg option into configure and echo CONFIG_TCG=y into
> > $config_target_mak. The default tcg is enabled for all build. If tcg
> > is disabled in the build, only i386|x86_64 softmmu option can be disabled,
> > other softmmu of tagets and
Jayanto Minocha writes:
> Lluis,
> My modifications were almost the same as those done by Emilio. There were
> no memory trace events in the trace file.
I'll take a look at it after I finish revamping the generic translation loop
series (hopefully today).
Thanks,
Lluis
> -J
> On Tue, Jun 20
On Wed, Jun 21, 2017 at 09:23:11AM -0300, Eduardo Habkost wrote:
> On Wed, Jun 21, 2017 at 03:52:00PM +0800, Peter Xu wrote:
> > Introduce this new field for the accelerator classes so that each
> > specific accelerator in the future can register its own global
> > properties to be used further by
On 21.06.2017 12:19, Yang Zhong wrote:
> Add the disable-tcg option into configure and echo CONFIG_TCG=y into
> $config_target_mak. The default tcg is enabled for all build. If tcg
> is disabled in the build, only i386|x86_64 softmmu option can be disabled,
> other softmmu of tagets and users build
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 120788d8fb..e62cbc439a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1858,6 +1858,7 @@ Build and test automation
--
gcov generates lot of output and often trigger job limit timeout
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/.travis.yml b/.travis.yml
index 34391722a2..4bb288a192 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -105,
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/.travis.yml b/.travis.yml
index 96ddc16cfd..bac5bea744 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -93,7 +93,7 @@ before_script:
- if [ -x "$(command -v ccache 2>/dev/nul
On 06/21/2017 03:39 PM, Marcel Apfelbaum wrote:
On 20/06/2017 6:51, Mao Zhongyi wrote:
Hi, Marcel
On 06/19/2017 08:05 PM, Marcel Apfelbaum wrote:
On 12/06/2017 16:48, Mao Zhongyi wrote:
In order to propagate error message better, convert shpc_init() to
Error also convert the pci_bridge_dev_
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index a7512f3ab0..96ddc16cfd 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -68,6 +68,8 @@ env:
# be kind with Travis free plan
Few improvement as of today, but if Travis release their limit on the opensource
plan or upgrade their hardware, new builds will get some benefit.
Restrict to as most 4 cores to respect Travis Open Source plan.
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 15 ---
1 file c
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 1 +
1 file changed, 1 insertion(+)
diff --git a/.travis.yml b/.travis.yml
index be28e0642c..62b9dfd2ae 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -6,6 +6,7 @@ compiler:
- gcc
cache:
ccache: true
+ timeout: 1200 # https://docs.tr
(this eases git workflow)
see https://docs.travis-ci.com/user/caching#enabling-multiple-caching-features
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/.travis.yml b/.travis.yml
index 61394b4764..be28e0642c 100644
---
see https://blog.travis-ci.com/2017-06-19-trusty-updates-2017-Q2
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/.travis.yml b/.travis.yml
index 29c9ef72a4..e60a5cd8e6 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -128,6 +128,7 @@ matr
ui/vnc.c:3945:20: warning: 'sasl_server_init' is deprecated: first
deprecated in OS X 10.11 [-Wdeprecated-declarations]
if ((saslErr = sasl_server_init(NULL, "qemu")) != SASL_OK) {
^
/usr/include/sasl/sasl.h:1016:17: note: 'sasl_server_init' has been
explici
example of failure: https://travis-ci.org/philmd/qemu/jobs/245612939
$ git submodule update --init --recursive
[...]
Submodule 'pixman' (git://anongit.freedesktop.org/pixman) registered for path
'pixman'
Cloning into 'pixman'...
fatal: unable to connect to anongit.freedesktop.org:
ano
From: Peter Maydell
Add a new script to automate the process of running the Coverity
Scan build tools and uploading the resulting tarball to the
website. This is primarily intended to be driven from Travis,
but it can be run locally (if you are a maintainer of the
QEMU project on the Coverity Sca
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index e60a5cd8e6..61394b4764 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -172,8 +172,8 @@ matrix:
- ubuntu-toolchain-r-test
currently default builder is based on Xcode 7.3.1:
OS X 10.11 (darwin14.5.0)
Apple LLVM version 7.3.0
add the oldest available Xcode (6.4):
OS X 10.10 (darwin14.5.0)
Apple LLVM 6.1.0 (based on LLVM 3.6.0svn)
and the newer available Xcode (8.3.3):
OS X 10.12 (darwin16.6.0)
so more codebase is built
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Alex Bennée
---
.travis.yml | 8
1 file changed, 8 insertions(+)
diff --git a/.travis.yml b/.travis.yml
index 53d8e79bf5..0220f7472e 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -9,10 +9,12 @@ addons:
apt:
From: Peter Maydell
Add config to travis to do a Coverity Scan build and upload, using
the new run-coverity-scan script.
There is an official integration between Travis and Coverity Scan:
https://github.com/travis-ci/travis-build/blob/master/lib/travis/build/addons/coverity_scan.rb
which slurp
$ make info
GEN qemu-doc.html
qemu-doc.texi:8: warning: unrecognized encoding name `UTF-8'.
GEN qemu-doc.txt
qemu-doc.texi:8: warning: unrecognized encoding name `UTF-8'.
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 2 ++
1 file changed, 2 insertions(+)
diff --g
From: Peter Maydell
Update the travis list of library packages to install so that
our build tests cover more of our code base.
Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 18 +++
This allow a one liner from fresh repository clone, i.e.:
./configure && make -j check-qtest-aarch64
Signed-off-by: Philippe Mathieu-Daudé
---
tests/Makefile.include | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/Makefile.include b/tests/Makefile.include
index 77da9
installed VMs come already updated, and brew is smart enough to upgrade some
dependencies are missing.
see https://docs.travis-ci.com/user/osx-ci-environment#homebrew
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 1 -
1 file changed, 1 deletion(-)
diff --git a/.travis.yml b/.travis.y
Travis caching uses the branch name to store packed cache, so each new branch
will trigger a cache miss and will clone all submodules. Subsequent builds will
benefit from the cache.
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
These patches try to improve our Travis CI usage (quite a few failures the last
days).
This series include Peter's "Automate coverity scan uploads via Travis"
patches (here numbered 3 to 6). See
https://www.mail-archive.com/qemu-devel@nongnu.org/msg457443.html
Patch 7 is expected to enter /master
example of failure: https://travis-ci.org/qemu/qemu/jobs/243232857
$ sudo apt-get update -qq
W: Failed to fetch
http://llvm.org/apt/trusty/dists/llvm-toolchain-trusty-3.9/Release.gpg
Connection failed
E: Some index files failed to download. They have been ignored, or old ones
used
On Jun 21, 2017, at 12:28 PM, Peter Maydell wrote:
On 21 June 2017 at 17:27, G 3 wrote:
On Jun 21, 2017, at 12:20 PM, Peter Maydell wrote:
We don't yet have any mechanism for having tests that need to
be compiled for the target architecture, do we?
I don't know about that but I do know we
2017-06-22 0:28 GMT+08:00 Radim Krčmář :
> 2017-06-20 20:14-0700, Wanpeng Li:
>> From: Wanpeng Li
>>
>> This patch adds async pf flag to KVM_GET/SET_VCPU_EVENTS interface.
>>
>> Signed-off-by: Wanpeng Li
>> ---
>> diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h
>> @@ -300,6
From: Wanpeng Li
This patch adds async page fault flag to KVM_GET/SET_VCPU_EVENTS interface.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Signed-off-by: Wanpeng Li
---
v1 -> v2:
* reuse the pad for async_page_fault
* cleanup coding style
linux-headers/asm-x86/kvm.h | 3 ++-
target/i386/cpu.h
在 6/19/2017 6:49 PM, Kevin Wolf 写道:
'info block' shows nothing, but we can't add drive who's id
is'drive-virtio-disk1' too.
Yes, the old BlockBackend is only fully freed when the guest actually
unplugs the device. Specifically, we would have to free the QemuOpts
in DriveInfo that keeps the ID re
Public bug reported:
The Bug:
DirectSound Audio does not stop because dsound_ctl_out does not end up calling
IDirectSoundBuffer_Stop. This is due to a bug in dsound_get_status_out where
the status flags returned from IDirectSoundBuffer_GetStatus are compared with
DSERR_BUFFERLOST (an error code
On Wed, 21 Jun 2017, Paul Durrant wrote:
> If grant copy is available then it will always be used in preference to
> persistent maps. In this case feature-persistent should not be advertized
> to the frontend, otherwise it may needlessly copy data into persistently
> granted buffers.
>
> Signed-of
On Wed, 21 Jun 2017, Paul Durrant wrote:
> The blkif protocol has had provision for negotiation of multi-page shared
> rings for some time now and many guest OS have support in their frontend
> drivers.
>
> This patch makes the necessary modifications to xen-disk support a shared
> ring up to orde
Properly set the book E exception syndrome register when a floating
point exception occurs.
Currently on a book E processor, the POWERPC_EXCP_FP exception handler
fails to set "env->spr[SPR_BOOKE_ESR] = ESR_FP;" as required by the
book E specification.
Signed-off-by: Aaron Larson
---
target/ppc
On 2017-06-13 14:16, Pavel Butsykin wrote:
> This patch add shrinking of the image file for qcow2. As a result, this allows
> us to reduce the virtual image size and free up space on the disk without
> copying the image. Image can be fragmented and shrink is done by punching
> holes
> in the image
On 06/21/2017 06:19 AM, Kashyap Chamarthy wrote:
> This edition documents (including their QMP invocations) all four
> operations:
>
> - `block-stream`
> - `block-commit`
> - `drive-mirror` (& `blockdev-mirror`)
> - `drive-backup` (& `blockdev-backup`)
>
> Things considered while writin
On 06/21/2017 03:19 AM, Yang Zhong wrote:
Split the cpu_set_mxcsr()/cpu_set_fpuc() with specific tcg code.
tcg_update_mxcsr()/tcg_set_fpuc() need be implemented in tcg-stub.c
file if tcg is disabled.
Signed-off-by: Yang Zhong
---
accel/stubs/tcg-stub.c | 8
target/i386/cpu.h
On 06/21/2017 03:19 AM, Yang Zhong wrote:
+case "$target_name" in
+
alpha|arm|armeb|aarch64|cris|hppa|lm32|m68k|microblaze|microblazeel|mips|mipsel|
\
+
mipsn32|mipsn32el|mips64|mips64el|moxie|nios2|or1k|ppc|ppcemb|ppc64|ppc64le|ppc64abi32|
\
+
sh4|sh4eb|sparc|sparc64|sparc32plus|s390x|ti
On 2017-06-13 14:16, Pavel Butsykin wrote:
> Whenever l2/refcount table clusters are discarded from the file we can
> automatically drop unnecessary content of the cache tables. This reduces
> the chance of eviction useful cache data and eliminates inconsistent data
> in thecache with the data in t
On 06/21/2017 03:19 AM, Yang Zhong wrote:
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -52,7 +52,9 @@
#include "exec/cpu-defs.h"
+#ifdef CONFIG_TCG
#include "fpu/softfloat.h"
+#endif
#define R_EAX 0
#define R_ECX 1
@@ -1130,8 +1132,9 @@ typedef struct CPUX86State {
On 2017-06-13 14:16, Pavel Butsykin wrote:
> The flag as additional precaution of data loss. Perhaps in the future the
> operation shrink without this flag will be banned, but while we need to
> maintain compatibility.
>
> Signed-off-by: Pavel Butsykin
> ---
> qemu-img-cmds.hx | 4 ++--
>
On Wed, Jun 21, 2017 at 07:42:15PM +0200, Greg Kurz wrote:
> The 9P protocol is transport agnostic: if the guest misconfigured the
> buffers, the best we can do is to set the broken flag on the device.
>
> We check if the transport isn't broken already to avoid printing extra
> error messages.
>
On Wed, Jun 21, 2017 at 07:41:58PM +0200, Greg Kurz wrote:
> If the guest sends a malformed request, we end up with a dangling pointer
> in V9fsVirtioState. This doesn't seem to cause any bug, but let's remove
> this side effect anyway.
>
> Signed-off-by: Greg Kurz
Reviewed-by: Michael S. Tsirki
On 06/21/2017 02:07 PM, Laurent Vivier wrote:
Signed-off-by: Laurent Vivier
---
v2:
add missing cpu_m68k_set_fpcr() to update FPU internal state
The v1 was in the v5 of the series "target-m68k: implement 680x0 FPU"
linux-user/signal.c | 43 +++
1 f
On 2017-06-21 18:43, Markus Armbruster wrote:
> Max Reitz writes:
>
>> This generic function (along with its implementations for different
>> types) determines whether two QObjects are equal.
>>
>> Signed-off-by: Max Reitz
>> ---
>> include/qapi/qmp/qbool.h | 1 +
>> include/qapi/qmp/qdict.h
On 2017-06-21 18:24, Markus Armbruster wrote:
> Max Reitz writes:
>
>> Reviewed-by: Kevin Wolf
>> Signed-off-by: Max Reitz
>> ---
>> include/qapi/qmp/qnull.h | 26 ++
>> include/qapi/qmp/qobject.h | 8
>> include/qapi/qmp/types.h | 1 +
>> qobject/qnull.c
This fails because this patch must be applied on top of my last pull
request.
Laurent
> /var/tmp/patchew-tester-tmp-rz35mvuf/src/linux-user/signal.c: In function
> ‘target_rt_save_fpu_state’:
> /var/tmp/patchew-tester-tmp-rz35mvuf/src/linux-user/signal.c:5687:38: error:
> request for member ‘d’
On 2017-06-21 18:06, Markus Armbruster wrote:
> Max Reitz writes:
>
>> Currently, bdrv_reopen_prepare() assumes that all BDS options are
>> strings. However, this is not the case if the BDS has been created
>> through the json: pseudo-protocol or blockdev-add.
>>
>> Note that the user-invokable r
Signed-off-by: Laurent Vivier
---
v2:
add missing cpu_m68k_set_fpcr() to update FPU internal state
The v1 was in the v5 of the series "target-m68k: implement 680x0 FPU"
linux-user/signal.c | 43 +++
1 file changed, 43 insertions(+)
diff --git a/linux-
Coldfire uses float64, but 680x0 use floatx80.
This patch introduces the use of floatx80 internally
and enables 680x0 80bits FPU.
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
Message-Id: <20170620205121.26515-4-laur...@vivier.eu>
---
target/m68k/cpu.c| 4 +-
target/m68
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
Message-Id: <20170620205121.26515-5-laur...@vivier.eu>
---
configure| 2 +-
gdb-xml/m68k-fp.xml | 21 +
target/m68k/helper.c | 45 +
3 files changed, 67 inse
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
Message-Id: <20170620205121.26515-6-laur...@vivier.eu>
---
target/m68k/cpu.c| 2 +-
target/m68k/cpu.h| 43 +-
target/m68k/fpu_helper.c | 117 +---
target/m68k/helper.c | 22 ++-
target/m68k/helpe
on reset, set FP registers to NaN and control registers to 0
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
Message-Id: <20170620205121.26515-3-laur...@vivier.eu>
---
target/m68k/cpu.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/target/m68k/cpu.c b/
The following changes since commit 8dfaf23ae1f2273a9730a9b309cc8471269bb524:
tcg/tci: fix tcg-interpreter build (2017-06-20 18:39:15 +0100)
are available in the git repository at:
git://github.com/vivier/qemu-m68k.git tags/m68k-for-2.10-pull-request
for you to fetch changes up to ba62494483
Move code of fmove to/from control register to a function
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20170620205121.26515-2-laur...@vivier.eu>
---
target/m68k/translate.c | 56 +++--
Hi Adam, thank you for your reply.
On Mon, Jun 19, 2017 at 2:08 PM, Adam Lackorzynski
wrote:
> Hi,
>
> On Tue Jun 13, 2017 at 17:05:41 -0700, Anatol Pomozov wrote:
>> Do these arguments sound reasonable to apply the patch?
>
> I'm not really convinced.
>
>> On Thu, Jun 8, 2017 at 2:07 PM, Anatol
On 06/21/2017 01:16 PM, Dr. David Alan Gilbert wrote:
* Sam (batmanu...@gmail.com) wrote:
Thank you~
1. We have a compare test on qemu-kvm enviroment with huge page and without
huge page. Qemu start process is much longer in huge page enviromwnt. And I
write an email titled with '[DPDK-memory]
Alexey Perevalov wrote:
> This patch adds ability to track down already received
> pages, it's necessary for calculation vCPU block time in
> postcopy migration feature, maybe for restore after
> postcopy migration failure.
> Also it's necessary to solve shared memory issue in
> postcopy livemigra
* Sam (batmanu...@gmail.com) wrote:
> Thank you~
>
> 1. We have a compare test on qemu-kvm enviroment with huge page and without
> huge page. Qemu start process is much longer in huge page enviromwnt. And I
> write an email titled with '[DPDK-memory] how qemu waste such long time
> under dpdk huge
* Juan Quintela (quint...@redhat.com) wrote:
> Once there, I rename ram_migration_cleanup() to ram_save_cleanup().
> Notice that this is the first pass, and I only passed XBZRLE to the
> new scheme. Moved decoded_buf to inside XBZRLE struct.
> As a bonus, I don't have to export xbzrle functions fr
On Wed, 21 Jun 2017, Jan Beulich wrote:
> >>> On 20.06.17 at 23:48, wrote:
> > On Tue, 20 Jun 2017, Jan Beulich wrote:
> >> @@ -36,13 +33,7 @@ struct blkif_x86_32_request_discard {
> >> blkif_sector_t sector_number;/* start sector idx on disk (r/w
> >> only) */
> >> uint64_t
On 06/21/2017 11:38 AM, Anatol Pomozov wrote:
I observe the same situation. My host CPU (Intel Xeon CPU E5-2690)
supports 1gb pages but qemu keeps it disabled by default. I have to use
either '-cpu phenom' or '-cpu host' with KVM.
It makes me wondering what is the default CPU for QEMU? Is it pos
Public bug reported:
I have an OS that tries to use SSE operations. It works fine in qemu.
But it crashes when I try to run the OS at the host cpu using KVM.
The instruction that crahes with #GP(0) is
movaps ADDR,%xmm0
The documentation says ADDR has to be 16-bytes alignment otherwise #GP
is ge
I observe the same situation. My host CPU (Intel Xeon CPU E5-2690)
supports 1gb pages but qemu keeps it disabled by default. I have to use
either '-cpu phenom' or '-cpu host' with KVM.
It makes me wondering what is the default CPU for QEMU? Is it possible
to set qemu CPU featureset closer to what
The 9P protocol is transport agnostic: if the guest misconfigured the
buffers, the best we can do is to set the broken flag on the device.
We check if the transport isn't broken already to avoid printing extra
error messages.
Signed-off-by: Greg Kurz
---
hw/9pfs/9p.c |2 +-
hw
The 9p spec at http://man.cat-v.org/plan_9/5/intro reads:
"Each 9P message begins with a four-byte size field specify-
ing the length in bytes of the complete message including
the four bytes of the size field itself. The next byte is
the message type, one of the constants in the enumerati
Contrary to what is written in the comment, a buggy guest can misconfigure
the transport buffers and pdu_marshal() may return an error. If this ever
happens, it is up to the transport layer to handle the situation (9P is
transport agnostic).
This fixes Coverity issue CID1348518.
Signed-off-by: G
The 9p protocol relies on a reliable transport, but the current code
treats transport errors (ie, failure to marshal or unmarshal) as if
they were coming from the backend. This doesn't make sense: if the
transport failed, we should notify the guest that the transport is
broken and needs to be reset
If the guest sends a malformed request, we end up with a dangling pointer
in V9fsVirtioState. This doesn't seem to cause any bug, but let's remove
this side effect anyway.
Signed-off-by: Greg Kurz
---
hw/9pfs/virtio-9p-device.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --g
Le 21/06/2017 à 18:37, Richard Henderson a écrit :
> On 06/21/2017 09:18 AM, Philippe Mathieu-Daudé wrote:
>>> +typedef CPU_LDoubleU FPReg;
>>
>> What an awful name... Anyway checking on "qemu/bswap.h" it seems there
>> is some endianess issue with it if your host is little-endian.
>
> There is no
Max Reitz writes:
> This generic function (along with its implementations for different
> types) determines whether two QObjects are equal.
>
> Signed-off-by: Max Reitz
> ---
> include/qapi/qmp/qbool.h | 1 +
> include/qapi/qmp/qdict.h | 1 +
> include/qapi/qmp/qfloat.h | 1 +
> include
On Jun 21, 2017, at 12:20 PM, Peter Maydell wrote:
On 21 June 2017 at 17:14, Philippe Mathieu-Daudé
wrote:
do you think you can add your test as a qtest, to run it with
check-qtest?
We don't yet have any mechanism for having tests that need to
be compiled for the target architecture, do w
On Jun 21, 2017, at 12:14 PM, Philippe Mathieu-Daudé wrote:
Hi John,
On 05/09/2017 10:58 AM, G 3 wrote:
On May 9, 2017, at 5:55 AM, BALATON Zoltan wrote:
On Tue, 9 May 2017, Aurelien Jarno wrote:
| main.c: In function 'print_fpscr_settings':
| main.c:73:26: warning: suggest parentheses ar
On 06/21/2017 09:18 AM, Philippe Mathieu-Daudé wrote:
+typedef CPU_LDoubleU FPReg;
What an awful name... Anyway checking on "qemu/bswap.h" it seems there is some
endianess issue with it if your host is little-endian.
There is no endian-ness issue because we do not attempt to read that struct
Signed-off-by: Roman Kagan
---
target/i386/hyperv.h | 1 +
hw/misc/hyperv_testdev.c | 1 +
target/i386/hyperv.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/target/i386/hyperv.h b/target/i386/hyperv.h
index f101144..cba6cbf 100644
--- a/target/i386/hyperv.h
+++ b/target/i386/hype
Peter Maydell writes:
> On 21 June 2017 at 17:14, Philippe Mathieu-Daudé wrote:
>> do you think you can add your test as a qtest, to run it with check-qtest?
>
> We don't yet have any mechanism for having tests that need to
> be compiled for the target architecture, do we?
I posted a proof of
Add infrastructure to signal SynIC event flags by atomically setting the
corresponding bit in the event flags page and firing a SINT if
necessary.
Signed-off-by: Roman Kagan
---
v1 -> v2:
- swapped kvm_hv_sint_route_set_sint and memory_region_set_dirty
target/i386/hyperv.h | 2 ++
target/i386
Signed-off-by: Roman Kagan
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 120788d..16c5422 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -852,6 +852,13 @@ F: hw/core/machine.c
F: hw/core/null-machine.c
F: include/hw/boards.h
+Hyper-V
Add testmodes for SynIC messages and events. The message or event
connection setup / teardown is initiated by the guest via new control
codes written to the test device port. Then the test connections bounce
the respective operations back to the guest, i.e. the incoming messages
are posted or the
Make Hyper-V SynIC a device which is attached as a child to X86CPU. For
now it only makes SynIC visibile in the qom hierarchy, and maintains its
internal fields in sync with the respecitve msrs of the parent cpu (the
fields will be used in followup patches).
Signed-off-by: Roman Kagan
---
v1 ->
On 21 June 2017 at 17:27, G 3 wrote:
> On Jun 21, 2017, at 12:20 PM, Peter Maydell wrote:
>> We don't yet have any mechanism for having tests that need to
>> be compiled for the target architecture, do we?
>
>
> I don't know about that but I do know we have image files that can be booted
> in vari
Add handling of POST_MESSAGE hypercall. For that, add an interface to
regsiter a handler for the messages arrived from the guest on a
particular connection id (IOW set up a message connection in Hyper-V
speak).
Signed-off-by: Roman Kagan
---
v1 -> v2:
- use single mutex for evt and msg handler
2017-06-20 20:14-0700, Wanpeng Li:
> From: Wanpeng Li
>
> This patch adds async pf flag to KVM_GET/SET_VCPU_EVENTS interface.
>
> Signed-off-by: Wanpeng Li
> ---
> diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h
> @@ -300,6 +301,7 @@ struct kvm_vcpu_events {
>
Hyper-V identifies vCPUs by Virtual Processor (VP) index which can be
queried by the guest via HV_X64_MSR_VP_INDEX msr. It is defined by the
spec as a sequential number which can't exceed the maximum number of
vCPUs per VM.
It has to be owned by QEMU in order to preserve it across migration.
How
Add handling of SIGNAL_EVENT hypercall. For that, provide an interface
to associate an EventNotifier with an event connection number, so that
it's signaled when the SIGNAL_EVENT hypercall with the matching
parameters is called by the guest.
TODO: we should be able to move this to KVM and avoid ex
Per Hyper-V spec, SynIC message and event flag pages are to be
implemented as so called overlay pages. That is, they are owned by the
hypervisor and, when mapped into the guest physical address space,
overlay the guest physical pages such that
1) the overlaid guest page becomes invisible to the g
Use X86CPU pointer to refer to the respective HvSintRoute instead of
vp_index. This is more convenient and also paves the way for future
enhancements.
Signed-off-by: Roman Kagan
---
v1 -> v2:
- was patch 11 in v1
- pass vp_index to sint_route_create, and lookup X86CPU * inside
target/i386/hy
Multiple entities (e.g. VMBus devices) can use the same SINT route. To
make their lives easier in maintaining SINT route ownership, make it
reference-counted. Adjust the respective API names accordingly.
Signed-off-by: Roman Kagan
---
target/i386/hyperv.h | 10 +-
hw/misc/hyperv_te
Certain configurations do not allow SynIC to be used in QEMU. In
particular,
- when hyperv_vpindex is off, SINT routes can't be used as they refer to
the destination vCPU by vp_index
- older KVM (which doesn't expose KVM_CAP_HYPERV_SYNIC2) zeroes out
SynIC message and event pages on every ms
Add two hyperv-related caps
[they should arrive through the usual kernel header harvesting; this
patch allows to build QEMU before that happens].
Signed-off-by: Roman Kagan
---
linux-headers/linux/kvm.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/linux-headers/linux/kvm.h b/linux-heade
Initially SINTx msrs should be in "masked" state. To ensure that
happens on *every* reset, move setting their values to
kvm_arch_vcpu_reset.
Signed-off-by: Roman Kagan
---
v1 -> v2:
- split out of v1 patch 4
target/i386/kvm.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
Make sint ack callback accept an opaque pointer, that is stored on
sint_route at creation time.
This allows for more convenient interaction with the callback.
Besides, nothing outside hyperv.c should need to know the layout of
HvSintRoute fields any more so its declaration can be removed from the
The value of HV_X64_MSR_SVERSION is initialized once at vcpu init, and
is reset to zero on vcpu reset, which is wrong.
It is supposed to be a constant, so drop the field from X86CPU, set the
msr with the constant value, and don't bother getting it.
Signed-off-by: Roman Kagan
---
v1 -> v2:
- spl
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