Hi Ladi,
In this case both guests are CentOS 7.3 running the same kernel 3.10.0-514.21.1.
Also the guest that fails most frequently is running Docker with 4 or 5
containers.
Another thing I would like to mention is that the host is running on Alpine's
default grsec patched kernel. I have the op
Hi Fernando,
On Tue, Jun 20, 2017 at 12:10 AM, Fernando Casas Schössow
wrote:
> Hi Ladi,
>
> Today two guests failed again at different times of day.
> One of them was the one I switched from virtio_blk to virtio_scsi so this
> change didn't solved the problem.
> Now in this guest I also disabled
edu.c does not contain any target-specific code, so we can put
it into common-obj-y to compile it only once for all targets.
Signed-off-by: Thomas Huth
---
hw/misc/Makefile.objs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
inde
There does not seem to be any target specific code in this file, so
we can put it into "common-obj" instead of "obj" to compile it only
once for all targets.
Signed-off-by: Thomas Huth
---
Makefile.objs | 2 +-
Makefile.target | 2 +-
bootdevice.c| 2 +-
3 files changed, 3 insertions(+), 3
Commit 1f5c00cfdb8114c ("qom/cpu: move tlb_flush to cpu_common_reset")
moved the call to tlb_flush() from the target-specific reset handlers
into the common code qom/cpu.c file, and protected the call with
"#ifdef CONFIG_SOFTMMU" to avoid that it is called for linux-user
only targets. But since qom
CONFIG_SOFTMMU should never be used in common code, so mark
it as poisoned, too.
Signed-off-by: Thomas Huth
---
include/exec/poison.h | 1 +
include/qom/cpu.h | 8
2 files changed, 9 insertions(+)
diff --git a/include/exec/poison.h b/include/exec/poison.h
index 32707cd..41cd2eb 100
Since we've got some new CPU targets in QEMU during the last months
and years, we've got some new TARGET_xxx defines now which should
be marked as poisoned for common code.
Signed-off-by: Thomas Huth
---
include/exec/poison.h | 16
1 file changed, 16 insertions(+)
diff --git a/
CONFIG_KVM is only defined for target-specific code, so nobody should
use it by accident in common code. To avoid such subtle bugs,
CONFIG_KVM is now marked as poisoned in common code. The header
include/sysemu/kvm.h is somewhat special since it is included
all over the place from common code, too,
pc.h and sysemu/kvm.h are also included from common code (where
CONFIG_KVM is not available), so the #defines that depend on CONFIG_KVM
should not be declared here to avoid that anybody is using them in a
wrong way. Since we're also going to poison CONFIG_KVM for common code,
let's move them to kvm
This series marks some more #defines as poisoned, which are
target-specific (declared in config-target.h) and thus must
not be used in common code.
v3:
- Mark some more TARGET_xxx and CONFIG_xxx defines as poisoned in
the first two patches (as requested by Richard)
- Added the final patch to mov
These are defined in config-target.h and thus should never be
used in common code.
Signed-off-by: Thomas Huth
---
include/exec/poison.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/include/exec/poison.h b/include/exec/poison.h
index 859bd56..7a025b2 100644
--- a/inc
On 19.06.2017 23:49, Richard Henderson wrote:
> On 06/14/2017 12:21 PM, Thomas Huth wrote:
>> #pragma GCC poison TARGET_CRIS
>> #pragma GCC poison TARGET_LM32
>
> Missing HPPA and TILEGX.
Oh, looks like I missed the new defines from the -linux-user targets ...
thanks for the hint, I'll send a
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH] AcpiDeviceIf: More readable bitmask definition
Type: series
Message-id: 1497879848-7612-1-git-send-email-clud...@genua.de
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=bas
On 20.06.2017 01:44, Richard Henderson wrote:
> On 06/19/2017 01:08 AM, Thomas Huth wrote:
>>> +/* Sanity check the function code and storage characteristic. */
>>> +if (fc > 1 || sc > 3) {
>>> +if (!s390_has_feat(S390_FEAT_COMPARE_AND_SWAP_AND_STORE_2)) {
>>> +goto spe
Hi, Marcel
On 06/19/2017 08:05 PM, Marcel Apfelbaum wrote:
On 12/06/2017 16:48, Mao Zhongyi wrote:
In order to propagate error message better, convert shpc_init() to
Error also convert the pci_bridge_dev_initfn() to realize.
Cc: m...@redhat.com
Cc: mar...@redhat.com
Cc: arm...@redhat.com
Signe
On 06/19/2017 09:59 AM, Mark Cave-Ayland wrote:
The setting of the FW_CFG_VERSION_DMA bit is the same across both the
TYPE_FW_CFG_MEM and TYPE_FW_CFG_IO devices, so unify the logic in
fw_cfg_init1().
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laszlo Ersek
Tested-by: Laszlo Ersek
Reviewed-
On 06/19/2017 09:04 PM, Richard Henderson wrote:
Most of the PSW bits that were being copied into TB->flags
are not relevant to translation. Removing those that are
unnecessary reduces the amount of translation required.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
On 20/06/17 11:02, David Gibson wrote:
> On Mon, Jun 19, 2017 at 12:32:48PM +0200, Thomas Huth wrote:
>> On 19.06.2017 11:39, Alexander Graf wrote:
>>> On 06/15/2017 03:33 PM, Peter Maydell wrote:
I've just noticed that on a SPARC host, some of the PPC guests
warn during make check:
Hi, Marcel
On 06/19/2017 07:42 PM, Marcel Apfelbaum wrote:
On 12/06/2017 16:48, Mao Zhongyi wrote:
The pci-birdge device i82801b11
It is a dmi-to-pci brigde
and io3130_upstream/downstream
You forgot to mention the pcie_root_port.
still implements the old PCIDeviceClass .init() through *
OK,
Grub is bellow, which use huge page 1G.
linux16 /boot/vmlinuz-0-rescue-1324ca4d8099476d99a8633e7cb952b7
> root=UUID=9c3cf5ff-7c35-40c4-a6d9-0fc67683c4ed ro crashkernel=auto rhgb
> quiet default_hugepagesz=1G hugepagesz=1G hugepages=112, isolcpus=2,18
this is command line, ddc979cd is vhostu
AIUI, ->unplug_request in the HotplugHandler is used for "soft"
unplug, where acknowledgement from the guest is required before
completing the unplug, whereas ->unplug is used for "hard" unplug
where qemu unilaterally removes the device, and the guest just has to
cope with its sudden absence. For
At the moment, spapr_drc_release() has an ugly switch on the DRC type to
call the right, device-specific release function. This cleans it up by
doing that via a proper QOM method.
It's still arguably an abstraction violation for the DRC code to call into
the specific device code, but one mess at
This fifth set of cleanups to the DRC code mostly deals with removing
unnecessary differences between different cases on the various hot
plug and unplug paths.
David Gibson (5):
spapr: Leave DR-indicator management to the guest
spapr: Uniform DRC reset paths
spapr: Add DRC release method
s
DRC objects have a regular device reset method. However, it only gets
called in the usual way for PCI DRCs. Because of where CPU and LMB DRCs
are in the QOM tree, their device reset method isn't automatically called.
So, the machine manually registers reset handlers to call device_reset().
This
spapr_drc_attach() has a 'coldplug' parameter which sets the DRC into
configured state initially, instead of the usual ISOLATED/UNUSABLE state.
It turns out this is unnecessary: although coldplugged devices do need to
be in CONFIGURED state once the guest starts, that will already be
accomplished b
The DR-indicator is essentially a "virtual LED" attached to a hotpluggable
device, which the guest can set to various states for the attention of
the operator or management layers.
It's mostly guest managed, except that we once-off set it to
ACTIVE/INACTIVE in the attach/detach path. While that m
On Mon, Jun 19, 2017 at 05:52:27PM -0500, Michael Roth wrote:
> Quoting David Gibson (2017-06-08 00:09:30)
> > There are substantial differences in the various paths through
> > set_isolation_state(), both for setting to ISOLATED versus UNISOLATED
> > state and for logical versus physical DRCs.
> >
On Mon, Jun 19, 2017 at 12:32:48PM +0200, Thomas Huth wrote:
> On 19.06.2017 11:39, Alexander Graf wrote:
> > On 06/15/2017 03:33 PM, Peter Maydell wrote:
> >> I've just noticed that on a SPARC host, some of the PPC guests
> >> warn during make check:
> >>
> >>/ppc64/prom-env/pseries:
> >> qemu
Sorry I botched the format in the previous two versions.
And that automatic build test failure was unrelated.
Gerd, regarding your response to the original patch:
> Patch looks good but fails to apply.
Have you had a chance to consider/test this further?
Is there anything you would like me to c
On Thu, Jun 08, 2017 at 03:09:24PM +1000, David Gibson wrote:
> This fourth isntallment of cleanups to the DRC code introduces the
> first changes to the fundamental state handling. We change the
> initial states in the reset code and attach code for PCI devices, and
> are able to remove the 'sign
Drop TRT from the set of insns handled internally by EXECUTE.
It's more important to adjust the existing helper to handle
both TRT and TRTR.
Signed-off-by: Richard Henderson
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 20 +--
Since we require all registers saved on input, read R0 from ENV instead
of passing it manually. Recognize the specification exception when R0
contains incorrect data.
Signed-off-by: Richard Henderson
---
target/s390x/helper.h | 2 +-
target/s390x/mem_helper.c | 11 ---
target/s390x
Missed the proper alignment in TRTO/TRTT, and ignoring the M3
field for all TRXX insns without ETF2-ENH.
Signed-off-by: Richard Henderson
---
target/s390x/mem_helper.c | 11 ++-
target/s390x/translate.c | 5 +++--
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/target/s
Signed-off-by: Richard Henderson
---
target/s390x/helper.h | 6 +
target/s390x/insn-data.def | 13 ++
target/s390x/mem_helper.c | 309 +
target/s390x/translate.c | 44 +++
4 files changed, 372 insertions(+)
diff --git a/target/s390x/hel
Signed-off-by: Richard Henderson
---
target/s390x/cpu_models.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index be7757c..16129f6 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -678,11 +678,13 @@ static voi
Most of the PSW bits that were being copied into TB->flags
are not relevant to translation. Removing those that are
unnecessary reduces the amount of translation required.
Signed-off-by: Richard Henderson
---
target/s390x/cpu.h | 24 +---
target/s390x/translate.c | 16
Signed-off-by: Richard Henderson
---
target/s390x/cpu_models.c | 2 +
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 +
target/s390x/mem_helper.c | 189 +
target/s390x/translate.c | 13 +++-
5 files changed, 206 insertions(+
This facility bit includes execution-hint, load-and-trap,
miscellaneous-instruction-extensions and processor-assist.
Signed-off-by: Richard Henderson
---
target/s390x/cpu_models.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 1db8
Signed-off-by: Richard Henderson
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 44
target/s390x/translate.c | 8
4 files changed, 55 insertions(+)
diff --git a/target/s390x/helper.h
Signed-off-by: Richard Henderson
---
target/s390x/insn-data.def | 3 +++
target/s390x/translate.c | 1 +
2 files changed, 4 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index b64d465..9c8f184 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-
This facility bit includes DFP-rounding, FPR-GR-transfer,
FPS-sign-handling, and IEEE-exception-simulation. We do
support all of these.
Signed-off-by: Richard Henderson
---
target/s390x/cpu_models.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu
From: David Hildenbrand
This adds support for the MOVE WITH OPTIONAL SPECIFICATIONS (MVCOS)
instruction. Allow to enable it for the qemu cpu model using
qemu-system-s390x ... -cpu qemu,mvcos=on ...
This allows to boot linux kernel that uses it for uacccess.
We are missing (as for most other pa
This facility bit includes load-on-condition-2 and
load-and-zero-rightmost-byte.
Signed-off-by: Richard Henderson
---
target/s390x/cpu_models.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 703feca..1db814b 100644
--- a/target/s39
Signed-off-by: Richard Henderson
---
target/s390x/insn-data.def | 9 +
target/s390x/insn-format.def | 1 +
target/s390x/translate.c | 18 +++---
3 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
inde
The FAC_ names were placeholders prior to the introduction
of the current facility modeling.
Signed-off-by: Richard Henderson
---
target/s390x/translate.c | 59
1 file changed, 29 insertions(+), 30 deletions(-)
diff --git a/target/s390x/translate
Changes since v2:
* Dropped the enforcement of PGM_OPERATION for insns for
which the feature bit is set. There's no agreement on
exactly how to do this yet.
* Add implementations of insns for 6 more facilities.
I think we can get to z990 fairly quickly after this.
Ignoring HFP, the on
From: David Hildenbrand
Such shifts are usually used to easily extract the PSW KEY from the PSW
mask, so let's avoid the confusing offset of 4.
Reviewed-by: Thomas Huth
Signed-off-by: David Hildenbrand
Message-Id: <20170614133819.18480-2-da...@redhat.com>
Signed-off-by: Richard Henderson
---
On 06/19/2017 01:08 AM, Thomas Huth wrote:
+/* Sanity check the function code and storage characteristic. */
+if (fc > 1 || sc > 3) {
+if (!s390_has_feat(S390_FEAT_COMPARE_AND_SWAP_AND_STORE_2)) {
+goto spec_exception;
+}
+if (fc > 2 || sc > 4 || (fc =
In mapped security modes, files are created with very restrictive
permissions (600 for files and 700 for directories). This makes
file sharing between virtual machines and users on the host rather
complicated. Imagine eg. a group of users that need to access data
produced by processes on a virtual
Hi Greg,
thank you for your hints on improving this patch. I've implemented them all
in this version.
In the last version of the patch I moved the path check down because I moved
the g_strdup and tried to keep all operations performed on path as close
together as possible to increase readability.
On 06/12/2017 07:54 AM, Lluís Vilanova wrote:
Adds macro QTAILQ_FOREACH_CONTINUE to support incremental list
traversal.
Signed-off-by: Lluís Vilanova
---
include/qemu/queue.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/qemu/queue.h b/include/qemu/queue.h
index
On Mon, 19 Jun 2017, Gabriel L. Somlo wrote:
On Sun, Jun 18, 2017 at 11:25:15PM +0200, BALATON Zoltan wrote:
After 77af8a2b9 (hw/i386: Use Rev3 FADT (ACPI 2.0) instead of Rev1 to
improve guest OS support.) OS X 10.11.6 hangs during boot near detecting
IOAPIC. (Gabriel's latest v3 applesmc patch
Quoting David Gibson (2017-06-08 00:09:24)
> This fourth isntallment of cleanups to the DRC code introduces the
> first changes to the fundamental state handling. We change the
> initial states in the reset code and attach code for PCI devices, and
> are able to remove the 'signalled' state variab
Quoting David Gibson (2017-06-08 00:09:30)
> There are substantial differences in the various paths through
> set_isolation_state(), both for setting to ISOLATED versus UNISOLATED
> state and for logical versus physical DRCs.
>
> So, split the set_isolation_state() method into isolate() and unisol
On 06/16/2017 02:18 AM, Peter Maydell wrote:
(As an aside I wonder whether any still-used hardware has
the cache aliasing constraints in question :-))
I strongly doubt it. Certainly none of the 64-bit chips have this.
Amusingly, while we require a 64-bit chip in TCG, we do allow elf32 via
sp
On 06/19/17 20:49, Mark Cave-Ayland wrote:
> On 19/06/17 18:09, Laszlo Ersek wrote:
>
>>> What seems to happen is that calling object_property_add_child() only
>>> succeeds for the first instance and so a simple comparison is enough to
>>> determine that the device already exists at FW_CFG_PATH. O
Hi Ladi,
Today two guests failed again at different times of day.
One of them was the one I switched from virtio_blk to virtio_scsi so this
change didn't solved the problem.
Now in this guest I also disabled virtio_balloon, continuing with the
elimination process.
Also this time I found a diffe
On 06/19/2017 02:42 PM, Laurent Vivier wrote:
Le 19/06/2017 à 23:03, Laurent Vivier a écrit :
Le 19/06/2017 à 22:53, Richard Henderson a écrit :
It would also make me happier if we were to adjust the definition of
fl0atx80 to more closely match m68k and those missing zeros. Shouldn't
real har
On 06/14/2017 12:21 PM, Thomas Huth wrote:
+#pragma GCC poison CONFIG_ALPHA_DIS
+#pragma GCC poison CONFIG_ARM_A64_DIS
+#pragma GCC poison CONFIG_ARM_DIS
+#pragma GCC poison CONFIG_CRIS_DIS
+#pragma GCC poison CONFIG_I386_DIS
+#pragma GCC poison CONFIG_LM32_DIS
+#pragma GCC poison CONFIG_M68K_DIS
On 06/14/2017 12:21 PM, Thomas Huth wrote:
#pragma GCC poison TARGET_CRIS
#pragma GCC poison TARGET_LM32
Missing HPPA and TILEGX.
r~
Le 19/06/2017 à 23:03, Laurent Vivier a écrit :
> Le 19/06/2017 à 22:53, Richard Henderson a écrit :
>>
>> It would also make me happier if we were to adjust the definition of
>> fl0atx80 to more closely match m68k and those missing zeros. Shouldn't
>> real hardware move instructions propagate tho
On 06/13/2017 12:11 PM, Alex Bennée wrote:
Philippe Mathieu-Daudé writes:
remove some copy/paste leftover, code seems sane.
while running Alex Bennée's image aarch64-linux-3.15rc2-buildroot.img:
Trace 0x7fa1904b0890 [0: ffc00036cd04]
IN:
0xffc00036cd24: 5ac00694
On Tue, Jun 13, 2017 at 04:08:35AM -0600, sba...@raithlin.com wrote:
> From: Stephen Bates
>
> Add the ability for the NVMe model to support both the RDS and WDS
> modes in the Controller Memory Buffer.
>
> Although not currently supported in the upstreamed Linux kernel a fork
> with support exi
On 06/11/2017 04:16 PM, Laurent Vivier wrote:
@@ -95,8 +101,14 @@ static int cf_fpu_gdb_set_reg(CPUM68KState *env, uint8_t
*mem_buf, int n)
env->fregs[n].d = float64_to_floatx80(ldfq_p(mem_buf), &s);
return 8;
}
-if (n < 11) {
-/* FP control registers (not i
Hi,
I think there have been a few threads on the mailing list regarding tracing
guest virtual addresses for load and store instructions, but I have been
unable to get it to work. I am trying this for an AArch64 machine, and am
using the softmmu.
The tracing infrastructure provides the following e
Hi,
On Tue Jun 13, 2017 at 17:05:41 -0700, Anatol Pomozov wrote:
> Do these arguments sound reasonable to apply the patch?
I'm not really convinced.
> On Thu, Jun 8, 2017 at 2:07 PM, Anatol Pomozov
> wrote:
> > +reply-all
> >
> > On Thu, Jun 8, 2017 at 1:41 PM, Adam Lackorzynski
> > wrote:
>
Le 19/06/2017 à 22:53, Richard Henderson a écrit :
> On 06/11/2017 04:16 PM, Laurent Vivier wrote:
>> +static void gen_load_fp(DisasContext *s, int opsize, TCGv addr,
>> TCGv_ptr fp)
>> +{
>> +TCGv tmp;
>> +TCGv_i64 t64;
>> +int index = IS_USER(s);
>> +
>> +t64 = tcg_temp_new_i64();
Commit a0e640a8 introduced a path processing error.
Pass fstatat the dirpath based path component instead
of the entire path.
Signed-off-by: Bruce Rogers
---
hw/9pfs/9p-local.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/9pfs/9p-local.c b/hw/9pfs/9p-local.c
index 1e78b
On 06/11/2017 04:16 PM, Laurent Vivier wrote:
+static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp)
+{
+TCGv tmp;
+TCGv_i64 t64;
+int index = IS_USER(s);
+
+t64 = tcg_temp_new_i64();
+tmp = tcg_temp_new();
+switch (opsize) {
+case OS_BYTE:
+
qemu-backup will be a command-line tool for performing full and incremental
disk backups on running
VMs. It is intended as a reference implementation for management stack and
backup developers to
see QEMU's backup features in action. The following commit is an initial
implementation of manpage
On Mon, 19 Jun 2017 16:28:48 +0200
Tobias Schramm wrote:
I saw you wrote the full story in the cover letter, but I was asking for
something to be written here (so that it appears in git log). Something
concise and clear like:
"In mapped security mode, files get created with restricted file mode
On Mon, 19 Jun 2017 16:28:47 +0200
Tobias Schramm wrote:
> Hi,
>
> i've noticed that there is no way to control the permissions of newly created
> files and
> folders on the host when using 9p in mapped security mode. This can be a big
> problem when
> configuring permissions for access to suc
On 19/06/17 18:09, Laszlo Ersek wrote:
>> What seems to happen is that calling object_property_add_child() only
>> succeeds for the first instance and so a simple comparison is enough to
>> determine that the device already exists at FW_CFG_PATH. Or is this a
>> fairly terrible (ab)use of the QOM
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 40 +++-
1 file changed, 27 insertions(+), 13 deletions(-)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index fce382f..42370e5 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/a
Exit to cpu loop so we reevaluate cpu_arm_hw_interrupts.
Tested-by: Emilio G. Cota
Tested-by: Alex Bennée
Reviewed-by: Emilio G. Cota
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --g
Tested-by: Emilio G. Cota
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
target/alpha/translate.c | 27 ++-
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 7c45ae3..232af9e 100644
---
We can call tb_htable_lookup even when the tb_jmp_cache is completely
empty. Therefore, un-nest most of the code dependent on tb != NULL
from the read from the cache.
This improves the hit rate of lookup_tb_ptr; for instance, when booting
and immediately shutting down debian-arm, the hit rate imp
Exit to cpu loop so we reevaluate cpu_s390x_hw_interrupts.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
target/s390x/translate.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 8c055b7
From: "Emilio G. Cota"
Allocating an arbitrarily-sized array of tbs results in either
(a) a lot of memory wasted or (b) unnecessary flushes of the code
cache when we run out of TB structs in the array.
An obvious solution would be to just malloc a TB struct when needed,
and keep the TB array as
From: "Emilio G. Cota"
Add helpers to gather cache info from the host at init-time.
For now, only export the host's I/D cache line sizes, which we
will use to improve cache locality to avoid false sharing.
Suggested-by: Richard Henderson
Suggested-by: Geert Martin Ijewski
Tested-by:Geert
The new placement of the TB means that we can use one insn
to load the goto_tb destination directly from the TB.
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/tcg/arm/tcg-target.inc.c b/t
Since we're no longer using a direct branch, we have no
limit on the branch distance.
Signed-off-by: Richard Henderson
---
translate-all.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/translate-all.c b/translate-all.c
index 46c5592..d4f364d 100644
--- a/translate-all.c
+++ b/translate-al
The new placement of the TB means that we can use one insn
to load the return value for exit_tb returning the TB pointer.
Tested-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/tcg/aar
nto
staging (2017-06-19 17:54:30 +0100)
are available in the git repository at:
git://github.com/rth7680/qemu.git tags/pull-tcg-20170619
for you to fetch changes up to 8da54b2507c1cabf60c2de904cf0383b23239231:
target/arm: Exit after clearing aarch
From: "Emilio G. Cota"
We are partially initializing tb in tb_alloc. Instead, fully
initialize it in tb_gen_code, which is tb_alloc's only caller.
This saves an unnecessary write to tb->cflags.
Signed-off-by: Emilio G. Cota
Message-Id: <1497038122-26364-1-git-send-email-c...@braap.org>
Signed-
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 5 +
tcg/arm/tcg-target.inc.c | 17 ++---
2 files changed, 3 insertions(+), 19 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 87ae10b..724ec73 100644
--- a/include/exec/exec-all.h
Looks like #include "hw/qdev.h" is not needed here, so remove it.
Signed-off-by: Thomas Huth
---
ui/input.c | 1 -
ui/vnc.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/ui/input.c b/ui/input.c
index 290ca9f..2abd46d 100644
--- a/ui/input.c
+++ b/ui/input.c
@@ -1,5 +1,4 @@
#include "qe
This adds support for using LUKS as an encryption format
with the qcow2 file, using the new encrypt.format parameter
to request "luks" format. e.g.
# qemu-img create --object secret,data=123456,id=sec0 \
-f qcow2 -o encrypt.format=luks,encrypt.key-secret=sec0 \
test.qcow2 10G
The
Now that qcow & qcow2 are wired up to get encryption keys
via the QCryptoSecret object, nothing is relying on the
interactive prompting for passwords. All the code related
to password prompting can thus be ripped out.
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
Signed-off-by: Daniel P. Be
Currently 'qemu-img info' reports a simple "encrypted: yes"
field. This is not very useful now that qcow2 can support
multiple encryption formats. Users want to know which format
is in use and some data related to it.
Wire up usage of the qcrypto_block_get_info() method so that
'qemu-img info' can
This extends the 087 iotest to cover LUKS encryption when doing
blockdev-add.
Two further tests are added to validate read/write of LUKS
encrypted images with a single file and with a backing file.
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
Signed-off-by: Daniel P. Berrange
---
tests/
Update the qcow2 specification to describe how the LUKS header is
placed inside a qcow2 file, when using LUKS encryption for the
qcow2 payload instead of the legacy AES-CBC encryption
Reviewed-by: Eric Blake
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
Signed-off-by: Daniel P. Berrange
-
The 138 and 158 iotests exercise the legacy qcow2 aes encryption
code path and they work fine with qcow v1 too.
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
Signed-off-by: Daniel P. Berrange
---
tests/qemu-iotests/134 | 2 +-
tests/qemu-iotests/158 | 2 +-
2 files changed, 2 insertions(+
Expand the image format docs to cover the new options for
the qcow, qcow2 and luks disk image formats
Reviewed-by: Alberto Garcia
Reviewed-by: Eric Blake
Signed-off-by: Daniel P. Berrange
---
qemu-doc.texi | 123 ++
1 file changed, 115 in
This converts the qcow2 driver to make use of the QCryptoBlock
APIs for encrypting image content, using the legacy QCow2 AES
scheme.
With this change it is now required to use the QCryptoSecret
object for providing passwords, instead of the current block
password APIs / interactive prompting.
$
This converts the qcow driver to make use of the QCryptoBlock
APIs for encrypting image content. This is only wired up to
permit use of the legacy QCow encryption format. Users who wish
to have the strong LUKS format should switch to qcow2 instead.
With this change it is now required to use the QC
Now that all encryption keys must be provided upfront via
the QCryptoSecret API and associated block driver properties
there is no need for any explicit encryption handling APIs
in the block layer. Encryption can be handled transparently
within the block driver. We only retain an API for querying
w
Test 048 is designed to verify data preservation during an
image resize. The qcow (v1) format impl has never supported
resize so always fails.
Reviewed-by: Max Reitz
Reviewed-by: Alberto Garcia
Signed-off-by: Daniel P. Berrange
---
tests/qemu-iotests/048 | 2 +-
1 file changed, 1 insertion(+),
Instead of requiring separate input/output buffers for
encrypting data, change qcow2_encrypt_sectors() to assume
use of a single buffer, encrypting in place. The current
callers all used the same buffer for input/output already.
Reviewed-by: Eric Blake
Reviewed-by: Fam Zheng
Reviewed-by: Alberto
While the crypto layer uses a fixed option name "key-secret",
the upper block layer may have a prefix on the options. e.g.
"encrypt.key-secret", in order to avoid clashes between crypto
option names & other block option names. To ensure the crypto
layer can report accurate error messages, we must t
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