Hi
On Fri, May 26, 2017 at 6:34 AM Haozhong Zhang
wrote:
> file_ram_alloc() currently maps the backend file via mmap to a virtual
> address aligned to the value returned by qemu_fd_getpagesize(). When a
> DAX device (e.g. /dev/dax0.0) is used as the backend file, its kernel
> mmap implementation
Hi
On Fri, May 26, 2017 at 9:49 AM Kamil Rytarowski wrote:
> Currently ivshmem requires eventfd() which is Linux specific.
> Do not and build it unconditionally on every Linux/BSD/Solaris.
>
>
I think it should be able to use pipe fallback from event_notifier_init() .
> This patch indirectly f
On 05/25/2017 01:50 PM, Aurelien Jarno wrote:
On 2017-05-24 12:22, Richard Henderson wrote:
(1) The OR of the low bits or R1 into INSN were not being done
consistently; it was forgotten along all but the SVC path.
It was done for the logical ops assuming the instruction has the
corresponding b
On Wed, May 24, 2017 at 10:23:31AM +0530, Bharata B Rao wrote:
> This patchset fixes the migration of sPAPR radix guests.
Since Juan has approved merging the latest spin on the
unregister_savevm() patch through my tree, I've merged that, along
with your update 2/3 and 3/3 here. I did rework 2/3 a
Currently ivshmem requires eventfd() which is Linux specific.
Do not and build it unconditionally on every Linux/BSD/Solaris.
This patch indirectly fixes build failure on NetBSD, where these tools
additionally require -lrl for shm_open(3). In future there should be
added support for NetBSD and the
On 2017年05月26日 13:35, Jason Wang wrote:
On 2017年05月25日 21:18, Zhang Chen wrote:
@@ -472,7 +474,10 @@ static void colo_compare_connection(void
*opaque, void *user_data)
}
if (result) {
-ret = compare_chr_send(&s->chr_out, pkt->data,
pkt->size);
+
On 2017年05月25日 21:18, Zhang Chen wrote:
@@ -472,7 +474,10 @@ static void colo_compare_connection(void
*opaque, void *user_data)
}
if (result) {
-ret = compare_chr_send(&s->chr_out, pkt->data, pkt->size);
+ret = compare_chr_send(s,
+
On 2017年05月25日 20:58, Zhang Chen wrote:
static void filter_redirector_init(Object *obj)
{
+MirrorState *s = FILTER_REDIRECTOR(obj);
+
object_property_add_str(obj, "indev",
filter_redirector_get_indev,
filter_redirector_set_indev, NULL);
obje
On Thu, May 25, 2017 at 03:24:30PM +0800, Peter Xu wrote:
> On Mon, May 15, 2017 at 03:32:11PM +1000, David Gibson wrote:
> > On Thu, May 11, 2017 at 01:04:26PM +0800, Peter Xu wrote:
> > > On Wed, May 10, 2017 at 05:04:06PM +1000, David Gibson wrote:
> > > > On Mon, May 08, 2017 at 03:32:17PM +080
On Thu, May 25, 2017 at 09:00:25AM +0200, Juan Quintela wrote:
> Laurent Vivier wrote:
> D> We can replace the four remaining calls of register_savevm() by
> > calls to register_savevm_live(). So we can remove the function and
> > as we don't allocate anymore the ops pointer with g_new0()
> > we d
From: ZhuangYanying
When spin_lock_irqsave() deadlock occurs inside the guest, vcpu threads,
other than the lock-holding one, would enter into S state because of
pvspinlock. Then inject NMI via libvirt API "inject-nmi", the NMI could
not be injected into vm.
The reason is:
1 It sets nmi_queued t
Server class POWER CPUs have a "compat" property, which is used to set the
backwards compatibility mode for the processor. However, this only makes
sense for machine types which don't give the guest access to hypervisor
privilege - otherwise the compatibility level is under the guest's control.
T
From: Greg Kurz
This may be used for deprecated object properties that are kept for
backwards compatibility.
Signed-off-by: Greg Kurz
Reviewed-by: Markus Armbruster
Signed-off-by: David Gibson
---
qapi/string-input-visitor.c | 11 +++
qapi/string-output-visitor.c | 14 ++
As a rule, CPU internal state should never be updated when
!cpu->kvm_vcpu_dirty (or the HAX equivalent). If that is done, then
subsequent calls to cpu_synchronize_state() - usually safe and idempotent -
will clobber state.
However, we routinely do this during a loadvm or incoming migration.
Usual
On 2017年05月25日 20:55, Zhang Chen wrote:
On 05/25/2017 02:04 PM, Jason Wang wrote:
On 2017年05月23日 22:20, Zhang Chen wrote:
We add the vnet_hdr option for filter-mirror, default is disable.
If you use virtio-net-pci net driver, please enable it.
You can use it for example:
-object
filter-m
This is a rebased and revised version of my patches revising CPU
compatiblity mode handling on ppc, last posted in November. Since
then, many of the patches have already been merged (some for 2.9, some
since). This is what's left.
* There was conceptual confusion about what a compatibility mode
Migrating between different CPU versions is a bit complicated for ppc.
A long time ago, we ensured identical CPU versions at either end by
checking the PVR had the same value. However, this breaks under KVM
HV, because we always have to use the host's PVR - it's not
virtualized. That would mean w
Currently, the CPU compatibility mode is set when the cpu is initialized,
then again when the guest negotiates features. This means if a guest
negotiates a compatibility mode, then reboots, that compatibility mode
will be retained across the reset.
Usually that will get overridden when features a
On 05/24/2017 09:30 PM, Eric Blake wrote:
On 05/23/2017 09:56 PM, Wang Dong wrote:
Hi guys,
I am new to qemu. But I need do some job in it right now.
When I try read qmp code. I found a interesting part against it.
Some C source code is generate from json file.
I wonder why this? What is t
Further investigation shows that pause may be working, but very very
slowly.
The "use-case" in NetBSD is for "hatching" application CPUs. The target
CPU runs a loop that does
while (flag_1 not set)
for (i = 0; i < 1; i++)
x86_pause(); /* which is assem
On 05/25/17 20:34 -0700, Dan Williams wrote:
> On Thu, May 25, 2017 at 7:32 PM, Haozhong Zhang
> wrote:
> > Applications in Linux guest that use device-dax never trigger flush
> > that can be trapped by KVM/QEMU. Meanwhile, if the host backend is not
> > device-dax, QEMU cannot guarantee the persi
On Thu, May 04, 2017 at 12:07:47PM +0200, Greg Kurz wrote:
> On Thu, 27 Apr 2017 17:28:43 +1000
> David Gibson wrote:
>
> > Migrating between different CPU versions is a bit complicated for ppc.
> > A long time ago, we ensured identical CPU versions at either end by
> > checking the PVR had the s
On 2017年05月25日 22:35, Eric Blake wrote:
[meta-comment]
On 05/25/2017 07:22 AM, Jason Wang wrote:
[snip]
On 2017年05月16日 15:12, Wei Wang wrote:
Hi:
17 levels of '>' when I add my reply. Wow.
I think that's another direction or future extension.
We already have the vhost-pci to virtio-net
On 2017年05月25日 02:05, Vladislav Yasevich wrote:
Expose the virtio-net self annoucement capability and allow
qemu_announce_self() to call it.
Signed-off-by: Vladislav Yasevich
---
hw/net/virtio-net.c | 32 +---
1 file changed, 29 insertions(+), 3 deletions(-)
di
On 2017年05月25日 02:05, Vladislav Yasevich wrote:
Some network devices have a capability to do self annoucements
(ex: virtio-new).
I thought you mean "virtio-net" here.
Add infrustrcture that would allow devices
to expose this ability.
Signed-off-by: Vladislav Yasevich
---
include/net/net
On 2017年05月25日 02:05, Vladislav Yasevich wrote:
Switch qemu_announce_self and virtio annoucements to use
the announcement timer framework. This makes sure that both
timers use the same timeouts and number of annoucement attempts
Based on work by Dr. David Alan Gilbert
Signed-off-by: Vladisl
On Thu, Apr 27, 2017 at 02:51:31PM -0500, Michael Roth wrote:
> Quoting David Gibson (2017-04-27 02:28:43)
> > Migrating between different CPU versions is a bit complicated for ppc.
> > A long time ago, we ensured identical CPU versions at either end by
> > checking the PVR had the same value. How
On Wed, May 24, 2017 at 10:23:33AM +0530, Bharata B Rao wrote:
> HPT gets created by default for TCG guests and later when the guest turns
> out to be a radix guest, the HPT is destroyed when guest does
> H_REGISTER_PROC_TBL hcall. Let HTAB savevm handlers registration and
> unregistration follow t
On 2017年05月25日 02:05, Vladislav Yasevich wrote:
Introdec
Typo.
Thanks
an annoucement timer structure and initialization to
be used by for self-annoucement.
Based on the work by Germano Veit Michel
Signed-off-by: Vlad Yasevich
---
include/migration/vmstate.h | 13 +
migra
On 2017年05月25日 02:05, Vladislav Yasevich wrote:
Add parameters that control RARP/GARP announcement timeouts.
The parameters structure is added to the QAPI and a qmp command
is added to set/get the parameter data.
Based on work by "Dr. David Alan Gilbert"
Signed-off-by: Vladislav Yasevich
I
On Thu, May 25, 2017 at 7:32 PM, Haozhong Zhang
wrote:
> Applications in Linux guest that use device-dax never trigger flush
> that can be trapped by KVM/QEMU. Meanwhile, if the host backend is not
> device-dax, QEMU cannot guarantee the persistence of guest writes.
> Before solving this flushing
On 05/26/2017 12:03 AM, Paolo Bonzini wrote:
On 25/05/2017 05:19, guangrong.x...@gmail.com wrote:
Note: as qemu needs a precise timer to drive its rtc timer callbacks,
that means clock=vm is not suitable for us as it's driven by icount
for qtest, so that we use clock=host instead, it is why
Public bug reported:
In qemu 2.9.0 if you run
qemu-system-x86_64 -cpu Broadwell (or Haswell)
then the CPU features1 flag include the SSE3 bit, but do NOT include the
MONITOR/MWAIT bit. This is so even when the host includes the features.
Additionally, running qemu in this manner results i
On 03/23/17 08:36 +, Stefan Hajnoczi wrote:
> On Tue, Mar 21, 2017 at 01:33:57PM +0800, Xiao Guangrong wrote:
> > From: Xiao Guangrong
> >
> > My Intel mail account will be disabled soon, update the mail info
> > to my private mail
> >
> > Signed-off-by: Xiao Guangrong
> > ---
> > MAINTAIN
On Thu, May 04, 2017 at 07:09:11PM +0200, Andrea Bolognani wrote:
> On Thu, 2017-04-27 at 17:28 +1000, David Gibson wrote:
> > @@ -2480,6 +2480,10 @@ static void spapr_machine_initfn(Object *obj)
> > " place of standard EPOW events when
> >possible"
> >
On Tue, May 02, 2017 at 04:24:55PM +0200, Greg Kurz wrote:
> On Thu, 27 Apr 2017 17:28:41 +1000
> David Gibson wrote:
[snip]
> > @@ -45,18 +48,21 @@ static const CompatInfo compat_table[] = {
> > .max_threads = 2,
> > },
> > { /* POWER7, ISA2.06 */
> > +.name = "power7",
On Thu, May 25, 2017 at 11:20:02AM +, Felipe Franciosi wrote:
> + Matthew Rosato, original reviewer of 070afca25
>
> > On 25 May 2017, at 02:03, Peter Xu wrote:
> >
> > On Wed, May 24, 2017 at 05:10:03PM +0100, Felipe Franciosi wrote:
> >> The commit message from 070afca25 suggests that dirt
file_ram_alloc() currently maps the backend file via mmap to a virtual
address aligned to the value returned by qemu_fd_getpagesize(). When a
DAX device (e.g. /dev/dax0.0) is used as the backend file, its kernel
mmap implementation may require an alignment larger than what
qemu_fd_get_pagesize() re
Applications in Linux guest that use device-dax never trigger flush
that can be trapped by KVM/QEMU. Meanwhile, if the host backend is not
device-dax, QEMU cannot guarantee the persistence of guest writes.
Before solving this flushing problem, QEMU should warn users if the
host backend is not devic
Applications in Linux guest that use device-dax never trigger flush
that can be trapped by KVM/QEMU. Meanwhile, if the host backend is not
device-dax, QEMU cannot guarantee the persistence of guest writes.
Before solving this flushing problem, QEMU should warn users if the
host backend is not devic
file_ram_alloc() currently maps the backend file via mmap to a virtual
address aligned to the value returned by qemu_fd_getpagesize(). When a
DAX device (e.g. /dev/dax0.0) is used as the backend file, its kernel
mmap implementation may require an alignment larger than what
qemu_fd_get_pagesize() re
lsi_mem_read/write() always return 0 about which their
callers actually don't care. Change the function type
to void.
Signed-off-by: Mao Zhongyi
---
hw/scsi/lsi53c895a.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c
ind
On Thu, 05/25 18:32, Paolo Bonzini wrote:
> Minimal changes to:
> - fix compilation (patch 10)
> - appease checkpatch (patch 17)
> - rename mutex field from "spin" to "lock" (patch 18)
Thanks, queued.
Fam
Public bug reported:
Using qemu-2.9.0
When booting NetBSD using '-cpu haswell -smp 4', the system fails to
initialize the additional CPUs. It appears as though the "application
processor" enters routine x86_pause() but never returns.
x86_pause() is simply two assembler instructions: 'pause; ret
adj_len_to_page doesn't return the correct result when the address
is already page aligned and the length is bigger than a page. Fix that.
Signed-off-by: Aurelien Jarno
---
target/s390x/mem_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
The patch 17 (improve MOVE LONG and MOVE L
On May 25, 2017, at 4:05 PM, jos...@linux.vnet.ibm.com wrote:
> On Tue, May 23, 2017 at 11:33:03PM -0300, jos...@linux.vnet.ibm.com wrote:
>> On Tue, May 23, 2017 at 11:47:30AM +0530, Nikunj A Dadhania wrote:
>>> G 3 writes:
>>>
On May 22, 2017, at 4:32 AM, qemu-devel-requ...@nongnu.org wr
On 2017-05-24 15:08, Richard Henderson wrote:
> While the previous patch is required for proper conformance,
> the vast majority of target insns are MVC and XC for implementing
> memmove and memset respectively. The next most common are CLC,
> TR, and SVC.
>
> Implementing these (and a few others
On 2017-05-24 15:08, Richard Henderson wrote:
> Previously, helper_ex would construct the insn and then implement
> the insn via direct calls other helpers. This was sufficient to
> boot Linux but that is all.
>
> It is easy enough to go the whole nine yards by stashing state for
> EXECUTE within
On 2017-05-24 15:08, Richard Henderson wrote:
> This split will be required for implementing EXECUTE properly.
> Do this now as a separate step to aid comparison of before and
> after TB listings.
>
> Signed-off-by: Richard Henderson
> ---
> target/s390x/mem_helper.c | 54
>
On 2017-05-24 15:08, Richard Henderson wrote:
> Use this saved value instead of recomputing from next_pc difference.
>
> Signed-off-by: Richard Henderson
> ---
> target/s390x/translate.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
Reviewed-by: Aurelien Jarno
--
Aurelie
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 3 +++
target/s390x/mem_helper.c | 23 +++
target/s390x/translate.c | 9 +
4 files changed, 36 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390x/helper
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 9 +
target/s390x/mem_helper.c | 46 ++
target/s390x/translate.c | 13 +
4 files changed, 69 insertions(+)
diff --git a/target/s39
For that we need to make program_interrupt available to qemu-user.
Fortunately there is almost nothing to change as both kvm_enabled and
CONFIG_KVM evaluate to false in that case.
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 50 --
target/s390x/translate.c | 18 +
4 files changed, 61 insertions(+), 10 deletions(-)
diff --gi
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 47 --
target/s390x/translate.c | 11 +++
4 files changed, 55 insertions(+), 6 deletions(-)
diff --git a/tar
Use a common helper with PACK ASCII as the differences are limited to
the stride of the source operand.
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 30 +-
target/s390x/translate.
As MVCL and MVCLE only differ by their operands, use a common
do_mvcl helper. Optimize it calling fast_memmove and fast_memset.
Correctly write back addresses.
Signed-off-by: Aurelien Jarno
---
target/s390x/mem_helper.c | 90 +--
1 file changed, 40 ins
Improve fix_address to also handle the 24-bit mode. Rename fix_address
to wrap_address to better explain what is changed.
For the same reason, rename get_address into get_address_rel and
get_address_31fix into get_address_rel.
Finally replace many calls to get_address_rel with x2 = 0 and b2 = 0 b
As CLCL and CLCLE mostly differ by their operands, use a common do_clcl
helper. Another difference is that CLCL is not interruptible.
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 86 +
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 35 +++
target/s390x/translate.c | 16
4 files changed, 54 insertions(+)
diff --git a/target/s390x/helper.h b/t
There are multiple issues with the COMPARE LOGICAL LONG EXTENDED
instruction:
- The test between the two operands is inverted, leading to an inversion
of the cc values 1 and 2.
- The address and length of an operand continue to be decreased after
reaching the end of this operand. These values a
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 51 ++
target/s390x/translate.c | 17
4 files changed, 71 insertions(+)
diff --git a/target/s390x/h
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 4
target/s390x/mem_helper.c | 31 +++
target/s390x/translate.c | 8
4 files changed, 44 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390
Now that the extended-translation facility 2 has been fully implemented,
it's possible to emulated a most a z800 CPU with TCG.
Signed-off-by: Aurelien Jarno
---
target/s390x/cpu_models.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/s390x/cpu_models.c b/target/s3
Signed-off-by: Aurelien Jarno
---
target/s390x/mem_helper.c | 37 ++---
1 file changed, 30 insertions(+), 7 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index 2b0cde13b4..bbb3eceb71 100644
--- a/target/s390x/mem_helper.c
+++ b/ta
Signed-off-by: Aurelien Jarno
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate.c | 18 ++
2 files changed, 20 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 53c86d5832..751e3164dd 100644
--- a/target/s390x/insn-data.def
++
Signed-off-by: Aurelien Jarno
---
target/s390x/mem_helper.c | 47 +--
1 file changed, 33 insertions(+), 14 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index bbb3eceb71..1dc71fe5f0 100644
--- a/target/s390x/mem_helper
Signed-off-by: Aurelien Jarno
---
target/s390x/insn-data.def | 3 +++
target/s390x/translate.c | 11 +++
2 files changed, 14 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 0f70acea5c..170b50ef2e 100644
--- a/target/s390x/insn-data.def
+++ b/ta
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 13 +
target/s390x/translate.c | 8
4 files changed, 24 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index fe7
Signed-off-by: Aurelien Jarno
---
target/s390x/mem_helper.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index 4b96c279e3..88e2a0f60d 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -110
Signed-off-by: Aurelien Jarno
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate.c | 16
2 files changed, 18 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index f92bfde4f8..53c86d5832 100644
--- a/target/s390x/insn-data.def
+++
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 13 +
target/s390x/translate.c | 8
4 files changed, 24 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 7d6
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 12
target/s390x/translate.c | 8
4 files changed, 23 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index fdd6
Signed-off-by: Aurelien Jarno
---
target/s390x/insn-data.def | 3 +++
target/s390x/translate.c | 10 ++
2 files changed, 13 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index f818437069..0f70acea5c 100644
--- a/target/s390x/insn-data.def
+++ b/tar
This patchset tries to improve the s390x emulation by fixing and
improving some instructions. It implement some more instructions, from
the zArchitecture base or from the Extended-Translation Facility 2. The
last patch updates the maximum TCG CPU to z800, as the ETF2 and
Long-Displacement
Facilit
Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 5 +
target/s390x/mem_helper.c | 37 +
target/s390x/translate.c | 8
4 files changed, 51 insertions(+)
diff --git a/target/s390x/helper.h b/targ
Signed-off-by: Aurelien Jarno
---
target/s390x/translate.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 4bd16d9f99..850df26ce1 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -5455,10 +545
On 2017-05-24 12:22, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target/s390x/insn-data.def | 1 +
> target/s390x/translate.c | 1 +
> 2 files changed, 2 insertions(+)
Reviewed-by: Aurelien Jarno
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurel...
On 2017-05-24 12:22, Richard Henderson wrote:
> Also provide the cross-cpu tlb flushing required by the PoO.
>
> Signed-off-by: Richard Henderson
> ---
> target/s390x/helper.h | 2 +-
> target/s390x/insn-data.def | 2 +-
> target/s390x/mem_helper.c | 32
>
On 2017-05-24 12:22, Richard Henderson wrote:
> The PoO specifies that when R1==0, no ORing into the insn
> loaded from storage takes place. Load a zero for this case.
>
> Signed-off-by: Richard Henderson
> ---
> target/s390x/insn-data.def | 4 ++--
> target/s390x/translate.c | 14 ++
On 2017-05-24 12:22, Richard Henderson wrote:
> (1) The OR of the low bits or R1 into INSN were not being done
> consistently; it was forgotten along all but the SVC path.
It was done for the logical ops assuming the instruction has the
corresponding byte set to 0, as in that case it matches the l
On 2017-05-24 12:22, Richard Henderson wrote:
> Fix saving exception_index around mmu_translate; eliminate a dead store.
>
> Signed-off-by: Richard Henderson
> ---
> target/s390x/mem_helper.c | 6 +++---
> target/s390x/translate.c | 1 -
> 2 files changed, 3 insertions(+), 4 deletions(-)
Revie
On 2017-05-24 12:22, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target/s390x/mem_helper.c | 25 +++--
> target/s390x/translate.c | 1 -
> 2 files changed, 15 insertions(+), 11 deletions(-)
Reviewed-by: Aurelien Jarno
--
Aurelien Jarno
On 2017-05-24 12:22, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target/s390x/mem_helper.c | 29 +
> target/s390x/translate.c | 1 -
> 2 files changed, 17 insertions(+), 13 deletions(-)
Reviewed-by: Aurelien Jarno
--
Aurelien Jarno
On 2017-05-24 12:22, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target/s390x/mem_helper.c | 30 ++
> target/s390x/translate.c | 1 -
> 2 files changed, 18 insertions(+), 13 deletions(-)
Reviewed-by: Aurelien Jarno
--
Aurelien Jarno
On 2017-05-24 12:22, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target/s390x/mem_helper.c | 44
> target/s390x/translate.c | 1 -
> 2 files changed, 24 insertions(+), 21 deletions(-)
Reviewed-by: Aurelien Jarno
--
Aurelie
On 2017-05-24 12:22, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target/s390x/mem_helper.c | 31 ++-
> target/s390x/translate.c | 1 -
> 2 files changed, 18 insertions(+), 14 deletions(-)
Reviewed-by: Aurelien Jarno
--
Aurelien Jarno
On 2017-05-24 12:22, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target/s390x/mem_helper.c | 31 ++-
> target/s390x/translate.c | 1 -
> 2 files changed, 18 insertions(+), 14 deletions(-)
Reviewed-by: Aurelien Jarno
--
Aurelien Jarno
On 2017-05-24 12:22, Richard Henderson wrote:
> This will avoid needing forward declarations in following patches.
>
> Signed-off-by: Richard Henderson
> ---
> target/s390x/mem_helper.c | 161
> +++---
> 1 file changed, 81 insertions(+), 80 deletions(-)
>
On Tue, May 23, 2017 at 11:33:03PM -0300, jos...@linux.vnet.ibm.com wrote:
> On Tue, May 23, 2017 at 11:47:30AM +0530, Nikunj A Dadhania wrote:
> > G 3 writes:
> >
> > > On May 22, 2017, at 4:32 AM, qemu-devel-requ...@nongnu.org wrote:
> > >
> > > Hello I have also done some work risu. My patches
On 05/25/2017 11:38 AM, Daniel P. Berrange wrote:
> Currently 'qemu-img info' reports a simple "encrypted: yes"
> field. This is not very useful now that qcow2 can support
> multiple encryption formats. Users want to know which format
> is in use and some data related to it.
>
> Wire up usage of t
On 05/25/2017 11:38 AM, Daniel P. Berrange wrote:
> Update the qcow2 specification to describe how the LUKS header is
> placed inside a qcow2 file, when using LUKS encryption for the
> qcow2 payload instead of the legacy AES-CBC encryption
>
> Reviewed-by: Alberto Garcia
> Reviewed-by: Max Reitz
On 05/25/2017 11:38 AM, Daniel P. Berrange wrote:
> Expand the image format docs to cover the new options for
> the qcow, qcow2 and luks disk image formats
>
> Signed-off-by: Daniel P. Berrange
> ---
> qemu-doc.texi | 123
> ++
> 1 file ch
On 05/25/2017 11:38 AM, Daniel P. Berrange wrote:
> When integrating the crypto support with qcow/qcow2, we don't
> want to use the bare LUKS option names "hash-alg", "key-secret",
> etc. We need to namespace them to match the nested QAPI schema.
>
> e.g. "encrypt.hash-alg", "encrypt.key-secret"
>
Essentialy the code for PowerPC BE and LE are the same, so this patch
renames all *ppc64le.* files to *ppc64.* and reflects such in the
Makefile.
Due to the fact that all supported archs are covered by guess_arch
function, this also drops the ARCH parameter from the Makefile.
Signed-off-by: Jose
This commit adds an option to risugen in order to give the opportunity
to generated big-endian instructions. By passing --be, users force
risugen to generated big-endian instructions for ppc64.
./risugen --be --numinsns 1000 --pattern "ADD" ppc64.risu test.bin
./risugen --numinsns 1000 --pattern "
v3:
- sent v2 in March and applied the review but, for some reason, this
patchset has never been sent.
- dropped ARCH parameter from makefile
- renamed *ppc64le.* to *ppc64.*
v2:
- applied code review
This patchset include initial support to PPC64 (Big-Endian), that is pretty
much the sam
Signed-off-by: Jose Ricardo Ziviani
---
risugen_ppc64.pm | 42 +++---
1 file changed, 31 insertions(+), 11 deletions(-)
diff --git a/risugen_ppc64.pm b/risugen_ppc64.pm
index 341478c..1a3cd59 100644
--- a/risugen_ppc64.pm
+++ b/risugen_ppc64.pm
@@ -99,6 +99,29
Uses the same ppc64 source file for both BE/LE archs since they are
essentially the same thing.
Signed-off-by: Jose Ricardo Ziviani
---
configure | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/configure b/configure
index 055e6d6..dd64d8b 100755
--- a/configure
+++ b
On 05/25/2017 01:19 PM, Vladimir Sementsov-Ogievskiy wrote:
> No, it will not be negative, all OK. I've mistaken. length of
> bs->file->bs will be positive anyway.
>
> Actually, current approach is the following:
>
> a. clusters allocated in qcow2 and after the end of bs->file: unallocated
How
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