Cc: 1635...@bugs.launchpad.net
Signed-off-by: Gerd Hoffmann
---
hw/display/qxl.h | 1 +
hw/display/qxl.c | 22 ++
2 files changed, 23 insertions(+)
diff --git a/hw/display/qxl.h b/hw/display/qxl.h
index d2d49dd..77e5a36 100644
--- a/hw/display/qxl.h
+++ b/hw/display/qxl.h
@@
On Mon, Apr 10, 2017 at 1:07 PM, wayen <1662...@bugs.launchpad.net> wrote:
> Hi Lidong Chen:
> I used QEMU 2.0.0 on Ubuntu 14.04.
> Do you mean your patch can make qemu-img convert qcow2 overlay into a new
> overlay?
yes. but i find it already fixed in 2.0.0.
do you add the -o backing_fil
While the configure script generates TARGET_SUPPORTS_MTTCG define, one
of the define is cpus.c is checking wrong name: TARGET_SUPPORT_MTTCG
Signed-off-by: Nikunj A Dadhania
---
cpus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cpus.c b/cpus.c
index 68fdbc4..58d90aa 10064
On Wed, Apr 05, 2017 at 02:41:44PM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> Under some circumstances, pci_intx() can return -1 (when the interrupt
> pin in the config space is 0 which normally means no interrupt).
>
> I have seen cases of pci_set_irq() being called on su
Alex Bennée writes:
> luigi burdo writes:
>
>> Hi David and Nikuji,
>>
>> can i suggest to remove the message:
>>
>>
>> Guest not yet converted to MTTCG - you may get unexpected results
>> where the mttcg is enabled?
>
> Have you declared the memory ordering for the guest?
No, I havent done tha
On Wed, Apr 05, 2017 at 02:41:40PM +0200, Cédric Le Goater wrote:
> Skiboot, the firmware for the PowerNV platform, expects the BMC to
> provide some specific IPMI sensors. These sensors are exposed in the
> device tree and their values are updated by the firmware at boot time.
>
> Sensors of inte
On Wed, Apr 05, 2017 at 02:41:41PM +0200, Cédric Le Goater wrote:
> OpenPOWER systems expect to be notified with such an event before a
> shutdown or a reboot. An OEM SEL message is sent with specific
> identifiers and a user data containing the request : OFF or REBOOT.
>
> Signed-off-by: Cédric L
On Wed, Apr 05, 2017 at 02:41:42PM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> This allows a bus class to tell whether a given bus has room for
> any new device. max_dev isn't sufficient as the rules can depend
> on some arguments or can differ between instances of a bus. Th
On Wed, Apr 05, 2017 at 02:41:39PM +0200, Cédric Le Goater wrote:
> When an ipmi-bt device [1] is defined on the ISA bus, we need to
> populate the device tree with the object properties. Such devices are
> created with the command line options :
>
>-device ipmi-bmc-sim,id=bmc0 -device isa-ipm
On Wed, Apr 05, 2017 at 02:41:43PM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> This adds a devfn_max field to PCIBus and adds a pci_can_add_device()
> function which, if no "addr" (aka devfn) is specified, will tell whether
> there is any slot free between devfn_min and devf
On Wed, Apr 05, 2017 at 02:41:37PM +0200, Cédric Le Goater wrote:
> The code could be common to any ISA device but we are missing the IO
> length.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
> ---
> hw/ppc/pnv.c | 30 ++
> 1 file changed, 30 inser
On Wed, Apr 05, 2017 at 02:41:36PM +0200, Cédric Le Goater wrote:
> This is an empty shell that we will use to include nodes in the device
> tree for ISA devices. We expect RTC, UART and IPMI BT devices.
>
> Signed-off-by: Cédric Le Goater
This is so simple, I'd probably fold it into the next pa
On Wed, Apr 05, 2017 at 02:41:38PM +0200, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
> ---
> hw/ppc/pnv.c | 33 +
> 1 file changed, 33 insertions(+)
>
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 2f9c41e350d4..00e5
Hi Lidong Chen:
I used QEMU 2.0.0 on Ubuntu 14.04.
Do you mean your patch can make qemu-img convert qcow2 overlay into a new
overlay?
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Ti
On Fri, Apr 07, 2017 at 06:59:07PM +0800, Peter Xu wrote:
> In this patch, IOMMUNotifier.{start|end} are introduced to store section
> information for a specific notifier. When notification occurs, we not
> only check the notification type (MAP|UNMAP), but also check whether the
> notified iova ran
Hi wayen:
Which version are you used?
I also find this problem on old version qemu, and i write a patch
for it. It works.
I'm not sure the mainline version have solve this problem.
what command are you used?
On Mon, Apr 10, 2017 at 10:14 AM, wayen <1662...@bugs.launchpad.net> wrote
i have been tested many times,i confirm ram device region references is not be
dropped,when detaching vhost net.
So far ,i do not have better idea to drop the references. the ram device
momery is special .
i think vhost listening the RAM devicemomery is not necessary. skip RAM device
mem
Signed-off-by: Fam Zheng
---
block/io.c| 4 ++--
include/block/block.h | 16
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/block/io.c b/block/io.c
index 7321dda..9598646 100644
--- a/block/io.c
+++ b/block/io.c
@@ -44,7 +44,7 @@ static void coroutin
Is there any way to remove holes from qcow2 overlay images? It's very
important to me. I am looking forward to your reply.
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Title:
qemu-img conv
The fact that the bs->aio_context is changing can confuse the dataplane
iothread, because of the now fine granularity aio context lock.
bdrv_drain should rather be a bdrv_drained_begin/end pair, but since
bs->aio_context is changing, we can just use aio_disable_external and
bdrv_parent_drained_begi
v3: Use bdrv_parent_drained_begin/end. [Kevin]
Do it before releasing new_context. [Stefan]
Fam Zheng (2):
block: Make bdrv_parent_drained_begin/end public
block: Quiesce old aio context during bdrv_set_aio_context
block.c | 7 +--
block/io.c| 4 ++--
incl
Is there any way to remove holes from sparse qcow2 overlay? It's very
important to me. I am looking forward to your reply.
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Title:
qemu-img conv
On Mon, Apr 10, 2017 at 9:47 AM, Fam Zheng wrote:
> On Sat, 04/08 21:29, 858585 jemmy wrote:
>> On Sat, Apr 8, 2017 at 12:52 PM, 858585 jemmy wrote:
>> > On Fri, Apr 7, 2017 at 6:10 PM, Fam Zheng wrote:
>> >> On Fri, 04/07 16:44, jemmy858...@gmail.com wrote:
>> >>> From: Lidong Chen
>> >>>
>> >
i'm sorry ,it should be memory_region_is_ram_device in new version qemu ,
memory_region_is_skip_dump is in older version qemu.
芦志朋 luzhipeng
IT开发工程师 IT Development
Engineer
操作系统产品部/中心研究院/系统产品 OS Product Dept./Central R&D Institute/System Product
四川省成都市天府大道中段800号
E: lu
On Sat, 04/08 21:29, 858585 jemmy wrote:
> On Sat, Apr 8, 2017 at 12:52 PM, 858585 jemmy wrote:
> > On Fri, Apr 7, 2017 at 6:10 PM, Fam Zheng wrote:
> >> On Fri, 04/07 16:44, jemmy858...@gmail.com wrote:
> >>> From: Lidong Chen
> >>>
> >>> BLOCK_SIZE is (1 << 20), qcow2 cluster size is 65536 by
On Mon, 04/10 09:10, 858585 jemmy wrote:
> >> +if (ret < 0) {
> >> +g_free(buf);
> >> +return ret;
> >> +}
> >
> > This if block is not necessary because...
>
> Hi Fam:
> It's necessary to
On Mon, 04/10 08:56, Paolo Bonzini wrote:
>
>
> On 07/04/2017 23:14, Kevin Wolf wrote:
> > One part of the reason is that
> > BDRV_POLL_WHILE() drops the lock since commit c9d1a561, so just calling
> > aio_context_acquire() doesn't protect you any more if there is any
> > chance that a nested fun
On Mon, Apr 10, 2017 at 8:51 AM, Fam Zheng wrote:
> On Sun, 04/09 20:37, jemmy858...@gmail.com wrote:
>> From: Lidong Chen
>>
>> BLOCK_SIZE is (1 << 20), qcow2 cluster size is 65536 by default,
>> this maybe cause the qcow2 file size is bigger after migration.
>> This patch check each cluster, us
On 07/04/2017 23:14, Kevin Wolf wrote:
> One part of the reason is that
> BDRV_POLL_WHILE() drops the lock since commit c9d1a561, so just calling
> aio_context_acquire() doesn't protect you any more if there is any
> chance that a nested function calls BDRV_POLL_WHILE().
Hi guys, sorry for the l
On Sun, 04/09 20:37, jemmy858...@gmail.com wrote:
> From: Lidong Chen
>
> BLOCK_SIZE is (1 << 20), qcow2 cluster size is 65536 by default,
> this maybe cause the qcow2 file size is bigger after migration.
> This patch check each cluster, use blk_pwrite_zeroes for each
> zero cluster.
>
> Signed-
On Mon, 10 Apr 2017 00:36:02 +0800
hrg wrote:
Hi,
> On Sun, Apr 9, 2017 at 11:55 PM, hrg wrote:
> > On Sun, Apr 9, 2017 at 11:52 PM, hrg wrote:
> >> Hi,
> >>
> >> In xen_map_cache_unlocked(), map to guest memory maybe in entry->next
> >> instead of first level entry (if map to rom other than
On 04/07/2017 11:51 PM, David Gibson wrote:
On Fri, Apr 07, 2017 at 11:37:49AM +0530, Nikunj A Dadhania wrote:
The series enables Multi-Threaded TCG on PPC64
Patch 01: Use atomic_cmpxchg in store conditional
02: Handle first write to page during atomic operation
03: Generate memory
On Sun, Apr 9, 2017 at 11:55 PM, hrg wrote:
> On Sun, Apr 9, 2017 at 11:52 PM, hrg wrote:
>> Hi,
>>
>> In xen_map_cache_unlocked(), map to guest memory maybe in entry->next
>> instead of first level entry (if map to rom other than guest memory
>> comes first), while in xen_invalidate_map_cache(),
On Sun, Apr 9, 2017 at 11:52 PM, hrg wrote:
> Hi,
>
> In xen_map_cache_unlocked(), map to guest memory maybe in entry->next
> instead of first level entry (if map to rom other than guest memory
> comes first), while in xen_invalidate_map_cache(), when VM ballooned
> out memory, qemu did not invali
Hi,
In xen_map_cache_unlocked(), map to guest memory maybe in entry->next
instead of first level entry (if map to rom other than guest memory
comes first), while in xen_invalidate_map_cache(), when VM ballooned
out memory, qemu did not invalidate cache entries in linked
list(entry->next), so when
luigi burdo writes:
> Hi David and Nikuji,
>
> can i suggest to remove the message:
>
>
> Guest not yet converted to MTTCG - you may get unexpected results
> where the mttcg is enabled?
Have you declared the memory ordering for the guest?
>
> another thing im finding is this message
> Guest e
luigi burdo writes:
> Hi, on info is mttcg using an amouth of ram for cpu caching and
> translating operations like was did in past by emulators like
> virtualpc,realpc, bluelabel or softwindows?
It's a fixed buffer. You can see if it being flushed by running:
info jit
On the QEMU monitor c
On Fri, Apr 7, 2017 at 7:33 PM, Stefan Hajnoczi wrote:
> On Fri, Apr 07, 2017 at 09:30:33AM +0800, 858585 jemmy wrote:
>> On Thu, Apr 6, 2017 at 10:02 PM, Stefan Hajnoczi wrote:
>> > On Wed, Apr 05, 2017 at 05:27:58PM +0800, jemmy858...@gmail.com wrote:
>> >> From: Lidong Chen
>> >>
>> >> when m
From: Lidong Chen
BLOCK_SIZE is (1 << 20), qcow2 cluster size is 65536 by default,
this maybe cause the qcow2 file size is bigger after migration.
This patch check each cluster, use blk_pwrite_zeroes for each
zero cluster.
Signed-off-by: Lidong Chen
---
migration/block.c | 38 +
Added Sytem register block of Smartfusion2.
This block has PLL registers which are accessed by guest.
Signed-off-by: Subbaraya Sundeep
---
hw/misc/Makefile.objs | 1 +
hw/misc/msf2_sysreg.c | 168 ++
2 files changed, 169 insertions(+)
create mod
Emulated Emcraft's Smartfusion2 System On Module starter
kit.
Signed-off-by: Subbaraya Sundeep
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/Makefile.objs| 2 +-
hw/arm/msf2_soc.c | 141
3 files changed, 143 insertions(+)
Modelled Microsemi's Smartfusion2 SPI controller.
Signed-off-by: Subbaraya Sundeep
---
hw/ssi/Makefile.objs | 1 +
hw/ssi/msf2_spi.c| 449 +++
2 files changed, 450 insertions(+)
create mode 100644 hw/ssi/msf2_spi.c
diff --git a/hw/ssi/Makef
Hi Qemu-devel,
I am trying to add Smartfusion2 SoC.
SoC is from Microsemi and System on Module(SOM)
board is from Emcraft systems. Smartfusion2 has hardened
Microcontroller(Cortex-M3)based Sub System and FPGA fabric.
At the moment only system timer, sysreg and SPI
controller are modelled.
Testing
Modelled System Timer in Microsemi's Smartfusion2 Soc.
Timer has two 32bit down counters and two interrupts.
Signed-off-by: Subbaraya Sundeep
---
hw/timer/Makefile.objs | 1 +
hw/timer/msf2_timer.c | 273 +
2 files changed, 274 insertions(+)
cr
Hi David and Nikuji,
can i suggest to remove the message:
Guest not yet converted to MTTCG - you may get unexpected results
where the mttcg is enabled?
another thing im finding is this message
Guest expects a stronger memory ordering than the host provides
This may cause strange/hard to debug
On Fri, Apr 07, 2017 at 11:37:49AM +0530, Nikunj A Dadhania wrote:
> The series enables Multi-Threaded TCG on PPC64
>
> Patch 01: Use atomic_cmpxchg in store conditional
> 02: Handle first write to page during atomic operation
> 03: Generate memory barriers for sync/isync and load/stor
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