Re: [Qemu-devel] [PATCH v2 1/2] target-ppc: add vextu[bhw]lx instructions

Richard Henderson writes: > On 11/24/2016 12:32 PM, Nikunj A Dadhania wrote: >> +#if defined(HOST_WORDS_BIGENDIAN) >> +# if defined(CONFIG_INT128) >> +# define VEXTULX_DO(name, size) \ >> +target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \ >>

Re: [Qemu-devel] [PATCH v2] pci: relax pci_msi_get_message()

On Fri, Nov 25, 2016 at 08:47:26AM +0200, Michael S. Tsirkin wrote: > On Fri, Nov 25, 2016 at 01:28:36PM +0800, Peter Xu wrote: > > On Fri, Nov 25, 2016 at 06:11:01AM +0200, Michael S. Tsirkin wrote: > > > On Tue, Nov 22, 2016 at 04:08:50PM +0800, Peter Xu wrote: > > > > We are very strict in the p

Re: [Qemu-devel] [PATCH v2] pci: relax pci_msi_get_message()

On Fri, Nov 25, 2016 at 01:28:36PM +0800, Peter Xu wrote: > On Fri, Nov 25, 2016 at 06:11:01AM +0200, Michael S. Tsirkin wrote: > > On Tue, Nov 22, 2016 at 04:08:50PM +0800, Peter Xu wrote: > > > We are very strict in the past getting MSIs from commit > > > d1f6af6a1 ("kvm-irqchip: simplify kvm_irq

Re: [Qemu-devel] [PATCH v2] pci: relax pci_msi_get_message()

On Fri, Nov 25, 2016 at 06:03:59AM +, Changlimin wrote: > update the link > > -device pci-assign,configfd=30,host=05:00.0,id=hostdev0,bus=pci.0,addr=0x3 > KVM pci-assign is configured, maybe the same reason as > http://lists.nongnu.org/archive/html/qemu-devel/2016-11/msg04649.html > please try

Re: [Qemu-devel] [PATCH v2] pci: relax pci_msi_get_message()

update the link -device pci-assign,configfd=30,host=05:00.0,id=hostdev0,bus=pci.0,addr=0x3 KVM pci-assign is configured, maybe the same reason as http://lists.nongnu.org/archive/html/qemu-devel/2016-11/msg04649.html please try the patch inside it. Chang limin

Re: [Qemu-devel] [PATCH v2] pci: relax pci_msi_get_message()

-device pci-assign,configfd=30,host=05:00.0,id=hostdev0,bus=pci.0,addr=0x3 KVM pci-assign is configured, maybe the same reason as http://lists.nongnu.org/archive/html/qemu-devel/2016-11/msg04668.html please try the patch inside it. Chang limin On Fri, Nov 25, 2016 at 06:11:01AM +0200, Michael S.

Re: [Qemu-devel] [PATCH v2] pci: relax pci_msi_get_message()

On Fri, Nov 25, 2016 at 06:11:01AM +0200, Michael S. Tsirkin wrote: > On Tue, Nov 22, 2016 at 04:08:50PM +0800, Peter Xu wrote: > > We are very strict in the past getting MSIs from commit > > d1f6af6a1 ("kvm-irqchip: simplify kvm_irqchip_add_msi_route"), assuming > > that MSI should be configured b

Re: [Qemu-devel] [PATCH v3 1/4] target-ppc: Implement bcdcfsq. instruction

On Fri, Nov 25, 2016 at 01:53:30AM -0200, Jose Ricardo Ziviani wrote: > bcdcfsq.: Decimal convert from signed quadword. It is not possible > to convert values less than -10^31-1 or greater than 10^31-1 to be > represented in packed decimal format. > > Signed-off-by: Jose Ricardo Ziviani > --- >

Re: [Qemu-devel] [PATCH v3 0/4] POWER9 TCG enablements - BCD functions part II

On Fri, Nov 25, 2016 at 01:53:29AM -0200, Jose Ricardo Ziviani wrote: > v3: > - use decimal numbers instead of hex when appropriate > - set condition register flag to the new form > - fix bcdcfsq loops boundaries > > v2: > - use div128 and mul64 functions to make code easier to understand > -

Re: [Qemu-devel] [PATCH] hw/pci: disable pci-bridge's shpc by default

On Thu, Nov 24, 2016 at 11:39:25AM +0200, Marcel Apfelbaum wrote: > On 11/24/2016 06:06 AM, David Gibson wrote: > > On Wed, Nov 23, 2016 at 01:08:46PM +0200, Marcel Apfelbaum wrote: > > > On 11/22/2016 10:25 PM, Laurent Vivier wrote: > > > > > > > > > > > > On 22/11/2016 18:26, Marcel Apfelbaum w

Re: [Qemu-devel] [PATCH v2] pci: relax pci_msi_get_message()

On Tue, Nov 22, 2016 at 04:08:50PM +0800, Peter Xu wrote: > We are very strict in the past getting MSIs from commit > d1f6af6a1 ("kvm-irqchip: simplify kvm_irqchip_add_msi_route"), assuming > that MSI should be configured before hand when fetching. When we have > unrecognized configurations, we pan

Re: [Qemu-devel] [PATCH v3 for-2.9 0/3] q35: add negotiable broadcast SMI

On Thu, Nov 24, 2016 at 09:37:41AM +0100, Laszlo Ersek wrote: > On 11/24/16 05:29, Michael S. Tsirkin wrote: > > On Wed, Nov 23, 2016 at 07:38:35PM -0500, Kevin O'Connor wrote: > >> As a general comment - it does seem unfortunate that we keep building > >> adhoc interfaces to communicate informatio

[Qemu-devel] [PATCH v3 4/4] target-ppc: Implement bcdsetsgn. instruction

bcdsetsgn.: Decimal set sign. This instruction copies the register value to the result register but adjust the signal according to the preferred sign value. Signed-off-by: Jose Ricardo Ziviani Reviewed-by: David Gibson --- target-ppc/helper.h | 1 + target-ppc/int_helper.c

[Qemu-devel] [PATCH v3 2/4] target-ppc: Implement bcdctsq. instruction

bcdctsq.: Decimal convert to signed quadword. It is possible to convert packed decimal values to signed quadwords. Signed-off-by: Jose Ricardo Ziviani Reviewed-by: David Gibson --- target-ppc/helper.h | 1 + target-ppc/int_helper.c | 40 +

[Qemu-devel] [PATCH v3 3/4] target-ppc: Implement bcdcpsgn. instruction

bcdcpsgn.: Decimal copy sign. Given two registers vra and vrb, it copies the vra value with vrb sign to the result register vrt. Signed-off-by: Jose Ricardo Ziviani Reviewed-by: David Gibson --- target-ppc/helper.h | 1 + target-ppc/int_helper.c | 23 +++

[Qemu-devel] [PATCH v3 1/4] target-ppc: Implement bcdcfsq. instruction

bcdcfsq.: Decimal convert from signed quadword. It is not possible to convert values less than -10^31-1 or greater than 10^31-1 to be represented in packed decimal format. Signed-off-by: Jose Ricardo Ziviani --- target-ppc/helper.h | 1 + target-ppc/int_helper.c | 38

[Qemu-devel] [PATCH v3 0/4] POWER9 TCG enablements - BCD functions part II

v3: - use decimal numbers instead of hex when appropriate - set condition register flag to the new form - fix bcdcfsq loops boundaries v2: - use div128 and mul64 functions to make code easier to understand - fixed int128 neg - improved functions bcdcpsgn and bcdsetsgn to do less work than

[Qemu-devel] [PATCH v3 10/11] tcg-mips: Adjust qemu_ld/st for mips64

Cc: Aurelien Jarno Cc: James Hogan Signed-off-by: Richard Henderson Signed-off-by: Jin Guojie --- tcg/mips/tcg-target.inc.c | 169 +++--- 1 file changed, 114 insertions(+), 55 deletions(-) diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc

[Qemu-devel] [PATCH v3 05/11] tcg-mips: Adjust move functions for mips64

tcg_out_mov: using OPC_OR as most mips assemblers do; tcg_out_movi: extended to 64-bit immediate. Cc: Aurelien Jarno Cc: James Hogan Signed-off-by: Richard Henderson Signed-off-by: Jin Guojie --- tcg/mips/tcg-target.inc.c | 34 +- 1 file changed, 25 insertions(

[Qemu-devel] [PATCH v3 11/11] tcg-mips: Adjust condition functions for mips64

32-bit condition functions(like brcond_i32) should only compare the low half parts of two 64-bit host registers. However, MIPS64 does not have distinct instruction for such operation. The operands should be sign extended to fit the case. Gcc handles 32-bit comparison in the same way, as the follow

[Qemu-devel] [PATCH v3 07/11] tcg-mips: Adjust prologue for mips64

Take stack frame parameters out from the function body. Cc: Aurelien Jarno Cc: James Hogan Signed-off-by: Richard Henderson Signed-off-by: Jin Guojie --- tcg/mips/tcg-target.inc.c | 54 ++- 1 file changed, 25 insertions(+), 29 deletions(-) diff --g

[Qemu-devel] [PATCH v3 06/11] tcg-mips: Adjust load/store functions for mips64

tcg_out_ldst: using a generic ALIAS_PADD to avoid ifdefs tcg_out_ld: generates LD or LW tcg_out_st: generates SD or SW Cc: Aurelien Jarno Cc: James Hogan Signed-off-by: Richard Henderson Signed-off-by: Jin Guojie --- tcg/mips/tcg-target.inc.c | 14 +++--- 1 file changed, 11 insertions

[Qemu-devel] [PATCH v3 09/11] tcg-mips: Adjust calling conventions for mips64

Cc: Aurelien Jarno Cc: James Hogan Signed-off-by: Richard Henderson Signed-off-by: Jin Guojie --- tcg/mips/tcg-target.h | 19 +++ tcg/mips/tcg-target.inc.c | 21 +++-- 2 files changed, 30 insertions(+), 10 deletions(-) diff --git a/tcg/mips/tcg-target.h b/t

[Qemu-devel] [PATCH v3 03/11] tcg-mips: Support 64-bit opcodes

Bulk patch adding 64-bit opcodes into tcg_out_op. Note that mips64 is as yet neither complete nor enabled. Cc: Aurelien Jarno Cc: James Hogan Signed-off-by: Richard Henderson Signed-off-by: Jin Guojie --- tcg/mips/tcg-target.h | 41 ++ tcg/mips/tcg-target.inc.c | 322 +++

[Qemu-devel] [PATCH v3 08/11] tcg-mips: Add tcg unwind info

Cc: Aurelien Jarno Cc: James Hogan Signed-off-by: Richard Henderson Signed-off-by: Jin Guojie --- tcg/mips/tcg-target.inc.c | 44 1 file changed, 44 insertions(+) diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index d4623b0..621

[Qemu-devel] [PATCH v3 02/11] tcg-mips: Add mips64 opcodes

Since the mips manual tables are in octal, reorg all of the opcodes into that format for clarity. Note that the 64-bit opcodes are as yet unused. Cc: Aurelien Jarno Cc: James Hogan Signed-off-by: Richard Henderson Signed-off-by: Jin Guojie --- tcg/mips/tcg-target.inc.c | 193

[Qemu-devel] [PATCH v3 00/11] tcg mips64 and mips r6 improvements

Changes since v2: * Update against master(v2.8.0-rc1) * Tested on Loongson as mips32r2(el) and mips64r2(el) hosts. Loongson only implements little-endian mips32/mips64 ISA. * Fully work for 32-bit and 64-bit guests. Fix two bugs：segmentation fault on mips64el with 32-bit guests,

[Qemu-devel] [PATCH v3 04/11] tcg-mips: Add bswap32u and bswap64

Without the mips32r2 instructions to perform swapping, bswap is quite large, dominating the size of each reverse-endian qemu_ld/qemu_st operation. Create two subroutines in the prologue block. The subroutines require extra reserved registers (TCG_TMP[2, 3]). Using these within qemu_ld means that

[Qemu-devel] [PATCH v3 01/11] tcg-mips: Move bswap code to a subroutine

Without the mips32r2 instructions to perform swapping, bswap is quite large, dominating the size of each reverse-endian qemu_ld/qemu_st operation. Create a subroutine in the prologue block. The subroutine requires extra reserved registers (TCG_TMP[2, 3]). Using these within qemu_ld means that we

[Qemu-devel] [PATCH v2] pci-assign: sync MSI/MSI-X cap and table with PCIDevice

Since commit e1d4fb2d ("kvm-irqchip: x86: add msi route notify fn"), kvm_irqchip_add_msi_route() starts to use pci_get_msi_message() to fetch MSI info. This requires that we setup MSI related fields in PCIDevice. For most devices, that won't be a problem, as long as we are using general interfaces

Re: [Qemu-devel] [PATCH for-2.8] pci-assign: sync MSI/MSI-X cap and table with PCIDevice

On Fri, Nov 25, 2016 at 12:55:12AM +, Changlimin wrote: > Hi Peter, > I have tested the patch, it has solved the issue. > I think change > dev->dev.msix_table = dev->msix_table; > to > dev->dev.msix_table = (uint8_t *)dev->msix_table; > can avoid a gcc warning. Thanks for the comme

Re: [Qemu-devel] [ RFC Patch v7 0/2] Support Receive-Segment-Offload(RSC) for WHQL

On 2016年11月24日 12:28, Jason Wang wrote: On 2016年11月01日 01:41, w...@redhat.com wrote: From: Wei Xu This patch is to support WHQL test for Windows guest, while this feature also benifits other guest works as a kernel 'gro' like feature with userspace implementation. Feature information: h

Re: [Qemu-devel] [PATCH for-2.8] pci-assign: sync MSI/MSI-X cap and table with PCIDevice

Hi Peter, I have tested the patch, it has solved the issue. I think change dev->dev.msix_table = dev->msix_table; to dev->dev.msix_table = (uint8_t *)dev->msix_table; can avoid a gcc warning. Regards Chang limin -Original Message- From: Peter Xu [mailto:pet...@redhat.com] Sent

Re: [Qemu-devel] [PATCH v1 01/18] block/io: add bdrv_aio_{preadv, pwritev}

On 23.11.2016 17:28, Kevin Wolf wrote: Am 15.11.2016 um 07:36 hat Pavel Butsykin geschrieben: It's just byte-based wrappers over bdrv_co_aio_prw_vector(), which provide a byte-based interface for AIO read/write. Signed-off-by: Pavel Butsykin I'm in the process to phase out the last users o

Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 1/4] target-ppc: Implement bcdcfsq. instruction

On Thu, Nov 24, 2016 at 02:31:21PM -0200, jos...@linux.vnet.ibm.com wrote: > Hello Richard, > > Thank you for your review, please read my answer below. > > > On Thu, Nov 24, 2016 at 01:43:18AM +0100, Richard Henderson wrote: > > On 11/23/2016 05:21 PM, Jose Ricardo Ziviani wrote: > > >bcdcfsq.:

Re: [Qemu-devel] [PULL 00/11] ppc-for-2.8 queue 20161123

On Thu, Nov 24, 2016 at 09:50:05AM +, Stefan Hajnoczi wrote: > On Tue, Nov 22, 2016 at 07:06:11PM -0800, no-re...@patchew.org wrote: > > === OUTPUT BEGIN === > > Checking PATCH 1/11: tests/postcopy: Use KVM on ppc64 only if it is > > KVM-HV... > > Checking PATCH 2/11: spapr: migration support

Re: [Qemu-devel] [PATCH v2] memory: add section range info for IOMMU notifier

On Thu, Nov 24, 2016 at 08:52:29PM +0800, Peter Xu wrote: > In this patch, IOMMUNotifier.{start|end} are introduced to store section > information for a specific notifier. When notification occurs, we not > only check the notification type (MAP|UNMAP), but also check whether the > notified iova is

[Qemu-devel] [Bug 902413] Re: qemu-i386-user on ARM host: wine hangs/spins when trying to run anything

Running SkiFree (1.04 x32) on wine (1.8.3 x32) installed in a gentoo i686 chroot, all running via qemu-user-i386-static 1.7.0 on a raspberry pi 2 armv7 host works. It was almost playable at 1920x1080 too! winecfg worked, notepad.exe worked, and SkiFree worked too. -- You received this bug notifi

Re: [Qemu-devel] [dpdk-dev] dpdk/vpp and cross-version migration for vhost

> >On 11/24/2016 12:47 PM, Maxime Coquelin wrote: >> >> >> On 11/24/2016 01:33 PM, Yuanhan Liu wrote: >>> On Thu, Nov 24, 2016 at 09:30:49AM +, Kevin Traynor wrote: > On 11/24/2016 06:31 AM, Yuanhan Liu wrote: > > > On Tue, Nov 22, 2016 at 04:53:05PM +0200, Michael S. Tsirkin wrote: >>

[Qemu-devel] [PULL-for 2.8] Update OpenBIOS images

Hi Stefan, David's latest ppc-for-2.8-20161123 pull includes Ben's patch entitled "ppc: Make uninorth interrupt swizzling identical to Grackle". This requires a corresponding change in the OpenBIOS device tree to match and so this pull request should be applied soon after. ATB, Mark. The

Re: [Qemu-devel] [PATCH v1 04/18] util/rbcache: range-based cache core

On 24.11.2016 00:25, Kevin Wolf wrote: Am 15.11.2016 um 07:37 hat Pavel Butsykin geschrieben: RBCache provides functionality to cache the data from block devices (basically). The range here is used as the main key for searching and storing data. The cache is based on red-black trees, so basic op

Re: [Qemu-devel] [PATCH v3 for-2.9 0/3] q35: add negotiable broadcast SMI

On Thu, 24 Nov 2016 12:05:55 -0500 (EST) Paolo Bonzini wrote: > > > > Okay, this does plug the hole I sketched out above. This logic (the > > > QEMU-specific unparking) can be done in another platform API in OVMF I > > > guess (like those in SmmCpuFeaturesLib), but I wonder if we have to > > > p

Re: [Qemu-devel] -nodefaults and available buses (was Re: [RFC 00/15] qmp: Report supported device types on 'query-machines')

On Thu, Nov 24, 2016 at 05:30:19PM +0100, Cornelia Huck wrote: > On Thu, 24 Nov 2016 12:51:19 +1100 > David Gibson wrote: > > > On Wed, Nov 23, 2016 at 03:10:47PM -0200, Eduardo Habkost wrote: > > > (CCing the maintainers of the machines that crash when using > > > -nodefaults) > > > > > > On Tu

Re: [Qemu-devel] [RFC 06/15] qdev: Add device_type field to BusClass

On Thu, Nov 24, 2016 at 05:48:20PM +0100, Cornelia Huck wrote: > On Mon, 21 Nov 2016 23:12:04 -0200 > Eduardo Habkost wrote: > > > > > diff --git a/hw/pci/pci.c b/hw/pci/pci.c > > index 24fae16..74b8fef 100644 > > --- a/hw/pci/pci.c > > +++ b/hw/pci/pci.c > > @@ -152,6 +152,7 @@ static void pci

Re: [Qemu-devel] [kvm-unit-tests PATCH v7 11/11] arm/arm64: gic: don't just use zero

Hi Drew, On 24/11/2016 15:11, Andrew Jones wrote: > On Thu, Nov 24, 2016 at 10:57:01AM +0100, Auger Eric wrote: >> Hi, >> >> On 23/11/2016 17:54, Andrew Jones wrote: >>> Allow user to select who sends ipis and with which irq, >>> rather than just always sending irq=0 from cpu0. >>> >>> Signed-off-

Re: [Qemu-devel] [PATCH v3 for-2.9 0/3] q35: add negotiable broadcast SMI

> > Okay, this does plug the hole I sketched out above. This logic (the > > QEMU-specific unparking) can be done in another platform API in OVMF I > > guess (like those in SmmCpuFeaturesLib), but I wonder if we have to > > provide the infrastructure in platform code up to the separate SMI > > comm

Re: [Qemu-devel] [RFC 06/15] qdev: Add device_type field to BusClass

On Mon, 21 Nov 2016 23:12:04 -0200 Eduardo Habkost wrote: > diff --git a/hw/pci/pci.c b/hw/pci/pci.c > index 24fae16..74b8fef 100644 > --- a/hw/pci/pci.c > +++ b/hw/pci/pci.c > @@ -152,6 +152,7 @@ static void pci_bus_class_init(ObjectClass *klass, void > *data) > k->realize = pci_bus_real

Re: [Qemu-devel] [RFC 00/15] qmp: Report supported device types on 'query-machines'

On 11/24/2016 05:41 PM, Markus Armbruster wrote: Marcel Apfelbaum writes: On 11/24/2016 03:34 PM, Markus Armbruster wrote: Eduardo Habkost writes: On Wed, Nov 23, 2016 at 06:43:16PM +0200, Marcel Apfelbaum wrote: On 11/22/2016 03:11 AM, Eduardo Habkost wrote: The Problem [...] Our

Re: [Qemu-devel] [PATCH v1 02/18] block/pcache: empty pcache driver filter

Am 24.11.2016 um 16:48 hat Pavel Butsykin geschrieben: > On 23.11.2016 18:15, Kevin Wolf wrote: > >Am 15.11.2016 um 07:36 hat Pavel Butsykin geschrieben: > >>+static QemuOptsList runtime_opts = { > >>+.name = "pcache", > >>+.head = QTAILQ_HEAD_INITIALIZER(runtime_opts.head), > >>+.desc

[Qemu-devel] [kvm-unit-tests PATCH v7 11/11] arm/tcg-test: some basic TCG exercising tests

These tests are not really aimed at KVM at all but exist to stretch QEMU's TCG code generator. In particular these exercise the ability of the TCG to: * Chain TranslationBlocks together (tight) * Handle heavy usage of the tb_jump_cache (paged) * Pathological case of computed local jumps (com

Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 0/4] POWER9 TCG enablements - BCD functions part II

David, Thank you again for reviewing my code, I'm making the changes. I only have a question about patch 1/4 which I didn't find the issue so I'm waiting for Richard's answer. Thanks! On Thu, Nov 24, 2016 at 12:28:32PM +1100, David Gibson wrote: > On Wed, Nov 23, 2016 at 02:21:41PM -0200, Jos

Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 1/4] target-ppc: Implement bcdcfsq. instruction

Hello Richard, Thank you for your review, please read my answer below. On Thu, Nov 24, 2016 at 01:43:18AM +0100, Richard Henderson wrote: > On 11/23/2016 05:21 PM, Jose Ricardo Ziviani wrote: > >bcdcfsq.: Decimal convert from signed quadword. It is not possible > >to convert values less than 10^

Re: [Qemu-devel] [PATCH v2 1/4] qmp-event: Avoid qobject_from_jsonf("%"PRId64)

On 11/24/2016 05:00 AM, Markus Armbruster wrote: > Eric Blake writes: > >> +/* Put -1 to indicate failure of getting host time */ >> +obj = qobject_from_jsonf("{ 'seconds': %lld, 'microseconds': %lld }", >> + err < 0 ? -1LL : tv.tv_sec, >> +

[Qemu-devel] [kvm-unit-tests PATCH v7 07/11] arm/tlbflush-code: Add TLB flush during code execution test

This adds a fairly brain dead torture test for TLB flushes intended for stressing the MTTCG QEMU build. It takes the usual -smp option for multiple CPUs. By default it CPU0 will do a TLBIALL flush after each cycle. You can pass options via -append to control additional aspects of the test: - "p

[Qemu-devel] [kvm-unit-tests PATCH v7 06/11] arm/Makefile.common: force -fno-pic

As distro compilers move towards defaults for build hardening for things like ASLR we need to force -fno-pic. Failure to do can lead to weird relocation problems when we build our "lat" binaries. Signed-off-by: Alex Bennée --- arm/Makefile.common | 1 + 1 file changed, 1 insertion(+) diff --git

Re: [Qemu-devel] [PATCH v2 for-2.8 0/4] Fix MacOS runtime failure of qobject_from_jsonf()

On 11/24/2016 05:07 AM, Markus Armbruster wrote: > Eric Blake writes: > >> programmingk...@gmail.com[*] reported a runtime failure on a >> 32-bit Mac OS compilation, where "%"PRId64 expands to "%qd". >> Fortunately, we had very few spots that were relying on our >> pseudo-printf JSON parsing of i

Re: [Qemu-devel] -nodefaults and available buses (was Re: [RFC 00/15] qmp: Report supported device types on 'query-machines')

On Thu, 24 Nov 2016 12:51:19 +1100 David Gibson wrote: > On Wed, Nov 23, 2016 at 03:10:47PM -0200, Eduardo Habkost wrote: > > (CCing the maintainers of the machines that crash when using > > -nodefaults) > > > > On Tue, Nov 22, 2016 at 08:34:50PM -0200, Eduardo Habkost wrote: > > [...] > > > "de

[Qemu-devel] [kvm-unit-tests PATCH v7 09/11] arm/locking-tests: add comprehensive locking test

This test has been written mainly to stress multi-threaded TCG behaviour but will demonstrate failure by default on real hardware. The test takes the following parameters: - "lock" use GCC's locking semantics - "atomic" use GCC's __atomic primitives - "wfelock" use WaitForEvent sleep - "ex

[Qemu-devel] [kvm-unit-tests PATCH v7 01/11] run_tests: allow forcing of acceleration mode

While tests can be pegged to tcg it is useful to override this from time to time, especially when testing correctness on real systems. --- run_tests.sh | 8 ++-- scripts/runtime.bash | 4 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/run_tests.sh b/run_tests.sh i

[Qemu-devel] [kvm-unit-tests PATCH v7 00/11] QEMU MTTCG Test cases

Hi, Looking at my records it seems as though it has been a while since I last posted these tests. As I'm hoping to get the final bits of MTTCG merged upstream on the next QEMU development cycle I've been re-basing these and getting them cleaned up for merging. Some of the patches might be worth t

[Qemu-devel] [kvm-unit-tests PATCH v7 02/11] run_tests: allow disabling of timeouts

Certainly during development of the tests and MTTCG there are times when the timeout just gets in the way. Signed-off-by: Alex Bennée --- run_tests.sh | 8 ++-- scripts/runtime.bash | 4 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/run_tests.sh b/run_tests.sh

[Qemu-devel] [PATCH v2 1/7] linux-user: Add fanotify implementation

This commit adds implementation of fanotify_init and fanotify_mark. Second argument for fanotify_init needs conversion because of flags which can be FAN_NONBLOCK and FAN_CLOEXEC which rely on O_NONBLOCK and O_CLOEXEC and those can have different values on different platforms. For fanotify_mark argu

[Qemu-devel] [kvm-unit-tests PATCH v7 04/11] libcflat: add PRI(dux)32 format types

So we can have portable formatting of uint32_t types. Signed-off-by: Alex Bennée --- lib/libcflat.h | 5 + 1 file changed, 5 insertions(+) diff --git a/lib/libcflat.h b/lib/libcflat.h index bdcc561..6dab5be 100644 --- a/lib/libcflat.h +++ b/lib/libcflat.h @@ -55,12 +55,17 @@ typedef _Bool

[Qemu-devel] [kvm-unit-tests PATCH v7 08/11] arm/tlbflush-data: Add TLB flush during data writes test

This test is the cousin of the tlbflush-code test. Instead of flushing running code it re-maps virtual addresses while a buffer is being filled up. It then audits the results checking for writes that have ended up in the wrong place. While tlbflush-code exercises QEMU's translation invalidation lo

[Qemu-devel] [PATCH v2 6/7] linux-user: Fix syslog

Third argument represents lenght not second. If second argument is NULL it should be passed without using lock_user function which would, in that case, return EFAULT, and system call supports passing NULL as second argument. Signed-off-by: Lena Djokic --- linux-user/syscall.c | 16 --

[Qemu-devel] [PATCH v2 3/7] linux-user: Fix flock definition for mips64

Mips64 uses generic flock structure. See /arch/mips/include/uapi/asm/fcntl.h#L63 for reference. Signed-off-by: Lena Djokic --- linux-user/syscall_defs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 0b15466..099fd0

Re: [Qemu-devel] [PATCH 4/4] 9pfs: add a size parameter to init_iov_from_pdu

On Mon, 21 Nov 2016 13:39:32 -0800 Stefano Stabellini wrote: > Not all 9pfs transports share memory between request and response. For > those who don't, it is necessary to know how much memory is required in > the response. > > Signed-off-by: Stefano Stabellini > --- IIUC the transport used in

[Qemu-devel] [kvm-unit-tests PATCH v7 10/11] arm/barrier-litmus-tests: add simple mp and sal litmus tests

This adds a framework for adding simple barrier litmus tests against ARM. The litmus tests aren't as comprehensive as the academic exercises which will attempt to do all sorts of things to keep racing CPUs synced up. These tests do honour the "sync" parameter to do a poor-mans equivalent. The two

[Qemu-devel] [PATCH v2 5/7] linux-user: Fix readahead

Calculation of 64-bit offset was not correct for all cases. Signed-off-by: Lena Djokic --- linux-user/syscall.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 1b59a71..61c4126 100644 --- a/linux-user/syscall.c +++ b/linux-use

[Qemu-devel] [PATCH v2 0/7] Improvements of qemu linux-user

v2: added 6 patches This patch series contains implementation of support for two new system calls, and fixes for 5 existing system calls, and fix for a structure definition as well. Lena Djokic (7): linux-user: Add fanotify implementation linux-user: Fix inotify_init1 support linux-user: Fi

[Qemu-devel] [PATCH v2 4/7] linux-user: Fix fcnt

F_GETSIG and F_SETSIG were implemented with default behaviour which simply passes given arguments to fcntl syscall, but since those arguments are signals used for communication between taget and host we need conversion which is done by using host_to_target_signal and taget_to_host_signal functions.

[Qemu-devel] [kvm-unit-tests PATCH v7 03/11] run_tests: allow passing of options to QEMU

This introduces a the option -o for passing of options directly to QEMU which is useful. In my case I'm using it to toggle MTTCG on an off: ./run_tests.sh -t -o "-tcg mttcg=on" Signed-off-by: Alex Bennée --- run_tests.sh | 10 +++--- scripts/functions.bash | 13 +++-- 2

[Qemu-devel] [PATCH v2 7/7] linux-user: Fix mq_open

If fourth argument is NULL it should be passed without using lock_user function which would, in that case, return EFAULT, and system call supports passing NULL as fourth argument. Signed-off-by: Lena Djokic --- linux-user/syscall.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-

[Qemu-devel] [PATCH v2 2/7] linux-user: Fix inotify_init1 support

This commit adds necessary conversion of argument passed to inotify_init1. inotify_init1 flags can be IN_NONBLOCK and IN_CLOEXEC which rely on O_NONBLOCK and O_CLOEXEC and those can have different values on different platforms. Signed-off-by: Lena Djokic --- linux-user/syscall.c | 3 ++- 1 file

Re: [Qemu-devel] [PATCH v7 RFC] block/vxhs: Initial commit to add Veritas HyperScale VxHS block device support

On Thu, Nov 24, 2016 at 11:31:14AM +, Ketan Nilangekar wrote: > > > On 11/24/16, 4:41 PM, "Stefan Hajnoczi" wrote: > > On Thu, Nov 24, 2016 at 05:44:37AM +, Ketan Nilangekar wrote: > > On 11/24/16, 4:07 AM, "Paolo Bonzini" wrote: > > >On 23/11/2016 23:09, ashish mittal wrot

Re: [Qemu-devel] [PATCH v1 02/18] block/pcache: empty pcache driver filter

On 23.11.2016 18:15, Kevin Wolf wrote: Am 15.11.2016 um 07:36 hat Pavel Butsykin geschrieben: The basic version of pcache driver for easy preparation of a patch set. Signed-off-by: Pavel Butsykin --- block/Makefile.objs | 1 + block/pcache.c | 144

Re: [Qemu-devel] [RFC 00/15] qmp: Report supported device types on 'query-machines'

Marcel Apfelbaum writes: > On 11/24/2016 03:34 PM, Markus Armbruster wrote: >> Eduardo Habkost writes: >> >>> On Wed, Nov 23, 2016 at 06:43:16PM +0200, Marcel Apfelbaum wrote: On 11/22/2016 03:11 AM, Eduardo Habkost wrote: > The Problem >>> > > [...] > >> Our decision to have hybrid PCI

[Qemu-devel] [PULL 1/3] target-m68k: fix EXG instruction

opcodes of "EXG Ax,Ay" and "EXG Dx,Dy" have been swapped Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target-m68k/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 9ad974f..8e522db 1006

[Qemu-devel] [PULL 2/3] target-m68k: Fix cmpa operand size

"The size of the operation can be specified as word or long. Word length source operands are sign-extended to 32 bits for comparison." So comparison is always done using OS_LONG. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target-m68k/translate.c | 2 +- 1 file changed, 1

[Qemu-devel] [PULL 3/3] target-m68k: fix muluw/mulsw

"The multiplier and multiplicand are both word operands, and the result is a long-word operand." So compute flags on a long-word result, not on a word result. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target-m68k/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 dele

[Qemu-devel] [PULL 0/3] M68k for 2.8 patches

The following changes since commit 00227fefd2059464cd2f59aed29944874c630e2f: Update version for v2.8.0-rc1 release (2016-11-22 22:29:08 +) are available in the git repository at: git://github.com/vivier/qemu-m68k.git tags/m68k-for-2.8-pull-request for you to fetch changes up to 4a18cd44

Re: [Qemu-devel] [for-2.8 0/4] 9p patches for 2.8 20161123

On Thu, Nov 24, 2016 at 11:36:29AM +0100, Greg Kurz wrote: > On Thu, 24 Nov 2016 10:19:58 + > Stefan Hajnoczi wrote: > > On Wed, Nov 23, 2016 at 05:58:14PM +0100, Greg Kurz wrote: > > Your PGP key has only one signature. Can you key sign with other > > IBMers? That may allow us to get the We

[Qemu-devel] Linux kernel polling for QEMU

I looked through the socket SO_BUSY_POLL and blk_mq poll support in recent Linux kernels with an eye towards integrating the ongoing QEMU polling work. The main missing feature is eventfd polling support which I describe below. Background -- We're experimenting with polling in QEMU so I w

Re: [Qemu-devel] [dpdk-dev] dpdk/vpp and cross-version migration for vhost

On 11/24/2016 12:47 PM, Maxime Coquelin wrote: > > > On 11/24/2016 01:33 PM, Yuanhan Liu wrote: >> On Thu, Nov 24, 2016 at 09:30:49AM +, Kevin Traynor wrote: >>> > On 11/24/2016 06:31 AM, Yuanhan Liu wrote: > > On Tue, Nov 22, 2016 at 04:53:05PM +0200, Michael S. Tsirkin wrote: >>> >

Re: [Qemu-devel] [RFC 00/15] qmp: Report supported device types on 'query-machines'

Eduardo Habkost writes: > On Thu, Nov 24, 2016 at 02:34:05PM +0100, Markus Armbruster wrote: >> Eduardo Habkost writes: >> >> > On Wed, Nov 23, 2016 at 06:43:16PM +0200, Marcel Apfelbaum wrote: >> >> On 11/22/2016 03:11 AM, Eduardo Habkost wrote: >> >> > The Problem >> >> > === >> >> >

Re: [Qemu-devel] [PATCH v3 for-2.9 0/3] q35: add negotiable broadcast SMI

On Thu, 24 Nov 2016 01:01:58 +0100 Laszlo Ersek wrote: > CC Jordan & Mike > > On 11/23/16 23:35, Paolo Bonzini wrote: > > > > > > On 18/11/2016 11:36, Laszlo Ersek wrote: > >> This is v3 of the series, with updates based on the v2 discussion: > >>

Re: [Qemu-devel] [PATCH 3/4] 9pfs: use v9fs_init_qiov_from_pdu instead of v9fs_pack

On Mon, 21 Nov 2016 13:39:31 -0800 Stefano Stabellini wrote: > v9fs_xattr_read should not access VirtQueueElement elems directly. > Move v9fs_init_qiov_from_pdu up in the file and call > v9fs_init_qiov_from_pdu instead of v9fs_pack. > instead of ? I see v9fs_init_qiov_from_pdu() gets called bef

Re: [Qemu-devel] [PATCH 2/4] 9pfs: introduce transport specific callbacks

On Thu, 24 Nov 2016 15:23:10 +0100 Greg Kurz wrote: > On Thu, 24 Nov 2016 09:31:52 +0100 > Greg Kurz wrote: > > > On Mon, 21 Nov 2016 13:39:30 -0800 > > Stefano Stabellini wrote: > > > > > Don't call virtio functions from 9pfs generic code, use generic function > > > callbacks instead. > >

Re: [Qemu-devel] [PATCH v2 1/2] target-ppc: add vextu[bhw]lx instructions

On 11/24/2016 12:32 PM, Nikunj A Dadhania wrote: +#if defined(HOST_WORDS_BIGENDIAN) +# if defined(CONFIG_INT128) +# define VEXTULX_DO(name, size) \ +target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \ +{

Re: [Qemu-devel] [PATCH] target-arm: Add VBAR support to ARM1176 CPUs

On 09/05/2016 04:39 PM, Peter Maydell wrote: > On 23 August 2016 at 10:59, Cédric Le Goater wrote: >> ARM1176 CPUs support the Vector Base Address Register but currently, >> qemu only supports VBAR on ARMv7 CPUs. Fix this by adding a new >> feature ARM_FEATURE_VBAR which is used for ARMv7 and ARM1

Re: [Qemu-devel] [PATCH 2/4] 9pfs: introduce transport specific callbacks

On Thu, 24 Nov 2016 09:31:52 +0100 Greg Kurz wrote: > On Mon, 21 Nov 2016 13:39:30 -0800 > Stefano Stabellini wrote: > > > Don't call virtio functions from 9pfs generic code, use generic function > > callbacks instead. > > > > Signed-off-by: Stefano Stabellini > > --- > > Just a couple of

Re: [Qemu-devel] [RFC 00/15] qmp: Report supported device types on 'query-machines'

On 11/24/2016 03:34 PM, Markus Armbruster wrote: Eduardo Habkost writes: On Wed, Nov 23, 2016 at 06:43:16PM +0200, Marcel Apfelbaum wrote: On 11/22/2016 03:11 AM, Eduardo Habkost wrote: The Problem [...] Our decision to have hybrid PCI/PCIe devices and buses breeds considerable complex

Re: [Qemu-devel] [RFC 00/15] qmp: Report supported device types on 'query-machines'

On Thu, Nov 24, 2016 at 02:34:05PM +0100, Markus Armbruster wrote: > Eduardo Habkost writes: > > > On Wed, Nov 23, 2016 at 06:43:16PM +0200, Marcel Apfelbaum wrote: > >> On 11/22/2016 03:11 AM, Eduardo Habkost wrote: > >> > The Problem > >> > === > >> > > >> > Currently management softwa

Re: [Qemu-devel] [kvm-unit-tests PATCH v7 11/11] arm/arm64: gic: don't just use zero

On Thu, Nov 24, 2016 at 10:57:01AM +0100, Auger Eric wrote: > Hi, > > On 23/11/2016 17:54, Andrew Jones wrote: > > Allow user to select who sends ipis and with which irq, > > rather than just always sending irq=0 from cpu0. > > > > Signed-off-by: Andrew Jones > > Reviewed-by: Eric Auger > Test

Re: [Qemu-devel] [kvm-unit-tests PATCH v7 10/11] arm/arm64: gicv3: add an IPI test

On Thu, Nov 24, 2016 at 10:54:55AM +0100, Auger Eric wrote: > Hi Drew, > > On 23/11/2016 17:54, Andrew Jones wrote: > > Signed-off-by: Andrew Jones > > > > --- > > v7: > > - add common ipi_send_single/mask (replacing ipi_send). > >Note, the arg order irq,cpu got swapped. [Eric] > > - comme

Re: [Qemu-devel] [kvm-unit-tests PATCH v7 09/11] arm/arm64: add initial gicv3 support

On Thu, Nov 24, 2016 at 10:54:35AM +0100, Auger Eric wrote: > Hi Drew, > > On 23/11/2016 17:54, Andrew Jones wrote: > > Reviewed-by: Alex Bennée > > Reviewed-by: Eric Auger > > Signed-off-by: Andrew Jones > > > > --- > > v7: split lib/arm/gic.c into gic-v2/3.c [Eric] > > v6: > > - added comme

Re: [Qemu-devel] -nodefaults and available buses (was Re: [RFC 00/15] qmp: Report supported device types on 'query-machines')

Eduardo Habkost writes: > (CCing the maintainers of the machines that crash when using > -nodefaults) > > On Tue, Nov 22, 2016 at 08:34:50PM -0200, Eduardo Habkost wrote: > [...] >> "default defaults" vs "-nodefault defaults" >> --- >> >> Two bad news: >>

Re: [Qemu-devel] [RFC 00/15] qmp: Report supported device types on 'query-machines'

Eduardo Habkost writes: > On Wed, Nov 23, 2016 at 06:43:16PM +0200, Marcel Apfelbaum wrote: >> On 11/22/2016 03:11 AM, Eduardo Habkost wrote: >> > The Problem >> > === >> > >> > Currently management software has no way to find out which device >> > types can be plugged in a machine, unle

[Qemu-devel] [PATCH] 9pfs: add missing coroutine_fn annotations

Signed-off-by: Greg Kurz --- hw/9pfs/9p.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c index aea7e9d39206..e4815a97922d 100644 --- a/hw/9pfs/9p.c +++ b/hw/9pfs/9p.c @@ -1571,7 +1571,7 @@ out_nofid: v9fs_string_free(&name); } -stati

[Qemu-devel] [PATCH] ps2: add support for mice with extra/side buttons

This patch introduces the SIDE and EXTRA mouse buttons and implements appropriate event generation for gtk and input-linux input methods. The naming was borrowed from evdev since it is more descriptive than BUTTON4/5. Note that the guest has to switch the ps2 mouse into IMEX mode, otherwise even

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