From: Prasad J Pandit
The Cadence UART device emulator stores 'baud rate generator'
and 'baud rate divider' values, used in computing speed, in two
registers. The device specification defines their range and
their reset value. Use their correct value when resetting the
device in cadence_uart_rese
On 24/10/16 15:59, David Gibson wrote:
> In the libqos PCI code we now have accessors both for registers (byte
> significance preserving) and for streaming data (byte address order
> preserving). These exist in both the interface for qtest drivers and in
> the machine specific backends.
>
> Howev
On 10/24/16 11:10 -0200, Eduardo Habkost wrote:
On Thu, Oct 20, 2016 at 03:55:22PM +0200, Kevin Wolf wrote:
Am 20.10.2016 um 14:34 hat Igor Mammedov geschrieben:
> > #ifdef __linux__
> > +static uint64_t get_file_size(const char *path, Error **errp)
> Maybe QEMU laredy has an utility to do it t
On Fri, Oct 21, 2016 at 02:24:37PM +0800, Liang Li wrote:
> The implementation of the current virtio-balloon is not very
> efficient, the time spends on different stages of inflating
> the balloon to 7GB of a 8GB idle guest:
>
> a. allocating pages (6.5%)
> b. sending PFNs to host (68.3%)
> c. add
On Sat, 10/22 01:40, Max Reitz wrote:
> On 30.09.2016 14:09, Fam Zheng wrote:
> > virtlockd in libvirt locks the first byte, we lock byte 1 to avoid
> > the intervene.
>
> s/the intervene/a conflict/?
OK.
>
> >
> > Both file and host device protocols are covered.
> >
> > The complication is w
On 10/25/2016 03:13 AM, David Gibson wrote:
> On Sat, Oct 22, 2016 at 11:46:40AM +0200, Cédric Le Goater wrote:
>> On a real POWER8 system, the Pervasive Interconnect Bus (PIB) serves
>> as a backbone to connect different units of the system. The host
>> firmware connects to the PIB through a bridg
From: "Gautham R. Shenoy"
vrldmi: Vector Rotate Left Dword then Mask Insert
vrlwmi: Vector Rotate Left Word then Mask Insert
Signed-off-by: Gautham R. Shenoy
Signed-off-by: Bharata B Rao
( use extract[32,64] and rol[32,64] )
Signed-off-by: Nikunj A Dadhania
---
disas/ppc.c
From: Sandipan Das
xscmpeqdp: VSX Scalar Compare Equal Double-Precision
xscmpgedp: VSX Scalar Compare Greater Than or Equal Double-Precision
xscmpgtdp: VSX Scalar Compare Greater Than Double-Precision
xscmpnedp: VSX Scalar Compare Not Equal Double-Precision
Signed-off-by: Sandipan Das
Signed-of
From: Bharata B Rao
vrldnm: Vector Rotate Left Doubleword then AND with Mask
vrlwnm: Vector Rotate Left Word then AND with Mask
Signed-off-by: Bharata B Rao
Signed-off-by: Nikunj A Dadhania
---
disas/ppc.c | 2 ++
target-ppc/helper.h | 2 ++
target-pp
This series contains 8 new instructions for POWER9 ISA3.0
VSX Scalar compare
Vector Rotate Left Dword
Vector Rotate Left Word
Changelog:
v0:
* Use extract32 and extract64 helper
* Use rol32 and rol64 helper
Patches:
01:
xscmpeqdp: VSX Scalar Compare Equal Double-Precision
xs
Prepare xen_be_del_xendev to be shared with frontends:
* xen_be_del_xendev -> xen_pv_del_xendev
Signed-off-by: Emil Condrea
Acked-by: Anthony PERARD
Reviewed-by: Quan Xu
---
hw/xen/xen_backend.c | 2 +-
hw/xen/xen_pvdev.c | 2 +-
include/hw/xen/xen_pvdev.h | 2 +-
3 files change
Prepare xen_be_evtchn_event to be shared with frontends:
* xen_be_evtchn_event -> xen_pv_evtchn_event
Signed-off-by: Emil Condrea
Acked-by: Anthony PERARD
Reviewed-by: Quan Xu
---
hw/xen/xen_backend.c | 2 +-
hw/xen/xen_pvdev.c | 2 +-
include/hw/xen/xen_pvdev.h | 2 +-
3 files
Prepare xen_be_send_notify to be shared with frontends:
* xen_be_send_notify -> xen_pv_send_notify
Signed-off-by: Emil Condrea
Acked-by: Anthony PERARD
Reviewed-by: Quan Xu
---
hw/block/xen_disk.c| 4 ++--
hw/char/xen_console.c | 4 ++--
hw/display/xenfb.c | 8
h
Prepare xen_be_unbind_evtchn to be shared with frontends:
* xen_be_unbind_evtchn -> xen_pv_unbind_evtchn
Signed-off-by: Emil Condrea
Acked-by: Anthony PERARD
Reviewed-by: Quan Xu
---
hw/block/xen_disk.c| 2 +-
hw/char/xen_console.c | 2 +-
hw/display/xenfb.c | 2 +-
hw/ne
Richard Henderson writes:
> We already have rol32 and rol64.
>
> Which I see are broken for shift == 0.
I tried with different shift (including 0) in a test program, and the
result is as expected:
0: ccddeeff
static inline unsigned int rol32(unsigned int word, unsigned int shift)
{
return (
* xenstore_update -> xen_pvdev.c
Signed-off-by: Emil Condrea
---
hw/xen/xen_backend.c | 30 +++---
hw/xen/xen_pvdev.c | 23 +++
include/hw/xen/xen_backend.h | 3 +++
include/hw/xen/xen_pvdev.h | 1 +
4 files changed, 30 insertion
On Sat, 10/22 02:11, Max Reitz wrote:
> On 30.09.2016 14:09, Fam Zheng wrote:
> > Signed-off-by: Fam Zheng
> > ---
> > hw/core/qdev-properties.c| 10 ++
> > include/hw/block/block.h | 1 +
> > include/hw/qdev-properties.h | 3 +++
> > 3 files changed, 14 insertions(+)
>
> Why d
Prepare xen_be_find_xendev to be shared with frontends:
* xen_be_find_xendev -> xen_pv_find_xendev
Signed-off-by: Emil Condrea
Acked-by: Anthony PERARD
Reviewed-by: Quan Xu
---
hw/display/xenfb.c | 4 ++--
hw/xen/xen_backend.c | 2 +-
hw/xen/xen_pvdev.c | 2 +-
include/h
Fixes the following errors:
* ERROR: line over 90 characters
* ERROR: code indent should never use tabs
* ERROR: space prohibited after that open square bracket '['
* ERROR: do not initialise statics to 0 or NULL
* ERROR: "(foo*)" should be "(foo *)"
Signed-off-by: Emil Condrea
---
hw/char/
This patch series was splitted from QEMU:Xen stubdom vTPM for HVM virtual
machine
http://markmail.org/message/fkix7g3a5zdj7lvr
It contains a reorganization of xen backend and frontend functions together
with code style fixes.
Common functions shared by backends and frontends are moved to xen_pvde
* move xendevs qtail to xen_pvdev.c
* change xen_be_get_xendev to use a new function: xen_pv_insert_xendev
Signed-off-by: Emil Condrea
---
hw/xen/xen_backend.c | 51 +--
hw/xen/xen_pvdev.c | 57
Prepare xen_be_printf to be used by both backend and frontends:
* xen_be_printf -> xen_pv_printf
Signed-off-by: Emil Condrea
Acked-by: Anthony PERARD
---
hw/block/xen_disk.c| 58 +++---
hw/char/xen_console.c | 8 +++
hw/display/xenfb.c
The name of the functions moved:
* xen_be_evtchn_event
* xen_be_unbind_evtchn
* xen_be_send_notify
Signed-off-by: Emil Condrea
---
hw/xen/xen_backend.c | 35 ---
hw/xen/xen_pvdev.c | 35 +++
include/hw/xen/xen_b
The name of the functions moved to xen_pvdev.c:
* xenstore_cleanup_dir
* xen_config_cleanup
* xenstore_mkdir
Signed-off-by: Emil Condrea
Acked-by: Anthony PERARD
---
hw/xen/xen_backend.c | 49 -
hw/xen/xen_pvdev.c | 51 +++
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1477361273-1-1-git-send-email-li...@roeck-us.net
Subject: [Qemu-devel] [PATCH] hw/arm/pxa2xx: Set value default values for CCCR
and CKEN on PXA255
=== TEST SCRIPT BEGIN
Fixes:
* WARNING: line over 80 characters
Signed-off-by: Emil Condrea
---
hw/block/xen_disk.c | 3 ++-
hw/char/xen_console.c| 3 ++-
hw/display/xenfb.c | 6 --
hw/net/xen_nic.c | 12
hw/xen/xen_backend.c | 15 ++-
in
The purpose of the new file is to store generic functions shared by frontend
and backends such as xenstore operations, xendevs.
Signed-off-by: Quan Xu
Signed-off-by: Emil Condrea
---
hw/xen/Makefile.objs | 2 +-
hw/xen/xen_backend.c | 126 +---
On Sat, Oct 22, 2016 at 11:46:48AM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> The PSI (Processor Service Interface) is one of the engines of the
> "Bridge" unit which connects the different interfaces to the Power
> Processor.
>
> This adds just enough of the PSI bridge to
On Fri, 10/21 23:04, Max Reitz wrote:
> > +ImageLockMode bdrv_lock_mode_from_flags(int flags)
> > +{
> > +if (flags & BDRV_O_NO_LOCK) {
> > +return IMAGE_LOCK_MODE_NOLOCK;
> > +} else if (flags & BDRV_O_SHARED_LOCK) {
> > +return IMAGE_LOCK_MODE_SHARED;
> > +} else if (f
On Mon, Oct 24, 2016 at 05:42:52PM +0200, Cédric Le Goater wrote:
> On 10/22/2016 11:46 AM, Cédric Le Goater wrote:
> > It also links the XICS object to each core as it is needed to do the
> > CPU setup and the ICP MMIO windows are memory mapped for each thread.
> >
> > Signed-off-by: Cédric Le Go
On Sat, Oct 22, 2016 at 11:46:50AM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> It adds the Naples chip which supports proper LPC interrupts via the
> LPC controller rather than via an external CPLD.
>
> Signed-off-by: Benjamin Herrenschmidt
> [clg: - updated for qemu-2.7
>
On Sat, Oct 22, 2016 at 11:46:46AM +0200, Cédric Le Goater wrote:
> We will need this helper to translate the server number of the XIVE
> (which is a PIR) into an ICPState index number (which is a cpu index).
>
> Signed-off-by: Cédric Le Goater
Looks correct as far as it goes, but I wonder if th
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20161025033140.15273.87118.st...@gimli.home
Subject: [Qemu-devel] [PATCH] vfio: Handle zero-length sparse mmap ranges
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
tot
On Fri, 10/21 22:45, Max Reitz wrote:
> On 30.09.2016 14:09, Fam Zheng wrote:
> > Signed-off-by: Fam Zheng
> > ---
> > qapi/block-core.json | 18 ++
> > 1 file changed, 18 insertions(+)
> >
> > diff --git a/qapi/block-core.json b/qapi/block-core.json
> > index 92193ab..22e8d04 10
On Sat, Oct 22, 2016 at 11:46:44AM +0200, Cédric Le Goater wrote:
> This provides access to the MMIO based Interrupt Presentation
> Controllers (ICP) as found on a POWER8 system.
>
> A new XICSNative class is introduced to hold the MMIO region of the
> ICPs. Each thread of the system has a subregi
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH] hw/arm/pxa2xx: Correctly handle external GPIO
reset requests
Type: series
Message-id: 1477361212-18833-1-git-send-email-li...@roeck-us.net
=== TEST SCRIPT BEGIN ===
#!/
On Sat, Oct 22, 2016 at 11:46:47AM +0200, Cédric Le Goater wrote:
> Interrupt Control Sources (ICS) are now maintained under a list.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
> ---
> hw/intc/xics.c| 6 ++
> include/hw/ppc/xics.h | 1 +
> 2 files changed, 7 inse
We are able to derive significant performance from the qemu block driver as
compared to nbd/iscsi/nfs. We have prototyped nfs and nbd based io tap in the
past and the performance of qemu block driver is significantly better. Hence we
would like to go with the vxhs driver for now.
Ketan
> On O
This updates the existing documentation to reflect recent updates to
the hotplug event structure, which are in draft form but slated
for inclusion in PAPR/LoPAPR.
Signed-off-by: Michael Roth
Reviewed-by: David Gibson
---
docs/specs/ppc-spapr-hotplug.txt | 55 +---
Hotplug events were previously delivered using an EPOW interrupt
and were queued by linux guests into a circular buffer. For traditional
EPOW events like shutdown/resets, this isn't an issue, but for hotplug
events there are cases where this buffer can be exhausted, resulting
in the loss of hotplug
From: Bharata B Rao
Add support for DRC count indexed hotplug ID type which is primarily
needed for memory hot unplug. This type allows for specifying the
number of DRs that should be plugged/unplugged starting from a given
DRC index.
Signed-off-by: Bharata B Rao
* updated rtas_event_log_v6_hp
This adds machine options of the form:
-machine pseries,modern-hotplug-events=true
-machine pseries,modern-hotplug-events=false
If false, QEMU will force the use of "legacy" style hotplug events,
which are surfaced through EPOW events instead of a dedicated
hot plug event source, and lack cer
PAPR guests advertise their capabilities to the platform by passing
an ibm,architecture-vec structure via an
ibm,client-architecture-support hcall as described by LoPAPR v11,
B.6.2.3. during early boot.
Using this information, the platform enables the capabilities it
supports, then encodes a subse
This series is based on David's ppc-for-2.8 branch, and is also available from:
https://github.com/mdroth/qemu/commits/spapr-hotplug-event-update
Changes since RFC:
* Submit as v1 now that PAPR Hotplug ACR is accepted
* Rebase on latest ppc-for-2.8 (with device-tree refactoring)
* address
ibm,architecture-vec-5 is supposed to encode all option vector 5 bits
negotiated between platform/guest. Currently we hardcode this property
in the boot-time device tree to advertise a single negotiated
capability, "Form 1" NUMA Affinity, regardless of whether or not CAS
has been invoked or that ca
Currently we access individual bytes of an option vector via
ldub_phys() to test for the presence of a particular capability
within that byte. Currently this is only done for the "dynamic
reconfiguration memory" capability bit. If that bit is present,
we pass a boolean value to spapr_h_cas_compose_
Commit 0a417869:
spapr: Move memory hotplug to RTAS_LOG_V6_HP_ID_DRC_COUNT type
dropped per-DRC/per-LMB hotplugs event in favor of a bulk add via a
single LMB count value. This was to avoid overrunning the guest EPOW
event queue with hotplug events. This works fine, but relies on the
guest ex
In some cases, ibm,client-architecture-support calls can fail. This
could happen in the current code for situations where the modified
device tree segment exceeds the buffer size provided by the guest
via the call parameters. In these cases, QEMU will reset, allowing
an opportunity to regenerate th
From: Bharata B Rao
Add support to hot remove pc-dimm memory devices.
Since we're introducing a machine-level unplug_request hook, we also
had handling for CPU unplug there as well to ensure CPU unplug
continues to work as it did before.
Signed-off-by: Bharata B Rao
* add hooks to CAS/cmdline
Richard Henderson writes:
> On 10/24/2016 09:08 PM, Nikunj A Dadhania wrote:
>> Richard Henderson writes:
>>
>>> On 10/24/2016 02:14 AM, Nikunj A Dadhania wrote:
+#define EXTRACT_BITS(size) \
+static inline uint##size##_t extract_bits_u##siz
On 10/24/2016 03:49 AM, Andrew Jones wrote:
> On Fri, Oct 21, 2016 at 05:53:00PM -0400, Wei Huang wrote:
>> This patchset adds a pmu=[on/off] option to enable/disable vPMU support
>> for guest VM. There are several reasons to justify this option. First,
>> vPMU can be problematic for cross-migra
On 09/28/2016 11:15 AM, Rajalakshmi Srinivasaraghavan wrote:
From: Hariharan T.S
Attached updatde patch based on comments on vextu[bhw]lx.
--
Thanks
Rajalakshmi S
>From f027eb4903b89720634423c335e3688cf1e8632d Mon Sep 17 00:00:00 2001
From: Rajalakshmi Srinivasaraghavan
Date: Mon, 24 Oct
On 10/05/2016 10:51 AM, Rajalakshmi Srinivasaraghavan wrote:
On 09/28/2016 10:24 PM, Richard Henderson wrote:
On 09/27/2016 10:45 PM, Rajalakshmi Srinivasaraghavan wrote:
+#if defined(HOST_WORDS_BIGENDIAN)
+#define VEXTULX_DO(name, elem) \
+target_ulong glue
On 10/24/2016 09:08 PM, Nikunj A Dadhania wrote:
Richard Henderson writes:
On 10/24/2016 02:14 AM, Nikunj A Dadhania wrote:
+#define EXTRACT_BITS(size) \
+static inline uint##size##_t extract_bits_u##size(uint##size##_t reg, \
+
Richard Henderson writes:
> On 10/24/2016 02:14 AM, Nikunj A Dadhania wrote:
>> +#define EXTRACT_BITS(size) \
>> +static inline uint##size##_t extract_bits_u##size(uint##size##_t reg, \
>> + uint##size
On Mon, Oct 24, 2016 at 03:59:49PM +1100, David Gibson wrote:
> This series contains a number of cleanups to the libqos code for
> accessing PCI devices, and to tests which use it.
>
> The general aim is to improve the consistency of semantics across
> functions, and reduce the amount of intimate
On Sun, Oct 23, 2016 at 11:29:25AM +, Li, Liang Z wrote:
> > On Fri, Oct 21, 2016 at 10:25:21AM -0700, Dave Hansen wrote:
> > > On 10/20/2016 11:24 PM, Liang Li wrote:
> > > > Dave Hansen suggested a new scheme to encode the data structure,
> > > > because of additional complexity, it's not imp
Alex Bennée writes:
> Hi,
>
> In the MTTCG patch set one of the big patches is to remove the
> requirement to hold the BQL while running code:
>
> tcg: drop global lock during TCG code execution
>
> And this broke the PPC code because emulate_ppc_hypercall can cause
> changes to the global stat
On Tue, Oct 25, 2016 at 02:23:41PM +1100, David Gibson wrote:
> On Tue, Oct 25, 2016 at 01:50:02PM +1100, David Gibson wrote:
> > On Mon, Oct 24, 2016 at 04:04:31PM +1100, David Gibson wrote:
> > > For historical reasons construction of the guest device tree in spapr
> > > is divided between spapr_
As reported in the link below, user has a PCI device with a 4KB BAR
which contains the MSI-X table. This seems to hit a corner case in
the kernel where the region reports being mmap capable, but the sparse
mmap information reports a zero sized range. It's not entirely clear
that the kernel is inc
On Tue, Oct 25, 2016 at 01:50:02PM +1100, David Gibson wrote:
> On Mon, Oct 24, 2016 at 04:04:31PM +1100, David Gibson wrote:
> > For historical reasons construction of the guest device tree in spapr
> > is divided between spapr_create_fdt_skel() which is called at init
> > time, and spapr_build_fd
libcurl will only give us as much data as there is, not more. The block
layer will deny requests beyond the end of file for us; but since this
block driver is still using a sector-based interface, we can still get
in trouble if the file size is not a multiple of 512.
While we have already made sur
On Mon, Oct 24, 2016 at 03:44:01PM +0100, Alex Bennée wrote:
>
> Alex Bennée writes:
>
> > Hi,
> >
> > In the MTTCG patch set one of the big patches is to remove the
> > requirement to hold the BQL while running code:
> >
> > tcg: drop global lock during TCG code execution
> >
> > And this bro
At least for me, the FTP support of our curl block driver currently
doesn't work at all. This is due to (at least) three issues, for each of
which this series provides a patch (and the first patch is just a minor
clean-up).
1. When establishing an FTP connection, libcurl hands us some data we do
For some connection types (like FTP, generally), more than one socket
may be used (in FTP's case: control vs. data stream). As of commit
838ef602498b8d1985a231a06f5e328e2946a81d ("curl: Eliminate unnecessary
use of curl_multi_socket_all"), we have to remember all of the sockets
used by libcurl, but
On Sat, Oct 22, 2016 at 11:46:40AM +0200, Cédric Le Goater wrote:
> On a real POWER8 system, the Pervasive Interconnect Bus (PIB) serves
> as a backbone to connect different units of the system. The host
> firmware connects to the PIB through a bridge unit, the
> Alter-Display-Unit (ADU), which giv
Currently, curl defines its own constant SECTOR_SIZE. There is no
advantage over using the global BDRV_SECTOR_SIZE, so drop it.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Max Reitz
---
block/curl.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/block/curl.c b/bloc
On Mon, Oct 24, 2016 at 04:04:31PM +1100, David Gibson wrote:
> For historical reasons construction of the guest device tree in spapr
> is divided between spapr_create_fdt_skel() which is called at init
> time, and spapr_build_fdt() which runs at reset time. Over time, more
> and more things have
While commit 38bbc0a580f9f10570b1d1b5d3e92f0e6feb2970 is correct in that
the callback is supposed to return the number of bytes handled; what it
does not mention is that libcurl will throw an error if the callback did
not "handle" all of the data passed to it.
Therefore, if the callback receives s
On Mon, Oct 24, 2016 at 09:04:13AM -0700, Richard Henderson wrote:
> On 10/24/2016 02:14 AM, Nikunj A Dadhania wrote:
> > From: Vasant Hegde
> >
> > vmul10uq : Vector Multiply-by-10 Unsigned Quadword VX-form
> > vmul10euq : Vector Multiply-by-10 Extended Unsigned Quadword VX-form
> > vmul10cuq :
On Mon, Oct 24, 2016 at 04:17:05PM +1100, Alexey Kardashevskiy wrote:
> On 21/10/16 13:56, David Gibson wrote:
> > spapr_finalize_fdt() both finishes building the device tree for the guest
> > and loads it into guest memory. For future cleanups, it's going to be
> > more convenient to do these two
On Mon, Oct 24, 2016 at 05:56:22PM +1100, Nicholas Piggin wrote:
> On Mon, 24 Oct 2016 12:16:19 +1100
> David Gibson wrote:
>
> > On Fri, Oct 21, 2016 at 03:35:43PM +1100, Nicholas Piggin wrote:
> > > On Fri, 21 Oct 2016 12:09:54 +1100
> > > David Gibson wrote:
> > >
> > > > On Fri, Oct 21, 2
On Sat, Oct 22, 2016 at 11:46:41AM +0200, Cédric Le Goater wrote:
> Now that we are using real HW ids for the cores in PowerNV chips, we
> can route the XSCOM accesses to them. We just need to attach a
> specific XSCOM memory region to each core in the appropriate window
> for the core number.
>
>
On Mon, Oct 24, 2016 at 04:33:33PM +1100, David Gibson wrote:
> On Sat, Oct 22, 2016 at 11:46:33AM +0200, Cédric Le Goater wrote:
> > Hello,
> >
> > Here is the latest version of the ppc/pnv platform patchset. PowerNV
> > (as Non-Virtualized) is the "baremetal" platform using the OPAL
> > firmware
On Mon, Oct 17, 2016 at 04:24:31PM -0500, Michael Roth wrote:
> Quoting Peter Maydell (2016-10-17 13:45:21)
> > On 17 October 2016 at 19:13, Michael Roth wrote:
> > > We could do both though: use some ad-hoc way to tag for a particular
> > > sub-maintainer tree/stable branch, as well as an explici
The code used default values for PXA270 to configure CCCR. For PXA255,
the resulting register value is invalid (unsupported) and resulted
in a division by zero in the Linux kernel. Use default values from
datasheet instead.
Signed-off-by: Guenter Roeck
---
hw/arm/pxa2xx.c | 4 +++-
1 file change
The internal GPIO reset, enabled with GPR_EN, only applies to GPIO pin 1.
If other GPIO pins are used for reset, this is unrelated to GPR_EN, the
reset is an external reset pin, and it resets the entire system.
This fixes GPIO reset failures seen with various PXA270 emulations (akita,
borzoi, spit
Signed-off-by: Guenter Roeck
---
hw/arm/cubieboard.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index fbd78ed..dd19ba3 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -74,6 +74,7 @@ static void cubieboard_init(MachineState *machine)
Writing the ISR register is supposed to clear interrupt status bits,
not to set them.
This patch makes '-M sabrelite' work without devicetree changes (Linux
kernel versions 3.18 to 4.7 with imx_v6_v7_defconfig and up to v4.8 with
multi_v7_defconfig; mainline has different problems).
Signed-off-by
On 10/24/2016 05:36 PM, Paolo Bonzini wrote:
On 24/10/2016 03:44, Changlong Xie wrote:
Ping. Any comments? It's really a problem for NBD.
Sorry, I haven't been sending pull requests. I'll do it this week.
Thanks : )
Paolo
Thanks
-Xie
On 10/12/2016 06:18 PM, Changlong Xie wrote:
> On 10/20/2016 11:24 PM, Liang Li wrote:
> > Expose the function to get the max pfn, so it can be used in the
> > virtio-balloon device driver. Simply include the 'linux/bootmem.h'
> > is not enough, if the device driver is built to a module, directly
> > refer the max_pfn lead to build failed.
>
> On 10/20/2016 11:24 PM, Liang Li wrote:
> > Add a new feature which supports sending the page information with a
> > bitmap. The current implementation uses PFNs array, which is not very
> > efficient. Using bitmap can improve the performance of
> > inflating/deflating significantly
>
> Why is i
> On 10/20/2016 11:24 PM, Liang Li wrote:
> > Will allow faster notifications using a bitmap down the road.
> > balloon_pfn_to_page() can be removed because it's useless.
>
> This is a pretty terse description of what's going on here. Could you try to
> elaborate a bit? What *is* the current app
On 24/10/16 16:04, David Gibson wrote:
> spapr_finalize_fdt() both finishes building the device tree for the guest
> and loads it into guest memory. For future cleanups, it's going to be
> more convenient to do these two things separately. The loading portion is
> pretty trivial, so we move it in
On Mon, Oct 24, 2016 at 6:25 AM, P J P wrote:
> +-- On Mon, 24 Oct 2016, Alistair Francis wrote --+
> | > |
> http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
> |
> | Did the TRM have enough detail for you to figure out how the hardware
> behaves?
>
> Yes, it def
On Mon, Oct 24, 2016 at 2:21 PM, Eric Blake wrote:
> How are you getting max_transfer == 65536? I can't reproduce it with
> the following setup:
>
> $ qemu-img create -f qcow2 -o cluster_size=1M file 10M
> $ qemu-io -f qcow2 -c 'w 7m 1k' file
> $ qemu-io -f qcow2 -c 'w -z 8003584 2093056' file
>
With a vfio assigned device we lay down a base MemoryRegion registered
as an IO region, giving us read & write accessors. If the region
supports mmap, we lay down a higher priority sub-region MemoryRegion
on top of the base layer initialized as a RAM device pointer to the
mmap. Finally, if we hav
Setting skip_dump on a MemoryRegion allows us to modify one specific
code path, but the restriction we're trying to address encompasses
more than that. If we have a RAM MemoryRegion backed by a physical
device, it not only restricts our ability to dump that region, but
also affects how we should m
As based on previous RFC:
https://lists.gnu.org/archive/html/qemu-devel/2016-10/msg05183.html
TL;DR, this adds tracing, converts skip_dump to ram_device (named
after rom_device), adds full access widths, identifies ram_device
regions based on ops pointer.
Paolo had suggested converting "skip_dum
Thanks for the bug report, but please report kernel bugs in the kernel
bug tracker, not in the QEMU bug tracker (see http://www.linux-
kvm.org/page/Bugs for details). So if the problem still persists with
recent kernels, you should open a ticket there instead.
** Changed in: qemu
Status: Ne
This sounds like a kernel bug, so it should not be tracked via the QEMU
bug tracker.
** No longer affects: qemu
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/977391
Title:
BUG: soft lockup - CPU#8
Am 22.10.2016 um 17:09 schrieb Alex Williamson:
On Sat, 22 Oct 2016 11:10:59 +0200
Thorsten Kohfeldt wrote:
Hi *,
this came to my mind when browsing the sources in the patch's vicinity.
It is just a collection of thoughts, so please don't feel offended
about how I phrased certain statements
On Tue, 25 Oct 2016 02:57:58 +0530
Kirti Wankhede wrote:
> On 10/21/2016 12:54 AM, Alex Williamson wrote:
> > On Tue, 18 Oct 2016 02:52:05 +0530
> > Kirti Wankhede wrote:
> >
> >> Vendor driver using mediated device framework should use
> >> vfio_info_add_capability() to add capabilities.
> >
On Tue, 25 Oct 2016 02:52:39 +0530
Kirti Wankhede wrote:
> On 10/21/2016 12:54 AM, Alex Williamson wrote:
> > On Tue, 18 Oct 2016 02:52:06 +0530
> > Kirti Wankhede wrote:
> >
> >> Update msix_sparse_mmap_cap() to use vfio_info_add_capability()
> >> Update region type capability to use vfio_in
OK, I just read the text again, and the sentences before the one with
the 0xf indeed sounded like the the start address was at the last
byte. I've reworded the text now a little bit so that it should be more
accurate.
** Changed in: qemu
Status: Invalid => Fix Released
--
You received
Re-post (I had hit the send button by error :)
On Sat, 22 Oct 2016 11:07:22 -0400
Pradeep Jagadeesh wrote:
> Signed-off-by: Pradeep Jagadeesh
> ---
Hi Pradeep,
I see that Berto already did a thorough review for this patch and I agree for
all the suggestions he made.
I have some more to add.
On 10/21/2016 12:54 AM, Alex Williamson wrote:
> On Tue, 18 Oct 2016 02:52:05 +0530
> Kirti Wankhede wrote:
>
>> Vendor driver using mediated device framework should use
>> vfio_info_add_capability() to add capabilities.
>> Introduced this function to reduce code duplication in vendor drivers.
On Sat, 22 Oct 2016 11:07:22 -0400
Pradeep Jagadeesh wrote:
> Signed-off-by: Pradeep Jagadeesh
> ---
Hi Pradeep,
I see that Berto already did a thorough review for this patch and I agree for
all the suggestions he made.
I have some more to add. First: this patch doesn't apply cleanly, please
On 10/21/2016 12:54 AM, Alex Williamson wrote:
> On Tue, 18 Oct 2016 02:52:06 +0530
> Kirti Wankhede wrote:
>
>> Update msix_sparse_mmap_cap() to use vfio_info_add_capability()
>> Update region type capability to use vfio_info_add_capability()
>> Can't split this commit for MSIx and region_type
On 10/20/2016 07:24 PM, Ed Swierk wrote:
> Shortly after I start qemu 2.7.0 with a qcow2 disk image created with
> -o cluster_size=1048576, it prints the following and dies:
>
> block/qcow2.c:2451: qcow2_co_pwrite_zeroes: Assertion `head + count <=
> s->cluster_size' failed.
>
> I narrowed the pr
1 - 100 of 491 matches
Mail list logo