"Daniel P. Berrange" writes:
> Switch away from using OptsVisitor to parse the -numa
> argument processing. This enables use of the modern
> list syntax for specifying CPUs. e.g. the old syntax
>
> -numa node,nodeid=0,cpus=0-3,cpus=8-11,mem=107
>
> is equivalent to
>
> -numa node,nodeid=0,cpu
On 20.10.2016 07:11, David Gibson wrote:
> The original QOMification of the spapr VIO devices in 3954d33 "spapr:
> convert to QEMU Object Model (v2)" moved some callbacks from the
> VIOsPAPRBus structure to the VIOsPAPRDeviceClass. Except, that it
> forgot to actually remove them from the VIOsPAPR
On 19.10.2016 12:53, Paolo Bonzini wrote:
> Hi all,
>
> another small PSA. :) I have created a small but hopefully useful
> example of a new QEMU website at http://qemu-bonzini.rhcloud.com/. The
> site aims at providing and also a home for blog posts about QEMU.
Looks good to me! Two comments,
"Daniel P. Berrange" writes:
> The current object_add HMP syntax only allows for
> creation of objects with scalar properties, or a list
> with a fixed scalar element type. Objects which have
> properties that are represented as structs in the QAPI
> schema cannot be created using -object.
>
> Th
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Subject: [Qemu-devel] [PATCH] hostmem-file: add a property 'notrunc' to avoid
data corruption
Type: series
Message-id: 201610
If a file is used as the backend of memory-backend-file and its size is
not identical to the property 'size', the file will be truncated. For a
file used as the backend of vNVDIMM, its data is expected to be
persistent and the truncation may corrupt the existing data.
A property 'notrunc' is added
+-- On Wed, 19 Oct 2016, Alistair Francis wrote --+
| I don't think the Cadence datasheets are public. If you can't find it
| from a simple Google search I don't think you have access.
I see, okay.
I think it'll greatly help if device emulator writers include a link to its
specification/datash
For historical reasons construction of the /rtas node in the device
tree (amongst others) is split into several places. In particular
it's split between spapr_create_fdt_skel(), spapr_build_fdt() and
spapr_rtas_device_tree_setup().
In fact, as well as adding the actual RTAS tokens to the device t
Construction of the /vdevice node (and its children) is divided between
spapr_create_fdt_skel() (at init time), which creates the base node, and
spapr_populate_vdevice() (at reset time) which creates the nodes for each
individual virtual device.
This consolidates both into a single function called
spapr_finalize_fdt() both finishes building the device tree for the guest
and loads it into guest memory. For future cleanups, it's going to be
more convenient to do these two things separately. The loading portion is
pretty trivial, so we move it inline into the caller, ppc_spapr_reset().
We al
For historical reasons, building the /chosen node in the guest device tree
is split across several places and includes both parts which write the DT
sequentially and others which use random access functions.
This patch consolidates construction of the node into one place, using
random access funct
Currently spapr_create_fdt_skel() takes a bunch of individual parameters
for various things it will put in the device tree. Some of these can
already be taken directly from sPAPRMachineState. This patch alters it so
that all of them can be taken from there, which will allow this code to
be moved
The /event-sources device tree node is built from spapr_create_fdt_skel().
As part of consolidating device tree construction to reset time, this moves
it to spapr_build_fdt().
Signed-off-by: David Gibson
---
hw/ppc/spapr.c | 6 +++---
hw/ppc/spapr_events.c | 21 ++---
i
At each system reset, the pseries machine needs to load RTAS (the runtime
portion of the guest firmware) into the VM. This means copying
the actual RTAS code into guest memory, and also updating the device
tree so that the guest OS and boot firmware can locate it.
For historical reasons the copy
The flattened device tree passed to pseries guests contains a list of
reserved memory areas. Currently we construct this list early in
spapr_create_fdt_skel() as we sequentially write the fdt.
This will be inconvenient for upcoming cleanups, so this patch moves
the reserve map changes to the end
Currently the device tree node for the XICS interrupt controller is in
spapr_create_fdt_skel(). As part of consolidating device tree construction
to reset time, this moves it to a function called from spapr_build_fdt().
In addition we move the actual code into hw/intc/xics_spapr.c with the
rest o
For historical reasons construction of the guest device tree in spapr
is divided between spapr_create_fdt_skel() which is called at init
time, and spapr_build_fdt() which runs at reset time. Over time, more
and more things have needed to be moved to reset time.
This series consolidates all the de
For historical reasons construction of the guest device tree in spapr is
divided between spapr_create_fdt_skel() which is called at init time, and
spapr_build_fdt() which runs at reset time. Over time, more and more
things have needed to be moved to reset time.
Previous cleanups mean the only thi
Currently the /hypervisor device tree node is constructed in
spapr_create_fdt_skel(). As part of consolidating device tree construction
to reset time, move it to a function called from spapr_build_fdt().
Signed-off-by: David Gibson
---
hw/ppc/spapr.c | 49 ---
These values are used only within ppc_spapr_reset(), so just change them
to local variables.
Signed-off-by: David Gibson
Reviewed-by: Thomas Huth
Reviewed-by: Alexey Kardashevskiy
---
hw/ppc/spapr.c | 14 +++---
include/hw/ppc/spapr.h | 1 -
2 files changed, 7 insertions(+), 8
The original QOMification of the spapr VIO devices in 3954d33 "spapr:
convert to QEMU Object Model (v2)" moved some callbacks from the
VIOsPAPRBus structure to the VIOsPAPRDeviceClass. Except, that it
forgot to actually remove them from the VIOsPAPRBus structure (which
still exists, though it does
On 10/19/2016 08:01 PM, Marek Vasut wrote:
> You might like 0xfffc better, but that does require that you count
> f's appropriately for the type. That's why I like -4: it's obvious (or
> should be) that it masks to a multiple of 4, and type promotion extends
> bits to the left as needed for
On 2016/10/20 11:53, Jason Wang wrote:
On 2016年10月10日 11:49, Zhang Chen wrote:
On 10/10/2016 11:13 AM, Hailiang Zhang wrote:
Hi,
On 2016/10/10 10:52, Zhang Chen wrote:
On 09/30/2016 12:06 PM, zhanghailiang wrote:
find_and_check_chardev() uses 'opts' member of CharDriverState to
check i
Hi Jason,
On 2016/10/20 10:12, Jason Wang wrote:
On 2016年09月30日 12:06, zhanghailiang wrote:
find_and_check_chardev() uses 'opts' member of CharDriverState to
check if the chardev is 'socket' chardev or not, which the opts
will be NULL if We add the chardev by qmp 'chardev-add' command.
All t
As pointed out by Eric, files in the local directory with names of the
form 'nmemX' can break the recently added glob support by filtering
otherwise valid dimm names in a glob like 'nmem[X-Y]'. For robustness,
the glob argument would always need to be shell escaped, but at that
point it is less ch
The usual use model for the libqos PCI functions is to map a specific PCI
BAR using qpci_iomap() then pass the returned token into IO accessor
functions. This, and the fact that iomap() returns a (void *) which
actually contains a PCI space address, kind of suggests that the return
value from ioma
The PCI IO space (aka PIO, aka legacy IO) and PCI memory space (aka MMIO)
are distinct address spaces by the PCI spec (although parts of one might be
aliased to parts of the other in some cases).
However, qpci_io_read*() and qpci_io_write*() can perform accesses to
either space depending on parame
On Wed, Oct 19, 2016 at 04:51:41PM +0200, Laurent Vivier wrote:
>
>
> On 19/10/2016 16:43, Laurent Vivier wrote:
> >
> >
> > On 19/10/2016 14:25, David Gibson wrote:
> >> ide-test uses many explicit inb() / outb() operations for its IO, which
> >> means it's not portable to non-x86 platforms.
On 2016年10月10日 11:49, Zhang Chen wrote:
On 10/10/2016 11:13 AM, Hailiang Zhang wrote:
Hi,
On 2016/10/10 10:52, Zhang Chen wrote:
On 09/30/2016 12:06 PM, zhanghailiang wrote:
find_and_check_chardev() uses 'opts' member of CharDriverState to
check if the chardev is 'socket' chardev or not
Currently PCI memory (aka MMIO) space is accessed via a set of readb/writeb
style accessors. This is what we want for accessing discrete registers of
a certain size. However, there are a few cases where we instead need a
"bag of bytes" style streaming interface to PCI MMIO space. This can be
eit
The 'addr' parameter to qvirtio_config_read*() doesn't have a consistent
meaning: when using the virtio-pci versions, it's a full PCI space address,
but for virtio-mmio, it's an offset from the device's base mmio address.
This means that the callers need to do different things to calculate the
add
ide-test uses many explicit inb() / outb() operations for its IO, which
means it's not portable to non-x86 platforms. This cleans it up to use
the libqos PCI accessors instead.
Signed-off-by: David Gibson
---
tests/ide-test.c | 181 ---
1 file
In the libqos PCI code we now have accessors both for registers (byte
significance preserving) and for streaming data (byte address order
preserving). These exist in both the interface for qtest drivers and in
the machine specific backends.
However, the register-style accessors aren't actually ne
Avoid tco-test making assumptions about the internal format of the address
tokens passed to PCI IO accessors, by using the new qpci_legacy_iomap()
function.
Signed-off-by: David Gibson
Reviewed-by: Laurent Vivier
---
tests/tco-test.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff -
ivshmem implements a block of shared memory in a PCI BAR. Currently our
test case accesses this using qtest_mem{read,write}. However, deducing
the correct addresses for these requires making assumptions about the
internel format returned by qpci_iomap(), along with some ugly casts.
This patch ch
The PCI backends in libqos each supply an iomap() and iounmap() function
which is used to set up a specified PCI BAR. But PCI BAR allocation takes
place entirely within PCI space, so doesn't really need per-backend
versions. For example, Linux includes generic BAR allocation code used on
platform
This series contains a number of cleanups to the libqos code for
accessing PCI devices, and to tests which use it.
The general aim is to improve the consistency of semantics across
functions, and reduce the amount of intimate knowledge of the libqos
PCI layer needed by tests.
This should make it
On Wed, Oct 19, 2016 at 04:35:24PM +0200, Laurent Vivier wrote:
>
>
> On 19/10/2016 14:25, David Gibson wrote:
> > The usual use model for the libqos PCI functions is to map a specific PCI
> > BAR using qpci_iomap() then pass the returned token into IO accessor
> > functions. This, and the fact
Currently the libqos PCI layer includes accessor helpers for 8, 16 and 32
bit reads and writes. It's likely that we'll want 64-bit accesses in the
future (plenty of modern peripherals will have 64-bit reigsters). This
adds them.
For PIO (not MMIO) accesses on the PC backend, this is implemented
The usual model for PCI IO with libqos is to use qpci_iomap() to map a
specific BAR for a PCI device, then perform IOs within that BAR using
qpci_io_{read,write}*().
However, certain devices also have legacy PCI IO. In this case, instead of
(or as well as) being accessed via PCI BARs, the device
On Wed, Oct 19, 2016 at 03:33:33PM +0200, Laurent Vivier wrote:
>
>
> On 19/10/2016 14:25, David Gibson wrote:
> > The usual model for PCI IO with libqos is to use qpci_iomap() to map a
> > specific BAR for a PCI device, then perform IOs within that BAR using
> > qpci_io_{read,write}*().
> >
> >
On Wed, Oct 19, 2016 at 11:36:45AM +0530, Nikunj A Dadhania wrote:
> This series contains 6 new instructions for POWER9 ISA3.0
>Vector Integer Negate
>Vector Byte-Reverse
>
> Patches:
> 02:
> vnegw: Vector Negate Word
> vnegd: Vector Negate Doubleword
> 03:
> xxbrh: VSX Vector
On 10/19/2016 06:18 PM, Richard Henderson wrote:
> On 10/18/2016 07:31 PM, Marek Vasut wrote:
>>> Processing a little more data can be preferable to fewer branch
>>> prediction failures. And the best way to avoid those is to not have the
>>> branch at all. Especially when it's unlikely that the da
On 10/19/2016 05:50 PM, Richard Henderson wrote:
> On 10/18/2016 08:23 PM, Marek Vasut wrote:
>>> The documentation appears less than clear about whether or not loads
>>> into r0 recognize exceptions from the load, as opposed to simply not
>>> modifying r0.
>>
>> What about [1] page 10, quote:
>>
>
On 2016年10月08日 20:07, Li Qiang wrote:
From: Li Qiang
The exit dispatch of eepro100 network card device doesn't free
the 's->vmstate' field which was allocated in device realize thus
leading a host memory leak. This patch avoid this.
Signed-off-by: Li Qiang
---
hw/net/eepro100.c | 1 +
1
On 2016年10月07日 09:28, Brad Smith wrote:
Update the tap-bsd code now that OpenBSD uses tap(4).
Signed-off-by: Brad Smith
---
v2: Allow the code to deal with newer vs older OpenBSD releases
diff --git a/net/tap-bsd.c b/net/tap-bsd.c
index c506ac3..6c96922 100644
--- a/net/tap-bsd.c
+++ b/net/t
On Wed, 10/19 12:53, Paolo Bonzini wrote:
> Hi all,
>
> another small PSA. :) I have created a small but hopefully useful
> example of a new QEMU website at http://qemu-bonzini.rhcloud.com/. The
> site aims at providing and also a home for blog posts about QEMU.
>
> The site resides in a single
On 2016年09月30日 12:06, zhanghailiang wrote:
find_and_check_chardev() uses 'opts' member of CharDriverState to
check if the chardev is 'socket' chardev or not, which the opts
will be NULL if We add the chardev by qmp 'chardev-add' command.
All the related info can be found in 'filename' member o
On 2016年09月30日 14:49, P J P wrote:
From: Prasad J Pandit
Fix indentations and source format at few places. Add braces
around 'if' and 'while' statements.
Signed-off-by: Prasad J Pandit
---
hw/net/pcnet.c | 130 +
1 file changed, 67 in
On Wed, 10/19 22:46, Paolo Bonzini wrote:
> > Having an official binary installer for people who are not
> > comfortable with building QEMU would be a nice feature to have.
>
> As usual, this needs volunteers. Windows has Stefan.
For the rest of those, distro way to install (apt, dnf, brew...) w
On 2016年09月30日 13:36, P J P wrote:
Hello Jason,
+-- On Fri, 30 Sep 2016, Jason Wang wrote --+
| On 2016年09月30日 02:57, P J P wrote:
| > The AMD PC-Net II emulator has set of control and status(CSR)
| > registers. Of these, CSR76 and CSR78 hold receive and transmit
| > descriptor ring length
On 10/19/2016 10:14 PM, Paolo Bonzini wrote:
On 19/10/2016 15:39, Xiao Guangrong wrote:
On 10/19/2016 07:56 PM, Paolo Bonzini wrote:
On 19/10/2016 07:45, Xiao Guangrong wrote:
On 10/19/2016 10:32 AM, Jike Song wrote:
+EXPORT_SYMBOL_GPL(vfio_group_set_usrdata);
+
+void *vfio_group_ge
Hi Stefan,
1. You suggestion to move the failover implementation to libqnio is well taken.
Infact we are proposing that service/network failovers should not be handled in
gemu address space at all. The vxhs driver will know and talk to only a single
virtual IP. The service behind the virtual IP
Based on a suggestion here:
https://lists.gnu.org/archive/html/qemu-devel/2016-10/msg00350.html
Eric Blake (2):
block: Rename raw_bsd to raw.c
block: rename raw-{posix,win32} to file-*.c
include/block/block_int.h | 2 +-
block/{raw-posix.c => file-posix.c} | 0
block/{raw-win32.c =
These files deal with the file protocol, not the raw format (the
file protocol is often used with other formats, and the raw
protocol is not forced to use the file format). Rename things
to make it a bit easier to follow.
Suggested-by: Daniel P. Berrange
Signed-off-by: Eric Blake
---
include/b
The file has nothing to do with the BSD operating system, but
is rather dealing with the raw data format as a BDS. Simplify
the name to avoid further confusion. [Plus I hate typing _ in
file names - the shift key slows things down]
Suggested-by: Daniel P. Berrange
Signed-off-by: Eric Blake
---
Quick followup on this, finally got the time to build this + can
confirming I can boot raspbian with the default /etc/ld.so.conf to the
command prompt (both raspbian jessie lite and the default distro).
--
You received this bug notification because you are a member of qemu-
devel-ml, which is sub
On Wed, Oct 19, 2016 at 4:46 PM, Eric Blake wrote:
> On 10/19/2016 04:29 PM, Dan Williams wrote:
>> On Wed, Oct 19, 2016 at 12:41 PM, Dan Williams
>> wrote:
>>> On Wed, Oct 19, 2016 at 11:42 AM, Eric Blake wrote:
On 10/19/2016 11:47 AM, Dan Williams wrote:
> The 4.9 kernel added suppor
On 10/19/2016 04:29 PM, Dan Williams wrote:
> On Wed, Oct 19, 2016 at 12:41 PM, Dan Williams
> wrote:
>> On Wed, Oct 19, 2016 at 11:42 AM, Eric Blake wrote:
>>> On 10/19/2016 11:47 AM, Dan Williams wrote:
The 4.9 kernel added support for sub-dividing PMEM. With this kernel
patch [1] o
Yongbok Kim writes:
Hi I've tested the binary with the upstream but couldn't reproduce the
problem. Would you please provide more details?
What qemu version did you use?
Specifically, did you use any of the versions which I listed as failing?
If you used something newer than 2.7.0, then
On Thu, 20 Oct 2016 00:46:48 +0530
Kirti Wankhede wrote:
> On 10/19/2016 4:46 AM, Alex Williamson wrote:
> > On Tue, 18 Oct 2016 02:52:01 +0530
> > Kirti Wankhede wrote:
> >
> ...
> >> +static struct mdev_device *__find_mdev_device(struct parent_device
> >> *parent,
> >> +
On Wed, Oct 19, 2016 at 12:41 PM, Dan Williams wrote:
> On Wed, Oct 19, 2016 at 11:42 AM, Eric Blake wrote:
>> On 10/19/2016 11:47 AM, Dan Williams wrote:
>>> The 4.9 kernel added support for sub-dividing PMEM. With this kernel
>>> patch [1] on top of that baseline, the PMEM-sub-division support
On Tue, 18 Oct 2016 02:52:04 +0530
Kirti Wankhede wrote:
> VFIO IOMMU drivers are designed for the devices which are IOMMU capable.
> Mediated device only uses IOMMU APIs, the underlying hardware can be
> managed by an IOMMU domain.
>
> Aim of this change is:
> - To use most of the code of TYPE1
On 19/10/2016 19:01, Dr. David Alan Gilbert wrote:
> * Paolo Bonzini (pbonz...@redhat.com) wrote:
>>
>>
>> On 18/10/2016 16:01, Daniel P. Berrange wrote:
>
> I already use error_report's in places in migration threads of various
> types; I'm not sure if that's a problem.
>>> Unless th
On 19/10/2016 21:54, Programmingkid wrote:
> I really like the homepage you made. It looks really good. Reminds me
> of ReactOS's site.
>
> My idea is to have a page for each emulator: qemu-system-ppc,
> qemu-system-i386,...
I think this is more of a wiki thing. The website shouln't become muc
On 19/10/2016 17:38, Cornelia Huck wrote:
> - failures are in qom-test for aarch64:
> TEST: tests/qom-test... (pid=23997)
> /aarch64/qom/integratorcp: OK
> /aarch64/qom/nuri: OK
> /aarch64/qom/verdex
Hi Jeff,
Please see my comments inline.
Thanks,
Ketan.
On 10/18/16, 12:10 PM, "Jeff Cody" wrote:
>On Tue, Oct 11, 2016 at 12:56:06AM -0700, ashish mittal wrote:
>> Checked in a test server to libqnio that allows to open, read, write
>> to a vxhs vdisk using the qemu-io binary.
>>
>> Steps
> On Wed, Oct 19, 2016 at 12:53:55PM +0200, Paolo Bonzini wrote:
>> Hi all,
>>
>> another small PSA. :) I have created a small but hopefully useful
>> example of a new QEMU website at http://qemu-bonzini.rhcloud.com/. The
>> site aims at providing and also a home for blog posts about QEMU.
>>
>
On Wed, Oct 19, 2016 at 11:42 AM, Eric Blake wrote:
> On 10/19/2016 11:47 AM, Dan Williams wrote:
>> The 4.9 kernel added support for sub-dividing PMEM. With this kernel
>> patch [1] on top of that baseline, the PMEM-sub-division support can be
>> enabled for QEMU-KVM and any other platforms that
On 10/18/2016 10:47 PM, Alex Williamson wrote:
> On Tue, 18 Oct 2016 10:54:11 +0800
> Dong Jia Shi wrote:
>
>> * Kirti Wankhede [2016-10-18 02:52:12 +0530]:
>>
>> ...snip...
>>
>>> +static ssize_t mdev_access(struct mdev_device *mdev, char *buf,
>>> + size_t count, loff_t pos, bool i
On 10/19/2016 4:46 AM, Alex Williamson wrote:
> On Tue, 18 Oct 2016 02:52:01 +0530
> Kirti Wankhede wrote:
>
...
>> +static struct mdev_device *__find_mdev_device(struct parent_device *parent,
>> + uuid_le uuid)
>> +{
>> +struct device *dev;
>> +
>>
/usr/bin/qemu-system-x86_64 -name win10 -S -machine
pc-i440fx-2.6,accel=kvm,usb=off -cpu Haswell -m 2048 -realtime mlock=off
-smp 2,sockets=2,cores=1,threads=1 -uuid
9b3b910d-f3d1-494e-9471-943fc511d994 -no-user-config -nodefaults -chardev
socket,id=charmonitor,path=/var/lib/libvirt/qemu/win10.moni
* //-//ani Nemati (hani.nem...@gmail.com) wrote:
> Hi,
>
> Recently I was trying windows 10 on top of Qemu-KVM and I saw 4% of CPU is
> being used all the time even when the windows VM is idle. I tested it for
> nested VM (Linux(L0)->Linux(L1)->windows(L2)) and I saw CPU usage increased
> upto 4
On 10/19/2016 11:47 AM, Dan Williams wrote:
> The 4.9 kernel added support for sub-dividing PMEM. With this kernel
> patch [1] on top of that baseline, the PMEM-sub-division support can be
> enabled for QEMU-KVM and any other platforms that advertise both un-aliased
> PMEM regions and support for
On Wed, Oct 19, 2016 at 05:18:38PM +0200, Igor Mammedov wrote:
> On Wed, 19 Oct 2016 11:15:46 -0200
> Eduardo Habkost wrote:
>
> > On Wed, Oct 19, 2016 at 02:05:41PM +0200, Igor Mammedov wrote:
> > > Currently firmware uses 1 byte at 0x5F offset in RTC CMOS
> > > to get number of CPUs present at
* Daniel P. Berrange (berra...@redhat.com) wrote:
> On Wed, Oct 19, 2016 at 02:16:05PM +0200, Markus Armbruster wrote:
> > "Daniel P. Berrange" writes:
> >
> > > On Wed, Oct 19, 2016 at 11:05:53AM +0100, Dr. David Alan Gilbert wrote:
> > >>
> > >> We need a way to be able to report an error with
As appears to be usual, patch 6 was eaten. Attachment worked last time...
r~
>From 6ce760bc19546e4d139732e9a5eb44b578dd834b Mon Sep 17 00:00:00 2001
From: Richard Henderson
Date: Wed, 29 Jun 2016 22:12:55 -0700
Subject: [PATCH v7 06/35] tcg: Add EXCP_ATOMIC
MIME-Version: 1.0
Content-Type: text
On Wed, 19 Oct 2016, Wei Liu wrote:
> On Wed, Oct 19, 2016 at 11:40:40AM +0200, Juergen Gross wrote:
> > On 19/10/16 11:22, Wei Liu wrote:
> > > On Wed, Oct 19, 2016 at 11:09:21AM +0200, Juergen Gross wrote:
> > >> On 19/10/16 10:50, Wei Liu wrote:
> > >>> On Tue, Oct 18, 2016 at 12:09:55PM -0700,
On Tue, 18 Oct 2016 02:52:03 +0530
Kirti Wankhede wrote:
> Rearrange functions to have common function to increment container_users.
>
> Signed-off-by: Kirti Wankhede
> Signed-off-by: Neo Jia
> Change-Id: I1f93262bdbab75094bc24b087b29da35ba70c4c6
> ---
> drivers/vfio/vfio.c | 57
> ++
On Wed, Oct 19, 2016 at 05:42:16PM +0200, Radim Krčmář wrote:
> 2016-10-19 11:55-0200, Eduardo Habkost:
> > On Wed, Oct 19, 2016 at 03:27:52PM +0200, Radim Krčmář wrote:
> >> 2016-10-18 19:05-0200, Eduardo Habkost:
> >> > On Tue, Oct 18, 2016 at 10:52:14PM +0200, Radim Krčmář wrote:
> >> > [...]
>
From: "Emilio G. Cota"
Emulating LL/SC with cmpxchg is not correct, since it can
suffer from the ABA problem. Portable parallel code, however,
is written assuming only cmpxchg--and not LL/SC--is available.
This means that in practice emulating LL/SC with cmpxchg is
a viable alternative.
The appe
From: "Emilio G. Cota"
[rth: Move load of reg value to common location.]
Signed-off-by: Emilio G. Cota
Message-Id: <1467054136-10430-17-git-send-email-c...@braap.org>
Signed-off-by: Richard Henderson
---
target-i386/translate.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletio
Emulating LL/SC with cmpxchg is not correct, since it can
suffer from the ABA problem. However, portable parallel
code is written assuming only cmpxchg which means that in
practice this is a viable alternative.
Signed-off-by: Richard Henderson
---
linux-user/main.c| 49
Hi
- Original Message -
> Hi, all
> Recently, I have a VM with a vhost-user network card created by qemu 2.6.0.
> Once, I restart OpenVSwitch service
> and start this VM in the same time. I found qemu may probably crash with
> following stack:
>
> (gdb) bt
> #0 0x7f0f9179a5d7 in rais
From: "Emilio G. Cota"
It's been superseded by the atomic helpers.
The use of the atomic helpers provides a significant performance and scalability
improvement. Below is the result of running the atomic_add-test microbenchmark
with:
$ x86_64-linux-user/qemu-x86_64 tests/atomic_add-bench -o 500
Thank you for the response! I'll run off and test that. =)
/*
* Michael R. Hines
* Senior Engineer, DigitalOcean.
*/
On 10/18/2016 05:47 AM, Peter Lieven wrote:
Am 12.10.2016 um 23:18 schrieb Michael R. Hines:
Peter,
Greetings from DigitalOcean. We're experiencing the same symptoms
withou
From: "Emilio G. Cota"
Signed-off-by: Emilio G. Cota
Message-Id: <1467054136-10430-19-git-send-email-c...@braap.org>
Signed-off-by: Richard Henderson
---
target-i386/translate.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/tr
On 10/18/2016 03:17 PM, Aurelien Jarno wrote:
Actually gcc suggests to use icm %r0,15,0(%r8). It's even shorter than
lt %r0,0(%r8).
Yep, that works too.
r~
Stop specializing on TARGET_LONG_BITS == 32; unconditionally allocate
a temp and expand with tcg_gen_extu_i32_tl. Split out gen_aa32_addr,
gen_aa32_frob64, gen_aa32_ld_i32 and gen_aa32_st_i32 as separate interfaces.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
target-arm/trans
From: "Emilio G. Cota"
[rth: Move redundant qemu_load out of cmpxchg loop.]
Signed-off-by: Emilio G. Cota
Message-Id: <1467054136-10430-16-git-send-email-c...@braap.org>
Signed-off-by: Richard Henderson
---
target-i386/translate.c | 38 ++
1 file changed, 3
Rather than using helpers for physical accesses, use a mmu index.
The primary cleanup is with store-conditional on physical addresses.
Signed-off-by: Richard Henderson
---
target-alpha/cpu.h| 18 +---
target-alpha/helper.c | 8 ++
target-alpha/helper.h | 9 --
t
Force the use of cmpxchg16b on x86_64.
Wikipedia suggests that only very old AMD64 (circa 2004) did not have
this instruction. Further, it's required by Windows 8 so no new cpus
will ever omit it.
If we truely care about these, then we could check this at startup time
and then avoid executing pa
From: "Emilio G. Cota"
With this microbenchmark we can measure the overhead of emulating atomic
instructions with a configurable degree of contention.
The benchmark spawns $n threads, each performing $o atomic ops (additions)
in a loop. Each atomic operation is performed on a different cache lin
From: "Emilio G. Cota"
The exception is not emitted anymore; remove it and the associated
TCG variables.
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
Signed-off-by: Richard Henderson
Message-Id: <1467054136-10430-31-git-send-email-c...@braap.org>
---
target-arm/cpu.h | 17 +++
From: "Emilio G. Cota"
The exception is not emitted anymore.
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
Signed-off-by: Richard Henderson
Message-Id: <1467054136-10430-30-git-send-email-c...@braap.org>
---
linux-user/main.c | 125 ---
From: "Emilio G. Cota"
[rth: Avoid qemu_load that's redundant with the atomic op.]
Signed-off-by: Emilio G. Cota
Message-Id: <1467054136-10430-15-git-send-email-c...@braap.org>
Signed-off-by: Richard Henderson
---
target-i386/translate.c | 26 --
1 file changed, 20 ins
Reviewed-by: Emilio G. Cota
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
tcg/tcg-op.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index cdd61d6..bb2bfee 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -150,17 +150
From: "Emilio G. Cota"
Emulating LL/SC with cmpxchg is not correct, since it can
suffer from the ABA problem. Portable parallel code, however,
is written assuming only cmpxchg--and not LL/SC--is available.
This means that in practice emulating LL/SC with cmpxchg is
a viable alternative.
The appe
From: "Emilio G. Cota"
The exception is not emitted anymore.
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
Signed-off-by: Richard Henderson
Message-Id: <1467054136-10430-29-git-send-email-c...@braap.org>
---
linux-user/main.c | 93
From: "Emilio G. Cota"
Signed-off-by: Emilio G. Cota
Message-Id: <1467054136-10430-25-git-send-email-c...@braap.org>
Signed-off-by: Richard Henderson
---
target-arm/translate.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/target-arm/translate
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