On 08.06.2016 03:12, David Gibson wrote:
> On Tue, Jun 07, 2016 at 05:39:39PM +0200, Thomas Huth wrote:
>> When using an olderr PowerISA level, all the upper compatibility
s/olderr/older/ :-/
>> bits have to be enabled, too. For example when we want to run
>> something in PowerISA 2.05 compatibil
On 2016年06月08日 01:39, Greg Kurz wrote:
On Tue, 31 May 2016 12:43:11 +0800
Jason Wang wrote:
>On 2016年05月31日 12:19, Michael S. Tsirkin wrote:
> >On Tue, May 31, 2016 at 11:04:18AM +0800, Jason Wang wrote:
> >>
> >>On 2016年05月31日 02:07, Michael S. Tsirkin wrote:
> >>>On Thu, Apr 07, 2016 at
On 2016年06月07日 21:00, Peter Lieven wrote:
commit fefe2a78 accidently dropped the code path for injecting
raw packets. This feature is needed for sending gratuitous ARPs
after an incoming migration has completed. The result is increased
network downtime for vservers where the network card is not
On 2016年06月07日 13:02, P J P wrote:
+-- On Fri, 3 Jun 2016, P J P wrote --+
| +-- On Thu, 2 Jun 2016, Peter Maydell wrote --+
| | > case MIPSNET_TX_DATA_COUNT:
| | > - s->tx_count = (val <= MAX_ETH_FRAME_SIZE) ? val : 0;
| | > +s->tx_count = (val < MAX_ETH_FRAME_SIZE) ? val :
On Fri, May 27, 2016 at 03:51:59PM +0100, Peter Maydell wrote:
> The siginfo_t struct includes a union. The correct way to identify
> which fields of the union are relevant is complicated, because we
> have to use a combination of the si_code and si_signo to figure out
> which of the union's member
Emilio G. Cota writes:
> v5: https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg02366.html
>
> v6 applies cleanly on top of tcg-next (8b1fe3f4 "cpu-exec:
> Clean up 'interrupt_request' reloading", tagged "pull-tcg-20160512").
Emilio,
How is v7 going? I only mention it because we are star
On 06/08/2016 04:30 AM, xiaoqiang zhao wrote:
> commit f0d1d2c115dffc1fbaf954d0b449db05c5eb79b1
> ("hw/char: QOM'ify pl011 model") break qemu-system-arm virt machine
> if option '-machine secure=on' is provided.
>
> The function create_uart is called twice. So make CharDriverState pointer
> a pa
On Wed, Jun 08, 2016 at 02:13:49PM +0800, Dong Jia wrote:
> On Tue, 7 Jun 2016 20:48:42 -0700
> Neo Jia wrote:
>
> > On Wed, Jun 08, 2016 at 11:18:42AM +0800, Dong Jia wrote:
> > > On Tue, 7 Jun 2016 19:39:21 -0600
> > > Alex Williamson wrote:
> > >
> > > > On Wed, 8 Jun 2016 01:18:42 +
> >
On Tue, 7 Jun 2016 20:48:42 -0700
Neo Jia wrote:
> On Wed, Jun 08, 2016 at 11:18:42AM +0800, Dong Jia wrote:
> > On Tue, 7 Jun 2016 19:39:21 -0600
> > Alex Williamson wrote:
> >
> > > On Wed, 8 Jun 2016 01:18:42 +
> > > "Tian, Kevin" wrote:
> > >
> > > > > From: Alex Williamson [mailto:al
On 08/06/16 15:57, David Gibson wrote:
> On Mon, Jun 06, 2016 at 06:12:58PM +1000, Alexey Kardashevskiy wrote:
>> On 06/06/16 15:57, David Gibson wrote:
>>> On Wed, Jun 01, 2016 at 06:57:42PM +1000, Alexey Kardashevskiy wrote:
This adds support for Dynamic DMA Windows (DDW) option defined by
>
On 08/06/16 16:00, David Gibson wrote:
> On Mon, Jun 06, 2016 at 03:31:04PM +0200, Paolo Bonzini wrote:
>>
>>
>> On 02/06/2016 05:35, David Gibson wrote:
>>> On Wed, Jun 01, 2016 at 06:57:37PM +1000, Alexey Kardashevskiy wrote:
> Every IOMMU has some granularity which MemoryRegionIOMMUOps::tran
On Mon, Jun 06, 2016 at 04:45:50PM +1000, Alexey Kardashevskiy wrote:
> On 03/06/16 17:37, David Gibson wrote:
> > On Wed, Jun 01, 2016 at 06:57:41PM +1000, Alexey Kardashevskiy wrote:
> >> New VFIO_SPAPR_TCE_v2_IOMMU type supports dynamic DMA window management.
> >> This adds ability to VFIO commo
On Mon, Jun 06, 2016 at 06:12:58PM +1000, Alexey Kardashevskiy wrote:
> On 06/06/16 15:57, David Gibson wrote:
> > On Wed, Jun 01, 2016 at 06:57:42PM +1000, Alexey Kardashevskiy wrote:
> >> This adds support for Dynamic DMA Windows (DDW) option defined by
> >> the SPAPR specification which allows t
On Mon, Jun 06, 2016 at 03:31:04PM +0200, Paolo Bonzini wrote:
>
>
> On 02/06/2016 05:35, David Gibson wrote:
> > On Wed, Jun 01, 2016 at 06:57:37PM +1000, Alexey Kardashevskiy wrote:
> >> > Every IOMMU has some granularity which MemoryRegionIOMMUOps::translate
> >> > uses when translating, howev
On Tue, Jun 07, 2016 at 05:39:39PM +0200, Thomas Huth wrote:
> When using an olderr PowerISA level, all the upper compatibility
> bits have to be enabled, too. For example when we want to run
> something in PowerISA 2.05 compatibility mode on POWER8, the bit
> for 2.06 has to be set beside the bit
On Mon, 2016-06-06 at 15:01 +0100, Peter Maydell wrote:
> On 27 May 2016 at 06:08, Andrew Jeffery wrote:
> >
> > Value matching allows Linux to boot with CONFIG_NO_HZ_IDLE=y on the
> > palmetto-bmc machine. Two match registers are provided for each timer.
> >
> > Signed-off-by: Andrew Jeffery
>
This patch adds support of recording and replaying network packets in
irount rr mode.
Record and replay for network interactions is performed with the network filter.
Each backend must have its own instance of the replay filter as follows:
-netdev user,id=net1 -device rtl8139,netdev=net1
-object
On 2016-06-07 22:36, Alex Williamson wrote:
> On Sun, 22 May 2016 13:21:51 +0300
> David Kiarie wrote:
>
>> Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
>> The IOMMU does basic translation, error checking and has a
>> minimal IOTLB implementation. This IOMMU bypassed the need
>> for
From: Pavel Dovgalyuk
This patch fixes exception handling in PowerPC.
Instructions generate several types of exceptions.
When exception is generated, it breaks the execution of the current translation
block. Implementation of the exceptions handling does not correctly
restore icount for the instr
This patch fixes bug with stopping and restarting replay
through monitor.
Signed-off-by: Pavel Dovgalyuk
---
block/blkreplay.c| 18 +-
cpus.c |1 +
include/sysemu/replay.h |2 ++
replay/replay-internal.h |2 --
vl.c |
This set of patches includes fixes and additions for icount and
record/replay implementation:
- Fixing icount processing on exceptions in PPC
- Enabling VM start/stop in replay mode
- Adding network record/replay
---
Pavel Dovgalyuk (3):
target-ppc: exceptions handling in icount mode
On Wed, 8 Jun 2016 11:18:42 +0800
Dong Jia wrote:
> On Tue, 7 Jun 2016 19:39:21 -0600
> Alex Williamson wrote:
>
> > On Wed, 8 Jun 2016 01:18:42 +
> > "Tian, Kevin" wrote:
> >
> > > > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > > > Sent: Wednesday, June 08, 2016 6:42 A
在 2016年06月08日 05:32, Mark Cave-Ayland 写道:
On 07/06/16 11:34, xiaoqiang zhao wrote:
This patch series QOM'ify ARM platform related devices.
Where we drop the sysbus init function if possible and use
instance_init and DeviceClass::realize function.
xiaoqiang zhao (17):
hw/i2c: QOM'ify bitba
On Wed, Jun 08, 2016 at 11:18:42AM +0800, Dong Jia wrote:
> On Tue, 7 Jun 2016 19:39:21 -0600
> Alex Williamson wrote:
>
> > On Wed, 8 Jun 2016 01:18:42 +
> > "Tian, Kevin" wrote:
> >
> > > > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > > > Sent: Wednesday, June 08, 2016 6:
On Mon, 06/06 17:03, Max Reitz wrote:
> On 03.06.2016 10:49, Fam Zheng wrote:
> > In sync=none the backing image of s->target is s->common.bs, which could
> > be exclusively locked, the image locking wouldn't work here.
> >
> > Later we can update completion code to lock it after the replaced node
On Tue, 7 Jun 2016 19:39:21 -0600
Alex Williamson wrote:
> On Wed, 8 Jun 2016 01:18:42 +
> "Tian, Kevin" wrote:
>
> > > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > > Sent: Wednesday, June 08, 2016 6:42 AM
> > >
> > > On Tue, 7 Jun 2016 03:03:32 +
> > > "Tian, Kevin"
On Thu, Jun 02, 2016 at 11:15:55PM +0300, Marcel Apfelbaum wrote:
> Allow adding sysbus devices with -device on Q35.
>
> At first Q35 will support only intel-iommu to be added this way,
> however the command line will support all sysbus devices.
>
> Mark with 'cannot_instantiate_with_device_add_y
On Tue, 06/07 21:51, Jason Dillaman wrote:
> On Fri, Jun 3, 2016 at 4:48 AM, Fam Zheng wrote:
> > +typedef enum {
> > +/* The values are ordered so that lower number implies higher
> > restriction.
> > + * Starting from 1 to make 0 an invalid value.
> > + * */
> > +BDRV_LOCKF_EXCL
On Tue, Jun 07, 2016 at 06:37:28PM -0500, Michael Roth wrote:
> Quoting Bharata B Rao (2016-06-07 00:19:03)
> > Memory hotplug can fail for some combinations of RAM and maxmem when
> > DDW is enabled in the presence of devices like nec-usb-xhci. DDW depends
> > on maximum addressable memory returne
commit f0d1d2c115dffc1fbaf954d0b449db05c5eb79b1
("hw/char: QOM'ify pl011 model") break qemu-system-arm virt machine
if option '-machine secure=on' is provided.
The function create_uart is called twice. So make CharDriverState pointer
a parameter to create_uart instead of hardcoded.
Signed-off-by:
On Tue, Jun 07, 2016 at 10:32:10PM +1000, Anton Blanchard wrote:
> From: Anton Blanchard
>
> There are a few issues with our handling of the ibm,pa-features
> TM bit:
>
> - We don't support transactional memory in PR KVM, so don't tell
> the OS that we do.
>
> - In full emulation we have a mi
On Tue, Jun 07, 2016 at 10:28:42PM +1000, Anton Blanchard wrote:
> From: Anton Blanchard
>
> We need the PPC_FEATURE2_HAS_HTM bit in a subsequent patch, so
> add the PowerPC AT_HWCAP2 definitions.
>
> Signed-off-by: Anton Blanchard
Applied to ppc-for-2.7.
Paolo or Peter: since this is a chang
On Tue, Jun 07, 2016 at 10:32:34PM +0300, David Kiarie wrote:
> On Tue, Jun 7, 2016 at 10:12 PM, Eduardo Habkost wrote:
> > Hi,
>
> Hello,
>
> >
> > I didn't review the amd_iommu.c code, but there seems to be some
> > unrelated changes in the patch:
>
> Thanks for looking at this but I actually
在 2016年06月08日 05:24, Peter Maydell 写道:
On 7 June 2016 at 15:47, Jérôme Forissier wrote:
Hi,
I just noticed this error [1] (QEMU master branch):
../qemu/arm-softmmu/qemu-system-arm -nographic -monitor none -machine
virt -machine secure=on -cpu cortex-a15 -m 1057 -serial stdio -serial
file:se
On 2016/5/26 22:55, Peter Maydell wrote:
> Implement the GICv3 logic to recalculate the highest priority pending
> interrupt for each CPU after some part of the GIC state has changed.
> We avoid unnecessary full recalculation where possible.
>
> Signed-off-by: Peter Maydell
> ---
> hw/intc/arm
On 06/07/16 17:18, Eduardo Habkost wrote:
> On Fri, Jun 03, 2016 at 02:09:44PM +0800, Haozhong Zhang wrote:
> > LMCE is disabled by default, but a cpu option 'lmce=on/off' is provided
> > to enable/disable it. Migration is only allowed between VCPUs with the
> > same lmce option.
> >
> > Signed-of
On Fri, Jun 3, 2016 at 4:48 AM, Fam Zheng wrote:
> +typedef enum {
> +/* The values are ordered so that lower number implies higher
> restriction.
> + * Starting from 1 to make 0 an invalid value.
> + * */
> +BDRV_LOCKF_EXCLUSIVE = 1,
> +BDRV_LOCKF_SHARED,
> +BDRV_LOCKF_UN
On 06/07/16 17:10, Eduardo Habkost wrote:
> On Fri, Jun 03, 2016 at 02:09:43PM +0800, Haozhong Zhang wrote:
> [...]
> > +
> > +if (cpu->enable_lmce) {
> > +if (lmce_supported()) {
> > +cenv->mcg_cap |= MCG_LMCE_P;
> > +cenv->msr_ia32_feature_contr
On Wed, 8 Jun 2016 01:18:42 +
"Tian, Kevin" wrote:
> > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > Sent: Wednesday, June 08, 2016 6:42 AM
> >
> > On Tue, 7 Jun 2016 03:03:32 +
> > "Tian, Kevin" wrote:
> >
> > > > From: Alex Williamson [mailto:alex.william...@redhat.
On Tue, Jun 07, 2016 at 05:39:39PM +0200, Thomas Huth wrote:
> When using an olderr PowerISA level, all the upper compatibility
> bits have to be enabled, too. For example when we want to run
> something in PowerISA 2.05 compatibility mode on POWER8, the bit
> for 2.06 has to be set beside the bit
On Tue, Jun 07, 2016 at 05:39:35PM +0200, Thomas Huth wrote:
> If a guest currently only requests PowerISA 2.07 compatiblity mode with
> the "ibm,client-architecture-support" firmware call, but does not
> specify a matching real PVR for the host CPU on a POWER8 host,
> it ends up in POWER7 / PowerI
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
Reviewed-by: Eric Blake
---
qapi/block-core.json | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/qapi/block-core.json b/q
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Wednesday, June 08, 2016 6:42 AM
>
> On Tue, 7 Jun 2016 03:03:32 +
> "Tian, Kevin" wrote:
>
> > > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > > Sent: Tuesday, June 07, 2016 3:31 AM
> > >
> > > On Mon, 6 Jun
From: Wen Congyang
Auto complete mirror job in background to prevent from
blocking synchronously
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
---
block/mirror.c| 13 +
blockdev.c| 2 +-
include/block/block_int.h | 3 ++-
qemu-img.c
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
---
Makefile.objs| 1 +
qapi/block-core.json | 13
replication.c| 105 ++
replication.h| 176
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
---
block/Makefile.objs | 1 +
block/replication.c | 657
2 files changed, 658 insertions(+)
create mode 100
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
---
tests/.gitignore | 1 +
tests/Makefile | 4 +
tests/test-replication.c | 555 +++
3 files changed, 560 insertions(+)
create mode 100644 tests/test-replication.c
diff -
Normal backup(sync='none') workflow:
step 1. NBD peformance I/O write from client to server
qcow2_co_writev
bdrv_co_writev
...
bdrv_aligned_pwritev
notifier_with_return_list_notify -> backup_do_cow
bdrv_driver_pwritev // write new contents
step 2. drive-backup s
From: Wen Congyang
Some programs that add a dependency on it will use
the block layer directly.
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Jeff Cody
---
block/Makefile.objs | 2 +-
Block replication is a very important feature which is used for
continuous checkpoints(for example: COLO).
You can get the detailed information about block replication from here:
http://wiki.qemu.org/Features/BlockReplication
Usage:
Please refer to docs/block-replication.txt
You can get the patc
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
---
block.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/block.c b/block.c
index 736432f..dcf63f4 100644
--- a/block.c
+++ b/block.c
@@ -1310,6 +1310,23 @@ void bdrv_set_backing_hd(BlockDriver
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
---
block/backup.c | 18 ++
include/block/block_backup.h | 3 +++
2 files changed, 21 insertions(+)
create mode 100644 include/block
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
---
docs/block-replication.txt | 239 +
1 file changed, 239 insertions(+)
create mode 100644 docs/block-replication.txt
On 2016/6/7 20:06, Dr. David Alan Gilbert wrote:
* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote:
This is the 17th version of COLO FT feature.
Here is only COLO frame part, you can get the whole codes from github:
https://github.com/coloft/qemu/commits/colo-v3.0-periodic-mode
Migration
Quoting Thomas Huth (2016-06-07 10:39:36)
> The h_client_architecture_support() function has become quite big
> and nested already. So factor out the code that takes care of the
> sPAPR compatibility PVRs (which will be modified by the following
> patches).
>
> Signed-off-by: Thomas Huth
Restruc
Quoting Thomas Huth (2016-06-07 10:39:38)
> When running with KVM, we might be interested in some details
> of the host CPU class, too, so provide a function to get the
> corresponding CPU class.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Michael Roth
> ---
> target-ppc/kvm.c | 19 ++
Quoting Thomas Huth (2016-06-07 10:39:37)
> The current pcr_mask values are ambiguous: Should these be the mask
> that defines valid bits in the PCR register? Or should these rather
> indicate which compatibility levels are possible? Anyway, POWER6 and
> POWER7 should certainly not use the same val
On Tue, 06/07 15:30, Peter Maydell wrote:
> On 7 June 2016 at 15:00, Peter Maydell wrote:
> > On 7 June 2016 at 04:24, Fam Zheng wrote:
> >> On Mon, 06/06 12:53, Eduardo Habkost wrote:
> >>> The eval trick for defining DOCKER_SRC_COPY doesn't do anything
> >>> useful, as DOCKER_SRC_COPY is immedi
On Tue, Jun 07, 2016 at 18:56:48 +0300, Sergey Fedorov wrote:
> On 07/06/16 04:05, Emilio G. Cota wrote:
> > On Sat, May 28, 2016 at 21:15:06 +0300, Sergey Fedorov wrote:
> >> On 25/05/16 04:13, Emilio G. Cota wrote:
> >>> diff --git a/util/qdist.c b/util/qdist.c
> >>> new file mode 100644
> >>> in
Quoting Bharata B Rao (2016-06-07 00:19:03)
> Memory hotplug can fail for some combinations of RAM and maxmem when
> DDW is enabled in the presence of devices like nec-usb-xhci. DDW depends
> on maximum addressable memory returned by guest and this value is currently
> being calculated wrongly by t
On 06/01/2016 09:36 AM, Markus Armbruster wrote:
> Eric Blake writes:
>
>> Rather than making the dealloc visitor track of stack of pointers
>> remembered during visit_start_* in order to free them during
>> visit_end_*, it's a lot easier to just make all callers pass the
>> same pointer to visit
On Tue, Jun 07, 2016 at 17:06:16 +0300, Sergey Fedorov wrote:
> On 07/06/16 02:40, Emilio G. Cota wrote:
> > On Fri, Jun 03, 2016 at 20:46:07 +0300, Sergey Fedorov wrote:
> >> Maybe something like
> >> https://en.wikipedia.org/wiki/Kahan_summation_algorithm could help?
> > That algorithm is overkil
> 在 2016年6月8日，05:24，Peter Maydell 写道：
>
>> On 7 June 2016 at 15:47, Jérôme Forissier
>> wrote:
>> Hi,
>>
>> I just noticed this error [1] (QEMU master branch):
>>
>> ../qemu/arm-softmmu/qemu-system-arm -nographic -monitor none -machine
>> virt -machine secure=on -cpu cortex-a15 -m 1057 -ser
On Tue, 7 Jun 2016 03:03:32 +
"Tian, Kevin" wrote:
> > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > Sent: Tuesday, June 07, 2016 3:31 AM
> >
> > On Mon, 6 Jun 2016 10:44:25 -0700
> > Neo Jia wrote:
> >
> > > On Mon, Jun 06, 2016 at 04:29:11PM +0800, Dong Jia wrote:
> >
On 6/8/2016 6:46 AM, Alex Williamson wrote:
On Tue, 7 Jun 2016 17:21:06 +1200
"Huang, Kai" wrote:
On 6/7/2016 3:58 PM, Alex Williamson wrote:
On Tue, 7 Jun 2016 11:20:32 +0800
Peter Xu wrote:
On Mon, Jun 06, 2016 at 11:02:11AM -0600, Alex Williamson wrote:
On Mon, 6 Jun 2016 21:43:17 +0
On Tue, Jun 07, 2016 at 03:07:33PM -0600, Eric Blake wrote:
> On 06/07/2016 02:25 PM, Eduardo Habkost wrote:
>
> > [...]
> >> +/* TODO: convert plus_features & minus_features static vars
> >> + * to global properties, once broken host_features is fixed
> >> + */
> >
> > I will rewrite
On 07/06/16 23:04, Mark Cave-Ayland wrote:
> Artyom has been working on QEMU's SPARC emulation for several years, providing
> initial support for Solaris under qemu-system-sparc and more recently bugfixes
> for qemu-system-sparc64 and TCG patch reviews. As work progresses on improving
> emulation
Artyom has been working on QEMU's SPARC emulation for several years, providing
initial support for Solaris under qemu-system-sparc and more recently bugfixes
for qemu-system-sparc64 and TCG patch reviews. As work progresses on improving
emulation for sun4u machines and beyond, Artyom has agreed to
On 7 June 2016 at 22:32, Mark Cave-Ayland wrote:
> On 07/06/16 11:34, xiaoqiang zhao wrote:
>
>> This patch series QOM'ify ARM platform related devices.
>> Where we drop the sysbus init function if possible and use
>> instance_init and DeviceClass::realize function.
>>
>> xiaoqiang zhao (17):
>>
On Tue, Jun 7, 2016 at 1:30 PM, wrote:
> From: KONRAD Frederic
Hey Peter,
These are all reviewed by Xilinx, this is ready to merge from our point of view.
Thanks,
Alistair
>
> This is the 9th version of this patch-set of the implementation of the Xilinx
> DisplayPort and DPDMA.
>
> This 9th
On 07/06/16 11:34, xiaoqiang zhao wrote:
> This patch series QOM'ify ARM platform related devices.
> Where we drop the sysbus init function if possible and use
> instance_init and DeviceClass::realize function.
>
> xiaoqiang zhao (17):
> hw/i2c: QOM'ify bitbang_i2c.c
> hw/i2c: QOM'ify exynos4
On 7 June 2016 at 20:53, Laurent Vivier wrote:
>
>
> Le 06/06/2016 à 20:58, Peter Maydell a écrit :
>> Since TARGET_ERESTARTSYS and TARGET_ESIGRETURN are internal-to-QEMU
>> error numbers, handle them specially in target_strerror(), to avoid
>> confusing strace output like:
>>
>> 9521 rt_sigreturn
On 7 June 2016 at 15:47, Jérôme Forissier wrote:
> Hi,
>
> I just noticed this error [1] (QEMU master branch):
>
> ../qemu/arm-softmmu/qemu-system-arm -nographic -monitor none -machine
> virt -machine secure=on -cpu cortex-a15 -m 1057 -serial stdio -serial
> file:serial1.log -bios
> /home/travis/o
On 7 June 2016 at 21:41, Laurent Vivier wrote:
>
> Le 06/06/2016 à 20:58, Peter Maydell a écrit :
>> Use the __get_user() and __put_user() to handle reading and writing the
>> guest structures in do_ioctl(). This has two benefits:
>> * avoids possible errors due to misaligned guest pointers
>> *
On 7 June 2016 at 20:36, Laurent Vivier wrote:
>
>
> Le 27/05/2016 à 16:52, Peter Maydell a écrit :
>> host_to_target_siginfo() is implemented by a combination of
>> host_to_target_siginfo_noswap() followed by tswap_siginfo().
>> The first of these two functions assumes that the target_siginfo_t
>
On 06/07/2016 02:25 PM, Eduardo Habkost wrote:
> [...]
>> +/* TODO: convert plus_features & minus_features static vars
>> + * to global properties, once broken host_features is fixed
>> + */
>
> I will rewrite this to:
>
> /*TODO: cpu->host_features inclurrectly overwrites featur
On 7 June 2016 at 20:22, Laurent Vivier wrote:
> Where is coming from QEMU_SI_TIMER?
> It is not used elsewhere.
It's the enum constant that goes with "we use the
.sifields.timer fields of the union". At the moment we
don't have any cases which cause us to think we should
use those (and we didn't
I'm trying to add virtual battery to QEMU. More specifically, if the
HOST is running on battery power [laptop] I want to pass this knowledge
to GUEST.
I have looked at ACPI folder within QEMU source code, however was unable
to find the specific place where I can add this functionality.
Can someon
From: Marc-André Lureau
Test a few guest-exec guest agent commands, added in qemu 2.5.
Signed-off-by: Marc-André Lureau
Signed-off-by: Michael Roth
---
tests/test-qga.c | 81
1 file changed, 81 insertions(+)
diff --git a/tests/test-qga
The following changes since commit 6ed5546fa7bf12c5b87ef76bafb86e1d77ed6e85:
Merge remote-tracking branch
'remotes/mjt/tags/pull-trivial-patches-2016-06-07' into staging (2016-06-07
16:34:45 +0100)
are available in the git repository at:
git://github.com/mdroth/qemu.git tags/qga-pull-2016
Quoting marcandre.lur...@redhat.com (2016-06-03 07:27:50)
> From: Marc-André Lureau
>
> Test a few guest-exec guest agent commands, added in qemu 2.5.
>
> Signed-off-by: Marc-André Lureau
Thanks, applied to qga tree:
https://github.com/mdroth/qemu/tree/qga
> ---
> tests/test-qga.c | 81
>
Le 06/06/2016 à 20:58, Peter Maydell a écrit :
> Use the __get_user() and __put_user() to handle reading and writing the
> guest structures in do_ioctl(). This has two benefits:
> * avoids possible errors due to misaligned guest pointers
> * correctly sign extends signed fields (like l_start in
On Sun, 22 May 2016 13:21:51 +0300
David Kiarie wrote:
> Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
> The IOMMU does basic translation, error checking and has a
> minimal IOTLB implementation. This IOMMU bypassed the need
> for target aborts by responding with IOMMU_NONE access rig
On Mon, Jun 06, 2016 at 05:16:47PM +0200, Igor Mammedov wrote:
> From: Eduardo Habkost
>
> Signed-off-by: Eduardo Habkost
> Reviewed-by: Igor Mammedov
> Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
A small suggestion in case we are going to need a new version of
this series, be
From: KONRAD Frederic
This adds the DP and the DPDMA to the Zynq MP platform.
Signed-off-by: KONRAD Frederic
Reviewed-by: Peter Crosthwaite
Reviewed-by: Alistair Francis
Tested-By: Hyun Kwon
---
hw/arm/xlnx-zynqmp.c | 32 +++-
include/hw/arm/xlnx-zynqmp.h
From: KONRAD Frederic
This is the 9th version of this patch-set of the implementation of the Xilinx
DisplayPort and DPDMA.
This 9th version fixes some minors issues.
The fourth patch introduces an AUX bus needed by the DP to read the DPCD.
It's also possible to connect an I2C device on it to do
From: KONRAD Frederic
This is the implementation of the DPDMA.
Signed-off-by: KONRAD Frederic
Reviewed-by: Alistair Francis
Tested-By: Hyun Kwon
---
hw/dma/Makefile.objs| 1 +
hw/dma/xlnx_dpdma.c | 794
include/hw/dma/xlnx_dpdma.
Hi,
> Agreed. The target of this patch is however not people who know that
> they want security, but rather people who don't know it :-). Ie.
> people who just run things with their default settings and stop as
> soon as it seems to work, without conideration for security.
I have my doubts this
From: KONRAD Frederic
This does a write to every slaves when the I2C bus get a write to address 0.
Signed-off-by: KONRAD Frederic
Reviewed-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
Tested-By: Hyun Kwon
---
hw/i2c/core.c | 129 ++-
From: KONRAD Frederic
This is the implementation of the DisplayPort.
It has an aux-bus to access dpcd and edid.
Graphic plane is connected to the channel 3.
Video plane is connected to the channel 0.
Audio stream are connected to the channels 4 and 5.
Signed-off-by: KONRAD Frederic
Tested-By:
From: Peter Crosthwaite
Most of the control flow logic between send and recv (error checking
etc) is the same. Factor this out into a common send_recv() API.
This is then usable by clients, where the control logic for send
and receive differs only by a boolean. E.g.
if (send)
i2c_send(...):
e
From: KONRAD Frederic
This introduces dpcd module.
It wires on a aux-bus and can be accessed by the driver to get lane-speed, etc.
Signed-off-by: KONRAD Frederic
Reviewed-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
Tested-By: Hyun Kwon
---
default-configs/aarch64-softmmu.mak | 1 +
From: KONRAD Frederic
The dev field in i2cbus is not used.
So just drop it.
Signed-off-by: KONRAD Frederic
Reviewed-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
Tested-By: Hyun Kwon
---
hw/i2c/core.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/i2c/core.c b/hw/i2c/core.c
ind
From: Peter Maydell
Implement an I2C slave which implements DDC and returns the
EDID data for an attached monitor.
Signed-off-by: Peter Maydell
- Rebased on the current master.
- Modified for QOM.
Signed-off-by: KONRAD Frederic
Reviewed-by: Alistair Francis
Tested-By: Hyun Kwon
---
de
From: KONRAD Frederic
This introduces a new bus: aux-bus.
It contains an address space for aux slaves devices and a bridge to an I2C bus
for I2C through AUX transactions.
Signed-off-by: KONRAD Frederic
Tested-By: Hyun Kwon
Reviewed-by: Alistair Francis
---
default-configs/aarch64-softmmu.ma
On Mon, Jun 06, 2016 at 05:16:46PM +0200, Igor Mammedov wrote:
> now cpu_x86_init() does nothing more or less
> than duplicating cpu_generic_init() logic.
> So simplify it by using cpu_generic_init().
>
> Signed-off-by: Igor Mammedov
> Reviewed-by: Eduardo Habkost
Applied to x86-next. Thanks.
On Mon, Jun 06, 2016 at 05:16:45PM +0200, Igor Mammedov wrote:
> it will allow to drop custom cpu_x86_init() and use
> cpu_generic_init() insteadi, reducing cpu_x86_create()
> to a simple 3-liner.
>
> Signed-off-by: Igor Mammedov
> Eduardo Habkost
Applied to x86-next. Thanks.
--
Eduardo
On Mon, Jun 06, 2016 at 05:16:44PM +0200, Igor Mammedov wrote:
> Making x86_cpu_parse_featurestr() a pure convertor
> of legacy feature string into global properties, needs
> it to be called before a CPU instance is created so
> parser shouldn't modify CPUState directly or access
> it at all. Hence
On Mon, Jun 06, 2016 at 05:16:45PM +0200, Igor Mammedov wrote:
> it will allow to drop custom cpu_x86_init() and use
> cpu_generic_init() insteadi, reducing cpu_x86_create()
> to a simple 3-liner.
>
> Signed-off-by: Igor Mammedov
> Eduardo Habkost
The "Reviewed-by: " prefix is missing, but this
On Tue, Jun 7, 2016 at 12:02 AM, KONRAD Frederic
wrote:
>
>
> Le 06/06/2016 à 20:41, Alistair Francis a écrit :
>>
>> On Mon, Jun 6, 2016 at 7:21 AM, wrote:
>>>
>>> From: KONRAD Frederic
>>>
>>> This introduces a new bus: aux-bus.
>>>
>>> It contains an address space for aux slaves devices and
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