And, yes, out-of-order messages are totally fine - we just have to be
careful with the design.
- Michael
On Sun, Dec 20, 2015 at 3:08 PM, Michael R. Hines
wrote:
> Adding such a control message would defeat the benefits of RDMA, as there
> shouldn't be any signalling in the actual DMA path,
Adding such a control message would defeat the benefits of RDMA, as there
shouldn't be any signalling in the actual DMA path, or RDMA latency would
be too high. If you're sending control messages for individual writes, then
you need to change up your design. It's OK to design ACKs for groups of
wri
From: Alistair Francis
Connect the Xilinx SPI devices to the ZynqMP model.
Signed-off-by: Alistair Francis
[ PC changes
* Use QOM alias for bus connectivity on SoC level
]
Signed-off-by: Peter Crosthwaite
---
V6:
- Use QOM alias for bus connectivity on SoC level
V5:
- Use the bus renaming f
From: Alistair Francis
Move the ssi.h include file into the ssi directory.
While touching the code also fix the typdef lines as
checkpatch complains.
Signed-off-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
Signed-off-by: Peter Crosthwaite
---
hw/arm/pxa2xx.c | 2
From: Alistair Francis
Add the sst25wf080 SPI flash device.
Signed-off-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
Signed-off-by: Peter Crosthwaite
---
hw/block/m25p80.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index efc43dd..7b9f97c
From: Alistair Francis
Connect the sst25wf080 SPI flash to the EP108 board.
Signed-off-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
Signed-off-by: Peter Crosthwaite
---
hw/arm/xlnx-ep108.c | 16
1 file changed, 16 insertions(+)
diff --git a/hw/arm/xlnx-ep108.c b/hw/
From: Alistair Francis
Separate out the XilinxSPIPS struct into a separate header
file.
Signed-off-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
Signed-off-by: Peter Crosthwaite
---
hw/ssi/xilinx_spips.c | 46 +++
include/hw/ssi/xilinx_spips.h | 72
Hi All,
This is a modification of Alistair's ZynqMP SPI work, which proposes a
solution to the SoC bus-aliasing problem. Patch 1 is the big change,
and patches 5 and 6 demo the capability.
I have only tested this -S as I do not have images that test SPI handy,
but qtree looks correct with the new
qbus_realize() adds busses as a QOM child of the device in addition to
adding it to the qdev bus list. Change get_child_bus() to use the QOM
child if it is available. This takes priority over the bus-list, but
the child object is checked for type correctness.
This prepares support for aliasing of
The three parts are:
- root hub reset (ohci_roothub_reset)
- host controller soft reset (ohci_soft_reset)
- host controller hard reset (ohci_hard_reset)
Signed-off-by: Hervé Poussineau
---
hw/usb/hcd-ohci.c | 64 ---
1 file changed, 37 insertio
Specification says that: "This bit is set by HCD to initiate a software reset
of HC."
Signed-off-by: Hervé Poussineau
---
hw/usb/hcd-ohci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
index 24c62b4..d225ebb 100644
--- a/hw/usb/hcd-oh
Specification says that, when entering this state, "the contents of the
registers
(except Root Hub registers) are preserved by the HC. [...] The Root Hub is
being reset,
which causes the Root Hub's downstream ports to be reset and possibly powered
off."
Signed-off-by: Hervé Poussineau
---
hw/
Hi,
This small patchset adds different reset levels to OHCI USB controller.
The idea is from Benjamin Herrenschmidt.
Most significant change is that MacOS 9 doesn't try anymore to do some
DMA transfer to address 0, and boots a little bit further.
Hervé
Hervé Poussineau (3):
ohci: split reset m
Commit c8ee0a4 introduced new events containing PRIx64 constants without
including the % prefix in the preceding string. This results in a compile
error during build if --enable-trace-backends is passed to configure.
Signed-off-by: Mark Cave-Ayland
---
trace-events | 10 +-
1 file chan
On Wed, Dec 16, 2015 at 1:45 PM, Alistair Francis
wrote:
> Connect the sst25wf080 SPI flash to the EP108 board.
>
> Signed-off-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
> ---
> V4:
> - Only add one SPI flash
> V3:
> - Don't reach into the SoC
> V2:
> - Use sst25wf080 instead of m2
On Wed, Dec 16, 2015 at 1:45 PM, Alistair Francis
wrote:
> Separate out the XilinxSPIPS struct into a separate header
> file.
>
> Signed-off-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
> ---
> V5:
> - Fix typos
> V4:
> - Don't split off R_MOD_ID and hardcode R_MAX
> V2:
> - Only spl
On Fri, Dec 18, 2015 at 9:55 AM, Paolo Bonzini wrote:
>
>
> On 18/12/2015 18:17, Alistair Francis wrote:
>> Does anyone have any ideas on how we can do this?
>>
>> AFAIK there is no way to currently do this, so we need to add
>> something. What is the preferred way to expose the buses?
>
> For now
On Fri, Dec 11, 2015 at 04:37:11PM +, Peter Maydell wrote:
> Add a reset function to the pxa2xx_mmci device; previously it had
> no handling for system reset at all.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Peter Crosthwaite
> ---
> hw/sd/pxa2xx_mmci.c | 37 ++
On Fri, Dec 11, 2015 at 04:37:10PM +, Peter Maydell wrote:
> Convert the pxa2xx_mmci device from manual save/load
> functions to a VMStateDescription structure.
>
> This is a migration compatibility break.
>
> Signed-off-by: Peter Maydell
> ---
> hw/sd/pxa2xx_mmci.c | 148
> +++
On Fri, Dec 11, 2015 at 04:37:09PM +, Peter Maydell wrote:
> Now the PXA2xx MMCI device is QOMified itself, we can
> update it to use the SDBus APIs to talk to the SD card.
>
> Signed-off-by: Peter Maydell
> ---
> hw/sd/pxa2xx_mmci.c | 80
> +++---
On Fri, Dec 11, 2015 at 04:37:08PM +, Peter Maydell wrote:
> Convert the pxa2xx_mmci device to be a sysbus device.
>
> In this commit we only change the device itself, and leave
> the interface to the SD card using the old non-SDBus APIs.
>
> Signed-off-by: Peter Maydell
> ---
> hw/sd/pxa2x
On Thu, Dec 17, 2015 at 04:18:19PM -0800, Alistair Francis wrote:
> On Fri, Dec 11, 2015 at 8:37 AM, Peter Maydell
> wrote:
> > Move the creation of the SD card device from the sdhci_sysbus
> > device itself into the boards that create these devices.
> > This allows us to remove the cannot_instan
On Fri, Dec 11, 2015 at 04:37:06PM +, Peter Maydell wrote:
> Update the SDHCI code to use the new SDBus APIs.
>
> This commit introduces the new command line options required
> to connect a disk to sdhci-pci:
>
> -device sdhci-pci -drive id=mydrive,[...] -device sd,drive=mydrive
>
> Signed-
On Fri, Dec 11, 2015 at 04:37:05PM +, Peter Maydell wrote:
> Add a QOM bus for SD cards to plug in to.
>
> Note that since sd_enable() is used only by one board and there
> only as part of a broken implementation, we do not provide it in
> the SDBus API (but instead add a warning comment about
On Fri, Dec 11, 2015 at 04:37:04PM +, Peter Maydell wrote:
> Convert the sd_reset() function into a proper Device reset method.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Peter Crosthwaite
> ---
> hw/sd/sd.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff -
On Fri, Dec 11, 2015 at 04:37:03PM +, Peter Maydell wrote:
> Turn the SD card into a QOM device.
> This conversion only changes the device itself; the various
> functions which are effectively methods on the device are not
> touched at this point.
>
> Signed-off-by: Peter Maydell
> ---
> hw/
On Fri, Dec 11, 2015 at 04:37:02PM +, Peter Maydell wrote:
> The following commits will remove support for the old sdhci-pci
> command line syntax using the x-drive property:
> -device sdhci-pci,x-drive=mydrive -drive id=mydrive,[...]
> and replace it with an explicit sd device:
> -device sdh
On Mon, Dec 07, 2015 at 11:53:42PM +0100, Jean-Christophe Dubois wrote:
> With this i.MX25 and i.MX31 to have close implementation.
>
"will have closer implementations".
Otherwise,
Reviewed-by: Peter Crosthwaite
Peter, do you want to just amend the grammar in the queue?
Regards,
Peter
> Mor
From: Guillaume Subiron
This patch factorizes some duplicate code into a new function,
sotranslate_out(). This function perform the address translation when a
packet is transmitted to the host network. If the packet is destinated
to the host, the loopback address is used, and if the packet is
des
From: Guillaume Subiron
This patch replaces foreign and local address/port couples in Socket
structure by 2 sockaddr_storage which can be casted in sockaddr_in.
Direct access to address and port is still possible thanks to some
\#define, so retrocompatibility of the existing code is assured.
The
From: Guillaume Subiron
This patch makes solookup() compatible with varying address
families, by using a new sockaddr_equal() function that compares
two sockaddr_storage.
This prepares for IPv6 support.
Signed-off-by: Guillaume Subiron
Signed-off-by: Samuel Thibault
Reviewed-by: Thomas Huth
From: Guillaume Subiron
A sa_family_t is now passed in argument to udp_attach instead of using a
hardcoded "AF_INET" to call qemu_socket().
This prepares for IPv6 support.
Signed-off-by: Guillaume Subiron
Signed-off-by: Samuel Thibault
Reviewed-by: Thomas Huth
---
slirp/ip_icmp.c | 2 +-
sl
From: Guillaume Subiron
In if_encap, a switch is added to prepare for the IPv6 case. Some code
is factorized.
This prepares for IPv6 support.
Signed-off-by: Guillaume Subiron
Signed-off-by: Samuel Thibault
Reviewed-by: Thomas Huth
---
slirp/slirp.c | 61 +
From: Guillaume Subiron
This patch simply adds a sa_family_t argument to remove the hardcoded
"AF_INET" in the call of qemu_socket().
This prepares for IPv6 support.
Signed-off-by: Guillaume Subiron
Signed-off-by: Samuel Thibault
Reviewed-by: Thomas Huth
---
slirp/slirp.h | 2 +-
slirp/
From: Guillaume Subiron
Basically, this patch replaces "arp" by "resolution" every time "arp"
means "mac resolution" and not specifically ARP.
This prepares for IPv6 support.
Signed-off-by: Guillaume Subiron
Signed-off-by: Samuel Thibault
Reviewed-by: Thomas Huth
---
slirp/mbuf.c | 2 +-
s
From: Guillaume Subiron
solookup() was only compatible with TCP. Having the socket list in
argument, it is now compatible with UDP too.
Some optimization code is factorized inside the function (the function
look at the last returned result before browsing the complete socket
list).
This prepare
From: Guillaume Subiron
Before this patch, if sosendto fails, udp_input is executed as if the
packet was sent, recording the packet for icmp errors, which does not
makes sense since the packet was not actually sent, errors would be
related to a previous packet.
This patch adds a goto bad to cut
Hello,
This is another respin of IPv6 in Qemu -net user mode.
The following patches first make some refactoring to make current code ready
for IPv6, and do not change the behavior. The actual IPv6 support will then be
submitted as a separate patch series.
Difference with version 6 is:
- Use err
On Thu, Dec 10, 2015 at 12:40:54AM +0100, Igor Mammedov wrote:
> Due to huge size, CCing only cover letter instead of individual patches.
>
> Series consist of 2 parts the 1st part prefixed 'acpi:' adds necessary
> AML API functions and the second part converts DSDT using existing and
> new AML AP
On Thu, Dec 10, 2015 at 12:41:48AM +0100, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov
> ---
> hw/i386/acpi-build.c | 26 +-
> hw/i386/acpi-dsdt.dsl | 40
> hw/i386/q35-acpi-dsdt.dsl | 36
On Thu, Dec 10, 2015 at 12:41:29AM +0100, Igor Mammedov wrote:
> before consolidating memhp code in memory_hotplug_acpi_table.c
> and for simplifying review, first factor out memhp code into
> new function build_memory_devices() in i386/acpi-build.c
>
> Signed-off-by: Igor Mammedov
>
> PS:
>
On Thu, Dec 10, 2015 at 12:41:39AM +0100, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov
> ---
> hw/i386/acpi-build.c | 53
> ++
> hw/i386/acpi-dsdt-hpet.dsl | 48 -
> hw/i386/acpi-dsdt.dsl | 2 -
On Sat, Dec 19, 2015 at 2:08 PM, Christopher Friedt
wrote:
> On Wed, Dec 2, 2015 at 7:18 PM, Michael Davidsaver
> wrote:
>> Expand the NVIC to fully support -M priorities and masking.
>
> Wow - this whole patch series is quite impressive. I was just about to
> start doing a MemManage implementati
On Thu, Dec 10, 2015 at 12:41:44AM +0100, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov
> ---
> hw/i386/acpi-build.c | 38 --
> hw/i386/acpi-dsdt-isa.dsl | 18 --
> 2 files changed, 32 insertions(+), 24 deletions(-)
>
> diff --git a/
On Thu, Dec 10, 2015 at 12:41:48AM +0100, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov
> ---
> hw/i386/acpi-build.c | 26 +-
> hw/i386/acpi-dsdt.dsl | 40
> hw/i386/q35-acpi-dsdt.dsl | 36
On Thu, Dec 10, 2015 at 05:17:07PM +0100, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov
> ---
> v2:
> - adapt build_prt() for using for PCI0._PRT(), reduces code duplication,
>Suggested-by: Marcel Apfelbaum
>
> pc: acpi: piix4: adapt build_prt() for using for PCI0._PRT()
>
> Signed-o
On Wed, Dec 2, 2015 at 7:18 PM, Michael Davidsaver
wrote:
> Expand the NVIC to fully support -M priorities and masking.
Wow - this whole patch series is quite impressive. I was just about to
start doing a MemManage implementation when I saw this and some
previous posts on the topic.
Michael, I'v
On Sat, 19 Dec 2015 12:16:58 +0300
Michael Tokarev wrote:
> 19.12.2015 11:15, Michael Tokarev wrote:
> >> commit ebac1202c95a4f1b76b6ef3f0f63926fa76e753e
> >> Author: Paolo Bonzini
> >> Date: Fri Nov 27 12:43:06 2015 +0100
> >> virtio-9p: use QEMU thread pool
> >
> > Program received sign
On Sat, Dec 19, 2015 at 12:03:15PM +, Gonglei (Arei) wrote:
> Maybe the root cause is not NMI but INTR, so yield() can open hardware
> interrupt,
> And then execute interrupt handler, but the interrupt handler make the SeaBIOS
> stack broken, so that the BSP can't execute the instruction and o
Hi Pavel,
On Sat, Dec 19, 2015 at 10:12:28AM +0100, Pavel Machek wrote:
> On Thu 2015-12-17 11:09:23, Gabriel L. Somlo wrote:
> > ping ?
> >
> > Also, for the corresponding patch set on the QEMU end of things,
> > ping on http://thread.gmane.org/gmane.comp.emulators.qemu/376321
>
> I guess missi
Hi Kevin,
> -Original Message-
> From: Kevin O'Connor [mailto:ke...@koconnor.net]
>
> On Fri, Dec 18, 2015 at 03:04:58AM +, Gonglei (Arei) wrote:
> > Hi Kevin & Paolo,
> >
> > Luckily, I reproduced this problem last night. And I got the below log when
> SeaBIOS is stuck.
> [...]
> >
Ping here as well: https://bugs.launchpad.net/qemu/+bug/1516408
Adrian
On 12/18/2015 04:08 PM, Laurent Vivier wrote:
> Ping ?
>
> Le 23/11/2015 11:38, Laurent Vivier a écrit :
>> To return from a signal, setup_frame() puts an instruction to
>> be executed in the stack. This sequence calls the sy
Copying qemu-block because this seems related to generalising block jobs
to background jobs.
zhanghailiang writes:
> If some errors happen during VM's COLO FT stage, it's important to notify the
> users
> of this event. Together with 'colo_lost_heartbeat', users can intervene in
> COLO's
> fai
zhanghailiang writes:
> We leave users to choose whatever heartbeat solution they want, if the
> heartbeat
> is lost, or other errors they detect, they can use experimental command
> 'x_colo_lost_heartbeat' to tell COLO to do failover, COLO will do operations
> accordingly.
>
> For example, if t
zhanghailiang writes:
> Add checkpoint-delay parameter for migrate-set-parameters, so that
> we can control the checkpoint frequency when COLO is in periodic mode.
>
> Cc: Luiz Capitulino
> Cc: Eric Blake
> Cc: Markus Armbruster
> Signed-off-by: zhanghailiang
> Signed-off-by: Li Zhijian
> Re
zhanghailiang writes:
> Guest will enter this state when paused to save/restore VM state
> under colo checkpoint.
>
> Cc: Eric Blake
> Cc: Markus Armbruster
> Signed-off-by: zhanghailiang
> Signed-off-by: Li Zhijian
> Signed-off-by: Gonglei
> Reviewed-by: Dr. David Alan Gilbert
> Reviewed-b
19.12.2015 11:15, Michael Tokarev wrote:
>> commit ebac1202c95a4f1b76b6ef3f0f63926fa76e753e
>> Author: Paolo Bonzini
>> Date: Fri Nov 27 12:43:06 2015 +0100
>> virtio-9p: use QEMU thread pool
>
> Program received signal SIGSEGV, Segmentation fault.
> thread_pool_submit_aio (pool=0x0, func=0
Hi!
On Thu 2015-12-17 11:09:23, Gabriel L. Somlo wrote:
> ping ?
>
> Also, for the corresponding patch set on the QEMU end of things,
> ping on http://thread.gmane.org/gmane.comp.emulators.qemu/376321
I guess missing information is why such access is a good
idea. Debugging?
Jumping in at v12 for a bit of QAPI review (and whatever else catched my
eye nearby), please pardon my ignorance of COLO in general, and previous
review of this series in particular.
zhanghailiang writes:
> We need communications protocol of user-defined to control the checkpoint
> process.
>
>
SORRY I'm not trying to have an attitude this just doesn't feel good
when someone doesn't take the time to reply back...
When using -usbdevice tablet, this is the problem with having two mouse
pointers, and the scrolling problem, scrolling a site in Firefox changes
the desktop to another virtual d
19.12.2015 11:05, Michael Tokarev wrote:
> commit ebac1202c95a4f1b76b6ef3f0f63926fa76e753e
> Author: Paolo Bonzini
> Date: Fri Nov 27 12:43:06 2015 +0100
> virtio-9p: use QEMU thread pool
Program received signal SIGSEGV, Segmentation fault.
thread_pool_submit_aio (pool=0x0, func=0x5580
As a Linux geek, developers need to take the time to respond to bug
reports. People like myself help you to improve your app.
This is one of the very few reports I've made in many years of Linux
where a developer(s) doesn't take the time to reply to a bug report to
let the end-user know what is go
When trying to mount a 9p filesystem in guest in 2.5 qemu,
qemu immediately segfaults.
qemu-system-x86_64 ...
-fsdev local,security_model=none,id=fsd0,path=/tmp
-device virtio-9p-pci,fsdev=fsd0,mount_tag=fsd0
mount -t 9p -o trans=virtio,version=9p2000.u fsd0 /mnt
(SIGSEGV)
The problem go
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