On Tue, Oct 13, 2015 at 01:29:48PM +0800, Xiao Guangrong wrote:
>
>
> On 10/12/2015 07:55 PM, Michael S. Tsirkin wrote:
> >On Sun, Oct 11, 2015 at 11:52:32AM +0800, Xiao Guangrong wrote:
> >>Changelog in v3:
> >>There is huge change in this version, thank Igor, Stefan, Paolo, Eduardo,
> >>Michael
On Mon, Oct 19, 2015 at 12:04:48PM +0800, Xiao Guangrong wrote:
>
>
> On 10/19/2015 01:16 AM, Michael S. Tsirkin wrote:
> >On Mon, Oct 19, 2015 at 08:54:13AM +0800, Xiao Guangrong wrote:
> >>Check if the input Arg3 is valid then store it into dsm_in if needed
> >>
> >>Signed-off-by: Xiao Guangron
On Sun, Oct 11, 2015 at 11:52:32AM +0800, Xiao Guangrong wrote:
> Changelog in v3:
> There is huge change in this version, thank Igor, Stefan, Paolo, Eduardo,
> Michael for their valuable comments, the patchset finally gets better shape.
Thanks!
This needs some changes in coding style, and more co
On Sun, Oct 11, 2015 at 11:52:58AM +0800, Xiao Guangrong wrote:
> Check if the input Arg3 is valid then store it into dsm_in if needed
>
> We only do the save on NVDIMM device since we are not going to support any
> function on root device
>
> Signed-off-by: Xiao Guangrong
> ---
> hw/mem/nvdimm
On Sun, Oct 11, 2015 at 11:52:54AM +0800, Xiao Guangrong wrote:
> We reserve the memory region 0xFF0 ~ 0xFFF0 for NVDIMM ACPI
> which is used as:
> - the first page is mapped as MMIO, ACPI write data to this page to
> transfer the control to QEMU
>
> - the second page is RAM-based which
Hi all,
While working through the QEMU code that saves and loads snapshots, I've
noticed some confusing behaviour when using named VM snapshots that may need to
be fixed somehow. This is what I've noticed:
* If I create two empty qcow2 filesystems: fs1.qcow2 and fs2.qcow2:
* e.g. qemu-ima
> On Oct 19, 2015, at 4:37 AM, Peter Maydell wrote:
>
> On 18 October 2015 at 20:46, Peter Maydell wrote:
>> On 16 October 2015 at 08:32, Aaron Elkins wrote:
>>> I built Qemu on Mac OS X 10.11 El Capitan with:
>>>
>>>./configure
>>>make
>>>make install
>>>
>>> Success
On 10/19/2015 02:05 AM, Michael S. Tsirkin wrote:
On Mon, Oct 19, 2015 at 08:54:14AM +0800, Xiao Guangrong wrote:
__DSM is defined in ACPI 6.0: 9.14.1 _DSM (Device Specific Method)
Function 0 is a query function. We do not support any function on root
device and only 3 functions are support f
On 10/19/2015 01:16 AM, Michael S. Tsirkin wrote:
On Mon, Oct 19, 2015 at 08:54:13AM +0800, Xiao Guangrong wrote:
Check if the input Arg3 is valid then store it into dsm_in if needed
Signed-off-by: Xiao Guangrong
---
hw/acpi/nvdimm.c | 19 +++
1 file changed, 19 insertions
Most of the control flow logic between send and recv (error checking
etc) is the same. Factor this out into a common send_recv() API.
This is then usable by clients, where the control logic for send
and receive differs only by a boolean. E.g.
if (send)
i2c_send(...):
else
i2c_recv(...);
be
On 10/19/2015 01:15 AM, Michael S. Tsirkin wrote:
On Mon, Oct 19, 2015 at 08:54:09AM +0800, Xiao Guangrong wrote:
+typedef struct nfit_spa nfit_spa;
There are still multiple coding style violations. Pls fix all code to
match coding style. I commented on this before.
Er, i thought what y
Hi everyone,
It's currently possible to configure QEMU and KVM such that (on a Power 7 or 8
host) users are unable to create as many VCPUs as they might reasonably expect.
I'll outline one fairly straight forward solution (below) and I would welcome
feedback: Does this seem a reasonable approach?
On 10/16/2015 06:23 AM, Eduardo Habkost wrote:
Now DE is supported by TCG so it can be enabled in CPUID bits.
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 2 +-
Reviewed-by: Richard Henderson
r~
On 10/16/2015 06:23 AM, Eduardo Habkost wrote:
Bits 4-11 and 16-31 on DR6 are documented as always 1, so ensure they
can't be cleared by software.
Signed-off-by: Eduardo Habkost
---
target-i386/bpt_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson
On 10/16/2015 06:23 AM, Eduardo Habkost wrote:
Bit 10 of DR7 is documented as always set to 1, so ensure that's
always the case.
Signed-off-by: Eduardo Habkost
---
target-i386/bpt_helper.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper
On 10/16/2015 04:08 AM, Sergey Fedorov wrote:
On 16.10.2015 04:14, Richard Henderson wrote:
On 10/16/2015 03:36 AM, Peter Maydell wrote:
On 14 October 2015 at 22:02, Richard Henderson wrote:
On 10/15/2015 06:34 AM, Peter Maydell wrote:
This is still the same cryptic comment we have in the
t
On 17 October 2015 at 17:59, Michael Roth wrote:
> Hi Peter,
>
> Please note that 'glib-compat: add 2.38/2.40/2.46 asserts' is also in
> Marc-André's recent ivshmem PULL. The 2 versions of the patches are identical,
> but let me know if you'd prefer a re-send/re-base later.
>
> The following chang
On 18 October 2015 at 20:46, Peter Maydell wrote:
> On 16 October 2015 at 08:32, Aaron Elkins wrote:
>> I built Qemu on Mac OS X 10.11 El Capitan with:
>>
>> ./configure
>> make
>> make install
>>
>> Successfully.
>>
>> And downloaded the official linux image, and ran it w
On 16 October 2015 at 08:32, Aaron Elkins wrote:
> I built Qemu on Mac OS X 10.11 El Capitan with:
>
> ./configure
> make
> make install
>
> Successfully.
>
> And downloaded the official linux image, and ran it with the following:
>
> qemu-system-x86_64 -drive
> fi
On Mon, Oct 12, 2015 at 11:07:47AM -0400, Christopher Covington wrote:
> Changes from v3 in response to Drew's suggestions:
>
> * Improved pmu_data / PMCR fields and usage
> * Straightened out awkward conditionals
> * Added 32-bit support
> * Styling enhancements
> * Deferred -icount testing to la
On Mon, Oct 12, 2015 at 11:07:50AM -0400, Christopher Covington wrote:
> Calculate the numbers of cycles per instruction (CPI) implied by ARM
> PMU cycle counter values. The code includes a strict checking facility
> intended for the -icount option in TCG mode but it is not yet enabled
> in the con
On Mon, Oct 12, 2015 at 11:07:49AM -0400, Christopher Covington wrote:
> Ensure that reads of the PMCCNTR_EL0 are monotonically increasing,
> even for the smallest delta of two subsequent reads.
>
> Signed-off-by: Christopher Covington
> ---
> arm/pmu.c | 54 +
On Mon, Oct 19, 2015 at 08:54:14AM +0800, Xiao Guangrong wrote:
> __DSM is defined in ACPI 6.0: 9.14.1 _DSM (Device Specific Method)
>
> Function 0 is a query function. We do not support any function on root
> device and only 3 functions are support for NVDIMM device,
> DSM_DEV_FUN_NAMESPACE_LABEL
Signed-off-by: Andrew Jones
---
vl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/vl.c b/vl.c
index 7c806a2428399..9a64b75ebbd24 100644
--- a/vl.c
+++ b/vl.c
@@ -4080,8 +4080,8 @@ int main(int argc, char **argv, char **envp)
machine_class->max_cpus = machine_clas
On Mon, Oct 12, 2015 at 11:07:48AM -0400, Christopher Covington wrote:
> Beginning with a simple sanity check of the control register, add
> a unit test for the ARM Performance Monitors Unit (PMU).
>
> Signed-off-by: Christopher Covington
> ---
> arm/pmu.c| 82
>
On Fri, Oct 16, 2015 at 6:41 AM, wrote:
> From: KONRAD Frederic
>
> This introduces dpcd module.
> It wires on a aux-bus and can be accessed by the driver to get lane-speed,
> etc.
>
> Signed-off-by: KONRAD Frederic
> Reviewed-by: Alistair Francis
> Tested-By: Hyun Kwon
Reviewed-by: Peter C
Changes from v1
. drop the RFC patch "arm_gic_common.h: add gicv2 aliases for defines" [Peter]
. add a patch to cleanup vl.c's max-cpu error message a little [Drew]
. cleanup mach-virt's new error message [Peter]
. make the error message exactly like vl's cleaned up message [Drew]
. add a comment t
We should always go through VirtBoardInfo when we need the memmap.
To avoid using a15memmap directly, in this case, we need to defer
the max-cpus check from class init time to instance init time. In
class init we now use MAX_CPUMASK_BITS for max_cpus initialization,
which is the maximum QEMU suppor
On Fri, Oct 16, 2015 at 6:41 AM, wrote:
> From: KONRAD Frederic
>
> This does a write to every slaves when the I2C bus get a write to address 0.
>
> Signed-off-by: KONRAD Frederic
> Reviewed-by: Alistair Francis
> Tested-By: Hyun Kwon
> ---
> hw/i2c/core.c | 130
> ++
Check if the input Arg3 is valid then store it into dsm_in if needed
Signed-off-by: Xiao Guangrong
---
hw/acpi/nvdimm.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index 7e99889..b211b8b 100644
--- a/hw/acpi/nvdimm.c
+++ b/hw/acpi/
On Mon, Oct 19, 2015 at 08:54:13AM +0800, Xiao Guangrong wrote:
> Check if the input Arg3 is valid then store it into dsm_in if needed
>
> Signed-off-by: Xiao Guangrong
> ---
> hw/acpi/nvdimm.c | 19 +++
> 1 file changed, 19 insertions(+)
>
> diff --git a/hw/acpi/nvdimm.c b/hw/a
On Mon, Oct 19, 2015 at 08:54:09AM +0800, Xiao Guangrong wrote:
> +typedef struct nfit_spa nfit_spa;
There are still multiple coding style violations. Pls fix all code to
match coding style. I commented on this before.
NFIT is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT)
Currently, we only support PMEM mode. Each device has 3 structures:
- SPA structure, defines the PMEM region info
- MEM DEV structure, it has the @handle which is used to associate specified
ACPI NVDIMM device we will i
Add NVDIMM maintainer
Signed-off-by: Xiao Guangrong
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9bde832..cf259f9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -868,6 +868,13 @@ M: Jiri Pirko
S: Maintained
F: hw/net/rocker/
+NVDI
On Fri, Oct 16, 2015 at 6:41 AM, wrote:
> From: KONRAD Frederic
>
> This introduces a new bus: aux-bus.
>
> It contains an address space for aux slaves devices and a bridge to an I2C bus
> for I2C through AUX transactions.
>
> Signed-off-by: KONRAD Frederic
> Tested-By: Hyun Kwon
> ---
> defa
It describes the basic concepts of NVDIMM ACPI and the interface
between QEMU and the ACPI BIOS
Signed-off-by: Xiao Guangrong
---
docs/specs/acpi_nvdimm.txt | 154 +
1 file changed, 154 insertions(+)
create mode 100644 docs/specs/acpi_nvdimm.txt
diff
Function 4 is used to get Namespace label size
Signed-off-by: Xiao Guangrong
---
hw/acpi/nvdimm.c | 97 ++--
1 file changed, 95 insertions(+), 2 deletions(-)
diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index 37fea1c..1274d95 100644
--- a/
Introduce "nvdimm" device which is based on dimm device type
128K memory region which is the minimum namespace label size
required by NVDIMM Namespace Spec locates at the end of
backend memory device is reserved for label data
We can use "-m 1G,maxmem=100G,slots=10 -object memory-backend-file,
id
NVDIMM devices is defined in ACPI 6.0 9.20 NVDIMM Devices
There is a root device under \_SB and specified NVDIMM devices are under the
root device. Each NVDIMM device has _ADR which returns its handle used to
associate MEMDEV structure in NFIT
We reserve handle 0 for root device. In this patch, w
QEMU keeps the state of memory of dimm device during live migration,
however, it is not enough for nvdimm device as its memory does not
contain its label data, so that we should protect the whole backend
memory instead
Signed-off-by: Xiao Guangrong
---
hw/mem/dimm.c | 14 --
1 file c
Curretly, the memory region of backed memory is directly mapped to
guest's address space, however, it is not true for nvdimm device
This patch let dimm device realize this fact and use
DIMMDeviceClass->get_memory_region method to get the mapped memory
region
Signed-off-by: Xiao Guangrong
---
hw
Introduce a parameter, named "reserve-label-data", if it is
false which indicates that QEMU does not reserve any region
on the backend memory to support label data. It is a
'label-less' NVDIMM device mode that linux will use whole
memory on the device as a single namesapce
This is useful for the u
Map the NVDIMM ACPI memory region to guest address space
Detailed DSM design please refer to docs/specs/acpi_nvdimm.txt
Signed-off-by: Xiao Guangrong
---
hw/acpi/nvdimm.c| 87 ++---
include/hw/mem/nvdimm.h | 8 +
2 files changed, 91 inser
We reserve the memory region 0xFF0 ~ 0xFFF0 for NVDIMM ACPI
which is used as:
- the first page is mapped as MMIO, ACPI write data to this page to
transfer the control to QEMU
- the second page is RAM-based which used to save the input info of
_DSM method and QEMU reuse it store output
nvdimm need check if the backend memory is large enough to contain label
data and init its memory region when the device is realized, so introduce
realize callback which is called after common dimm has been realize
Signed-off-by: Xiao Guangrong
---
hw/mem/dimm.c | 5 +
include/hw/mem
This patch is generated by this script:
find ./ -name "*.[ch]" -o -name "*.json" -o -name "trace-events" -type f \
| xargs sed -i "s/PC_DIMM/DIMM/g"
find ./ -name "*.[ch]" -o -name "*.json" -o -name "trace-events" -type f \
| xargs sed -i "s/PCDIMM/DIMM/g"
find ./ -name "*.[ch]" -o -name "*.json
A base device, dimm, is abstracted from pc-dimm, so that we can
build nvdimm device based on dimm in the later patch
Signed-off-by: Xiao Guangrong
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/mem/Makefile.objs | 3 ++-
hw/mem/dimm.c
pc_existing_dimms_capacity() can be static since it is not used out of
pc-dimm.c and drop the pc_ prefix to prepare the work which abstracts
dimm device type from pc-dimm
Signed-off-by: Xiao Guangrong
---
hw/mem/pc-dimm.c | 73
include/hw/
There are three places use the some logic to get the page size on
the file path or file fd
This patch introduces qemu_file_get_page_size() to unify the code
Signed-off-by: Xiao Guangrong
---
include/qemu/osdep.h | 1 +
target-ppc/kvm.c | 21 +++--
util/oslib-posix.c | 16
Function 6 is used to set Namespace Label Data
Signed-off-by: Xiao Guangrong
---
hw/acpi/nvdimm.c | 46 ++
1 file changed, 46 insertions(+)
diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index 1683a82..838a57e 100644
--- a/hw/acpi/nvdimm.c
+++ b/hw/
It's not used any more
Signed-off-by: Xiao Guangrong
---
include/hw/mem/pc-dimm.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/hw/mem/pc-dimm.h b/include/hw/mem/pc-dimm.h
index c1ee7b0..15590f1 100644
--- a/include/hw/mem/pc-dimm.h
+++ b/include/hw/mem/pc-dimm.h
@@ -20,8 +20,6 @@
Function 5 is used to get Namespace Label Data
Signed-off-by: Xiao Guangrong
---
hw/acpi/nvdimm.c | 45 +
1 file changed, 45 insertions(+)
diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index 1274d95..1683a82 100644
--- a/hw/acpi/nvdimm.c
+++ b/hw/a
Rename qmp_pc_dimm_device_list.c to qmp_dimm_device_list.c
Signed-off-by: Xiao Guangrong
---
stubs/Makefile.objs | 2 +-
stubs/{qmp_pc_dimm_device_list.c => qmp_dimm_device_list.c} | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename stubs/{qmp_pc_d
This patchset can be found at:
https://github.com/xiaogr/qemu.git nvdimm-v4
It is based on pci branch on Michael's tree and the top commit is:
commit e20cff85470be (piix: fix resource leak reported by Coverity).
Changelog in v4:
- changes from Michael's comments:
1) show the message, "Me
- hostmem-file.c is compiled only if CONFIG_LINUX is enabled so that is
unnecessary to do the same check in the source file
- the interface, HostMemoryBackendClass->alloc(), is not called many
times, do not need to check if the memory-region is initialized
Signed-off-by: Xiao Guangrong
---
Use the whole file size if @size is not specified which is useful
if we want to directly pass a file to guest
Signed-off-by: Xiao Guangrong
---
backends/hostmem-file.c | 48
1 file changed, 44 insertions(+), 4 deletions(-)
diff --git a/backends/h
__DSM is defined in ACPI 6.0: 9.14.1 _DSM (Device Specific Method)
Function 0 is a query function. We do not support any function on root
device and only 3 functions are support for NVDIMM device,
DSM_DEV_FUN_NAMESPACE_LABEL_SIZE, DSM_DEV_FUN_GET_NAMESPACE_LABEL_DATA and
DSM_DEV_FUN_SET_NAMESPACE_
It avoid explicit Mutex and will be used by NVDIMM ACPI
Signed-off-by: Xiao Guangrong
---
hw/acpi/aml-build.c | 26 --
include/hw/acpi/aml-build.h | 1 +
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
ind
Currently, file_ram_alloc() only works on directory - it creates a file
under @path and do mmap on it
This patch tries to allow it to work on file directly, if @path is a
directory it works as before, otherwise it treats @path as the target
file then directly allocate memory from it
Signed-off-by
Rename:
pc-dimm.c => dimm.c
pc-dimm.h => dimm.h
It prepares the work which abstracts dimm device type for both pc-dimm and
nvdimm
Signed-off-by: Xiao Guangrong
---
hw/Makefile.objs | 2 +-
hw/acpi/ich9.c | 2 +-
hw/acpi/memory_hotplug.c
Implement Concatenate term which is used by NVDIMM _DSM method
in later patch
Signed-off-by: Xiao Guangrong
---
hw/acpi/aml-build.c | 14 ++
include/hw/acpi/aml-build.h | 1 +
2 files changed, 15 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 9fe
Implement SizeOf term which is used by NVDIMM _DSM method in later patch
Reviewed-by: Igor Mammedov
Signed-off-by: Xiao Guangrong
---
hw/acpi/aml-build.c | 8
include/hw/acpi/aml-build.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-bui
Currently file_ram_alloc() is designed for hugetlbfs, however, the memory
of nvdimm can come from either raw pmem device eg, /dev/pmem, or the file
locates at DAX enabled filesystem
So this patch let it work on any kind of path
Signed-off-by: Xiao Guangrong
---
exec.c | 56 +
Implement CreateField term which is used by NVDIMM _DSM method in later patch
Signed-off-by: Xiao Guangrong
---
hw/acpi/aml-build.c | 13 +
include/hw/acpi/aml-build.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index a722
Implement DeRefOf term which is used by NVDIMM _DSM method in later patch
Reviewed-by: Igor Mammedov
Signed-off-by: Xiao Guangrong
---
hw/acpi/aml-build.c | 8
include/hw/acpi/aml-build.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-bu
Implement ObjectType which is used by NVDIMM _DSM method in
later patch
Signed-off-by: Xiao Guangrong
---
hw/acpi/aml-build.c | 8
include/hw/acpi/aml-build.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index efc06ab..9f792ab 1
On 16 October 2015 at 16:26, Paolo Bonzini wrote:
>
>
> On 16/10/2015 10:49, Paolo Bonzini wrote:
>> The following changes since commit 5451316ed07b758a187dedf21047bed8f843f7f1:
>>
>> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request'
>> into staging (2015-10-12 15:52:54 +0
On Fri, Oct 16, 2015 at 6:41 AM, wrote:
> From: KONRAD Frederic
>
> The dev field in i2cbus is not used.
> So just drop it.
>
> Signed-off-by: KONRAD Frederic
> Reviewed-by: Alistair Francis
> Tested-By: Hyun Kwon
Reviewed-by: Peter Crosthwaite
> ---
> hw/i2c/core.c | 1 -
> 1 file change
Ping!
Although a little featurish and RFCish, this does repair the boot of
two ARM machines so it is very much a bugfix and we should consider
for 2.5. Otherwise we go to release (again) with two broken machines.
Regards,
Peter
On Fri, Oct 9, 2015 at 8:13 PM, Peter Crosthwaite
wrote:
> Hi,
>
>
Am 18.10.2015 um 14:20 schrieb Michael S. Tsirkin:
> On Sun, Oct 18, 2015 at 02:18:31PM +0300, Marcel Apfelbaum wrote:
>> On 10/15/2015 06:12 AM, Zhu Guihua wrote:
>>> Update cpu_model in MachineState for i386, so that the field can be used
>>> for cpu hotplug, instead of using a static variable.
>
On Sun, 2015-10-18 at 14:02 +0300, Marcel Apfelbaum wrote:
> > +#define SRIOV_ID(dev) \
> > +(dev)->name, PCI_SLOT((dev)->devfn), PCI_FUNC((dev)->devfn)
>
> This is a little "hacky" but it is used only for tracing and inside a
> C file.
> I am OK with it.
For the sake of readability of the t
fixed in linux
** Changed in: qemu
Status: New => Invalid
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1505062
Title:
Regression: QEMU 2.4 on Linux 4.2 fails to init display with SMM
ena
On Sun, 2015-10-18 at 14:02 +0300, Marcel Apfelbaum wrote:
> On 10/14/2015 06:51 PM, Knut Omang wrote:
> > This patch provides the building blocks for creating an SR/IOV
> > PCIe Extended Capability header and register/unregister
> > SR/IOV Virtual Functions.
> >
> > Signed-off-by: Knut Omang
> >
On Sun, 2015-10-18 at 14:02 +0300, Marcel Apfelbaum wrote:
> On 10/14/2015 06:51 PM, Knut Omang wrote:
> > This patch set implements generic support for SR/IOV as an
> > extension to the
> > core PCIe functionality, similar to the way other capabilities such
> > as AER
> > is implemented.
> >
> >
On 16 October 2015 at 21:43, John Snow wrote:
>
>
> On 10/16/2015 01:48 PM, Peter Maydell wrote:
>> Avoid undefined behaviour from shifting left into the sign bit:
>>
>> hw/ide/ahci.c:551:36: runtime error: left shift of 255 by 24 places cannot
>> be represented in type 'int'
>>
>> (Unfortunately
On 15/10/15 09:54, Thomas Huth wrote:
> The tcx_initfn() function is already supplied with an
> Object *obj pointer, so there is no need to cast the
> state pointer back to an Object pointer all over the
> place. And while we're at it, also remove the superfluous
> "return;" statement in this func
Previously, if promiscuous unicast was enabled, a packet was received
straight away, even if it was a multicast or a broadcast packet. This
patch fixes that behavior, while making the filtering procedure a bit
more human-readable.
Signed-off-by: Leonid Bloch
Signed-off-by: Dmitry Fleytman
---
h
According to Intel's specs, these counters (as all the other Statistic
registers) stick at 0x when the maximum value is reached.
Previously, they would reset after the max. value.
Signed-off-by: Leonid Bloch
Signed-off-by: Dmitry Fleytman
---
hw/net/e1000.c | 16
1 file
This implements the following Statistic registers (various counters)
according to Intel's specs:
TSCTC GOTCL GOTCH GORCL GORCH MPRC BPRC RUCROC
BPTC MPTC PTC... PRC...
Signed-off-by: Leonid Bloch
Signed-off-by: Dmitry Fleytman
---
hw/net/e1000.c | 83 ++
These registers appear in Intel's specs, but were not implemented.
These registers are now implemented trivially, i.e. they are initiated
with zero values, and if they are RW, they can be written or read by the
driver, or read only if they are R (essentially retaining their zero
values). For these
Previously, the lower parts of these counters (TORL, TOTL) were
resetting after reaching their maximal values, and since the continuation
of counting in the higher parts (TORH, TOTH) was triggered by an
overflow event of the lower parts, the count was not correct.
Additionally, TORH and TOTH were
This series fixes several issues with incorrect packet/octet counting in
e1000's Statistic registers, fixes a bug in the packet address filtering
procedure, and implements many MAC registers that were absent before.
Additionally, some cosmetic changes are made.
Leonid Bloch (6):
e1000: Cosmetic
This fixes some alignment and cosmetic issues. The changes are made
in order that the following patches in this series will look like
integral parts of the code surrounding them, while conforming better
to the coding style. Although some changes in unrelated areas are
also made.
Signed-off-by: Leo
On Sun, Oct 18, 2015 at 02:02:58PM +0300, Marcel Apfelbaum wrote:
> On 10/14/2015 06:51 PM, Knut Omang wrote:
> >This patch provides the building blocks for creating an SR/IOV
> >PCIe Extended Capability header and register/unregister
> >SR/IOV Virtual Functions.
> >
> >Signed-off-by: Knut Omang
>
On Sun, Oct 18, 2015 at 02:18:31PM +0300, Marcel Apfelbaum wrote:
> On 10/15/2015 06:12 AM, Zhu Guihua wrote:
> >Update cpu_model in MachineState for i386, so that the field can be used
> >for cpu hotplug, instead of using a static variable.
> >
> >This patch is rebased on the latest master.
> >
>
On 10/15/2015 06:12 AM, Zhu Guihua wrote:
Update cpu_model in MachineState for i386, so that the field can be used
for cpu hotplug, instead of using a static variable.
This patch is rebased on the latest master.
Signed-off-by: Zhu Guihua
Reviewed-by: Eduardo Habkost
---
v3:
-use PCMachineSt
On 10/14/2015 06:51 PM, Knut Omang wrote:
- Fix comment typo in pcie_cap_slot_write_config
- Simplify code in pcie_cap_slot_hot_unplug_request_cb.
Signed-off-by: Knut Omang
---
hw/pci/pcie.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/pci/pcie.c b/hw/pci/pci
On 10/14/2015 06:51 PM, Knut Omang wrote:
This patch provides the building blocks for creating an SR/IOV
PCIe Extended Capability header and register/unregister
SR/IOV Virtual Functions.
Signed-off-by: Knut Omang
---
hw/pci/Makefile.objs| 2 +-
hw/pci/pci.c| 102 +++
On 10/14/2015 06:51 PM, Knut Omang wrote:
Add a small intro + minimal documentation for how to
implement SR/IOV support for an emulated device.
Signed-off-by: Knut Omang
---
docs/pcie_sriov.txt | 115
1 file changed, 115 insertions(+)
cr
On 10/14/2015 06:51 PM, Knut Omang wrote:
This patch set implements generic support for SR/IOV as an extension to the
core PCIe functionality, similar to the way other capabilities such as AER
is implemented.
There is no implementation of any device that provides
SR/IOV support included, but I h
On 16 October 2015 at 16:05, Kevin Wolf wrote:
> The following changes since commit c49d3411faae8ffaab8f7e5db47405a008411c10:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2015-10-12'
> into staging (2015-10-13 10:42:06 +0100)
>
> are available in the git repository at:
>
>
>
Regressed in commit f29783f72ea77dfbd7ea0c993d62d253d4c4e023.
I've just run into this in a similar circumstance: trying to reverse-
engineer a driver for a phone to which I can only connect via Bluetooth.
No problem, I can just have it pretend to be a USB device. Except that I
can't, because the d
On Thu, Oct 15, 2015 at 02:05:14PM +0300, Pavel Fedin wrote:
> On ARM architecture ITS (Interrupt Translation Service), additionally to
> normal MSI data, uses also side-band device IDs. This series prepares the
> infrastructure to handling them.
>
> This small series is actually an extraction fro
On Thu, Oct 15, 2015 at 02:05:16PM +0300, Pavel Fedin wrote:
> For GICv3 ITS implementation we are going to use requester IDs in KVM IRQ
> routing code. This patch introduces reusable convenient way to obtain this
> ID from the device pointer. The new function is now used in some places,
> where th
On Tue, Oct 13, 2015 at 02:19:41PM +0200, Thibaut Collet wrote:
> Hi,
>
> I have still a comment on this serie. During rebase operation with multiqueue
> a
> modification has been lost.
> This lost impact only guest without GUEST_ANNOUNCE capabilities: the backend
> is
> not notified to send a f
On Fri, Oct 16, 2015 at 01:07:28PM +0200, Christian Borntraeger wrote:
> Am 16.10.2015 um 12:44 schrieb Cornelia Huck:
> > On Fri, 16 Oct 2015 12:32:52 +0200
> > Christian Borntraeger wrote:
> >
> >> Am 16.10.2015 um 12:25 schrieb Cornelia Huck:
> >>> Devices that are compliant with virtio-1 do n
ACK
> On 15 Oct 2015, at 13:54 PM, Dana Rubin
> wrote:
>
> From: Shmulik Ladkani
>
> Guest OS may issue VMXNET3_CMD_GET_STATS even before device was
> activated (for example in linux, after insmod but prior net-dev open).
>
> Accessing shared descriptors prior device activation is illegal as
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