Re: [Qemu-devel] [PATCH v2] ossaudio: fix memory leak

writes: > From: Gonglei > > Variable "conf" going out of scope leaks the storage > it points to in line 856. > > Signed-off-by: Gonglei > --- > v2: > using an better way to avoid memory leak. (Markus) > --- > audio/ossaudio.c | 9 +++-- > 1 file changed, 3 insertions(+), 6 deletions(-) >

Re: [Qemu-devel] [PATCH] block.c: fix real cdrom detection

Programmingkid writes: > On Jun 23, 2015, at 2:06 PM, John Snow wrote: > >> >> >> On 06/23/2015 01:56 PM, Programmingkid wrote: >>> Fix real cdrom detection so that a real cdrom can actually be used. >>> >>> signed-off-by: John Arbuckle >> > >>> >>> This patc

[Qemu-devel] [PATCH] more check for replaced node

Signed-off-by: Wen Congyang --- block.c | 5 +++-- block/mirror.c| 3 ++- blockdev.c| 2 +- include/block/block.h | 3 ++- 4 files changed, 8 insertions(+), 5 deletions(-) diff --git a/block.c b/block.c index 7168575..70ee0f6 100644 --- a/block.c +++ b/block.c @

Re: [Qemu-devel] [PATCH v2] ossaudio: fix memory leak

On Mi, 2015-06-24 at 17:18 +0800, arei.gong...@huawei.com wrote: > Variable "conf" going out of scope leaks the storage > it points to in line 856. > Added to audio queue. thanks, Gerd

Re: [Qemu-devel] TCG baremetal tests repo

Peter Maydell writes: > On 24 June 2015 at 17:39, Alex Bennée wrote: >> >> Alexander Spyridakis writes: >>> You can find the latest tcg atomic test payload in the following repo: git clone https://git.virtualopensystems.com/dev/tcg_baremetal_tests.git >>> >>> You also need an arm baremeta

[Qemu-devel] [PATCH] refresh filename after the node is replaced

We can use block job mirror to repair broken quorum files. But the command 'info block' doesn't output correct filename after block job mirror finishes. Signed-off-by: Wen Congyang --- block/mirror.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/block/mirror.c b/block/mirror.c index 8aa

Re: [Qemu-devel] [PATCH] block/iscsi: add support for request timeouts

Am 23.06.2015 um 01:03 schrieb ronnie sahlberg: LGTM It is good to finally have timeouts that work in libiscsi, and a consumer that can use and benefit from it. Paolo, Kevin, Stefan, do you think this is sth for 2.4? Peter

Re: [Qemu-devel] [PATCH V2] Re-attach usb device to kernel while usb_host_open fails

On Mi, 2015-06-24 at 13:40 +0800, Lin Ma wrote: > Signed-off-by: Lin Ma > Reviewed-by: Gonglei Added to usb patch queue. thanks, Gerd

Re: [Qemu-devel] [RFC PATCH] target-arm/psci.c: wake up sleeping CPUs (MTTCG)

Alexander Spyridakis writes: > On 24 June 2015 at 17:34, Alex Bennée wrote: >> Testing with Alexander's bare metal syncronisation tests fails in MTTCG >> leaving one CPU spinning forever waiting for the second CPU to wake up. >> We simply need to poke the halt_cond once we have processed the PS

[Qemu-devel] [PATCH] rocker: fix memory leak

From: Gonglei Meanwhile, using g_new0 instead of g_malloc0, refer to commit 5839e53. Signed-off-by: Gonglei --- hw/net/rocker/rocker.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/net/rocker/rocker.c b/hw/net/rocker/rocker.c index 4d25842..7e06015 100644 --- a/hw/ne

Re: [Qemu-devel] [PATCH 0/2] Remove CP15 timer from the device tree if KVM is used without in-kernel irqchip

On Wed, Jun 24, 2015 at 4:58 AM, Pavel Fedin wrote: > Certain machines do not have working vGIC hardware. Linux kernel (at least > up to v4) has configuration options which would still allow to use KVM, > but GIC and timer have to be emulated in userspace. Unfortunately, ARM CPUs > do not have an

Re: [Qemu-devel] [PATCH 0/5] qapi flattening + some miscellaneous patches

On Di, 2015-06-23 at 15:32 +0200, Kővágó, Zoltán wrote: > I've cherry-picked the qapi related parts from my previous -audiodev > patch series, we can hopefully concentrate on one thing at a time. The > most important changes in this patch series are the flattening of the > Netdev structures. This

[Qemu-devel] [PATCH v5 2/6] spapr: Add LMB DR connectors

Enable memory hotplug for pseries 2.4 and add LMB DR connectors. With memory hotplug, enforce RAM size, NUMA node memory size and maxmem to be a multiple of SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity in which LMBs are represented and hot-added. LMB DR connectors will be used by th

Re: [Qemu-devel] [RFC PATCH v4 3/5] spapr: Support ibm, dynamic-reconfiguration-memory

On Wed, Jun 24, 2015 at 03:55:08PM +1000, David Gibson wrote: > On Wed, Jun 24, 2015 at 07:55:44AM +0530, Bharata B Rao wrote: > > On Tue, Jun 23, 2015 at 11:54:29AM +1000, David Gibson wrote: > > > On Fri, Jun 19, 2015 at 03:47:55PM +0530, Bharata B Rao wrote: > > > > Parse ibm,architecture.vec ta

[Qemu-devel] [PATCH v5 4/6] spapr: Make hash table size a factor of maxram_size

The hash table size is dependent on ram_size, but since with hotplug the memory can grow till maxram_size. Hence make hash table size dependent on maxram_size. This allows to hotplug huge amounts of memory to the guest. Signed-off-by: Bharata B Rao Reviewed-by: David Gibson --- hw/ppc/spapr.c

[Qemu-devel] [RFC PATCH v5 6/6] spapr: Don't allow memory hotplug to memory less nodes

Currently PowerPC kernel doesn't allow hot-adding memory to memory-less node, but instead will silently add the memory to the first node that has some memory. This causes two unexpected behaviours for the user. Memory gets hotplugged to a different node than what the user specified. Since pc-dimm

[Qemu-devel] [PATCH v5 3/6] spapr: Support ibm, dynamic-reconfiguration-memory

Parse ibm,architecture.vec table obtained from the guest and enable memory node configuration via ibm,dynamic-reconfiguration-memory if guest supports it. This is in preparation to support memory hotplug for sPAPR guests. This changes the way memory node configuration is done. Currently all memory

[Qemu-devel] [PATCH v5 5/6] spapr: Memory hotplug support

Make use of pc-dimm infrastructure to support memory hotplug for PowerPC. Signed-off-by: Bharata B Rao --- hw/ppc/spapr.c| 129 ++ hw/ppc/spapr_events.c | 8 ++-- 2 files changed, 134 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spa

[Qemu-devel] [PATCH v5 0/6] Memory hotplug for PowerPC sPAPR guests

Hi, This is v5 of memory hotplug support patchset for PowerPC sPAPR guests. This patchset applies on spapr-next branch of David Gibson's tree with the other prerequisite patchset applied. Pre-requistes patchset was posted at: https://lists.gnu.org/archive/html/qemu-devel/2015-06/msg05157.html Ch

[Qemu-devel] [PATCH v5 1/6] spapr: Initialize hotplug memory address space

Initialize a hotplug memory region under which all the hotplugged memory is accommodated. Also enable memory hotplug by setting CONFIG_MEM_HOTPLUG. Modelled on i386 memory hotplug. Signed-off-by: Bharata B Rao --- default-configs/ppc64-softmmu.mak | 1 + hw/ppc/spapr.c| 18

Re: [Qemu-devel] Implement Xfer:auxv:read in gdb stub

Hi Jan, Thanks for the review. I will resubmit the patch with suggested changes. Regards, Bhushan -Original Message- From: Jan Kiszka [mailto:jan.kis...@siemens.com] Sent: 25 June 2015 10:56 To: Bhushan Attarde; qemu-devel@nongnu.org Cc: Yongbok Kim; Jaydeep Patil Subject: Re: Implement

Re: [Qemu-devel] Implement Xfer:auxv:read in gdb stub

On 2015-06-24 08:34, Bhushan Attarde wrote: > This patch implements support for "Xfer:auxv:read" to provide auxiliary vector > information to clients which relies on it. > > For example: AT_ENTRY in auxiliary vector provides the entry point > information. > Client can use this information to comp

Re: [Qemu-devel] [PATCH 5/9] memory: let address_space_rw/ld*/st* run outside the BQL

On Wed, 06/24 18:25, Paolo Bonzini wrote: > From: Jan Kiszka > > The MMIO case is further broken up in two cases: if the caller does not > hold the BQL on invocation, the unlocked one takes or avoids BQL depending > on the locking strategy of the target memory region and its coalesced > MMIO hand

Re: [Qemu-devel] [PATCH 4/9] exec: pull qemu_flush_coalesced_mmio_buffer() into address_space_rw/ld*/st*

On Wed, 06/24 18:25, Paolo Bonzini wrote: > As memory_region_read/write_accessor will now be run also without BQL held, > we need to move coalesced MMIO flushing earlier in the dispatch process. > > Cc: Frederic Konrad > Message-Id: <1434646046-27150-5-git-send-email-pbonz...@redhat.com> > Signed

Re: [Qemu-devel] [PATCH] pci : Add pba_offset PCI quirk for Chelsio T5 devices

Hi Gabriel, Glad that you got to the bottom of this! :) Gabriel Laupre writes: > Fix pba_offset initialization value for Chelsio T5 devices. The > hardware doesn't return the correct pba_offset value, so add a > quirk to instead return a hardcoded value of 0x1000 when a Chelsio > T5 device is

Re: [Qemu-devel] [PATCH 3/9] memory: Add global-locking property to memory regions

On Wed, 06/24 18:25, Paolo Bonzini wrote: > From: Jan Kiszka > > This introduces the memory region property "global_locking". It is true > by default. By setting it to false, a device model can request BQL-free > dispatching of region accesses to its r/w handlers. The actual BQL > break-up will b

Re: [Qemu-devel] [PATCH 1/9] main-loop: use qemu_mutex_lock_iothread consistently

On Wed, 06/24 18:25, Paolo Bonzini wrote: > The next patch will require the BQL to be always taken with > qemu_mutex_lock_iothread(), while right now this isn't the case. > > Outside TCG mode this is not a problem. In TCG mode, we need to be > careful and avoid the "prod out of compiled code" ste

[Qemu-devel] [PATCH v2 2/6] block: Rename BLOCK_OP_TYPE_MIRROR to BLOCK_OP_TYPE_MIRROR_SOURCE

It's necessary to distinguish source and target before we can add blockdev-mirror, because we would want a concrete type of operation to check on target bs before starting. Signed-off-by: Fam Zheng Reviewed-by: Max Reitz --- blockdev.c | 2 +- hw/block/dataplane/virtio-blk.

[Qemu-devel] [PATCH v2 6/6] iotests: Add test cases for blockdev-mirror

Signed-off-by: Fam Zheng Reviewed-by: Max Reitz --- tests/qemu-iotests/041 | 99 -- tests/qemu-iotests/041.out | 4 +- 2 files changed, 80 insertions(+), 23 deletions(-) diff --git a/tests/qemu-iotests/041 b/tests/qemu-iotests/041 index 59a8f73..

[Qemu-devel] [PATCH v2 3/6] block: Extract blockdev part of qmp_drive_mirror

This is the part that will be reused by blockdev-mirror. Signed-off-by: Fam Zheng --- blockdev.c | 155 - 1 file changed, 92 insertions(+), 63 deletions(-) diff --git a/blockdev.c b/blockdev.c index b573e56..2a0c0e2 100644 --- a/blockd

[Qemu-devel] [PATCH v2 5/6] qmp: Add blockdev-mirror command

This will start a mirror job from a named device to another named device, its relation with drive-mirror is similar with blockdev-backup to drive-backup. In blockdev-mirror, the target node should be prepared by blockdev-add, which will be responsible for assigning a name to the new node, so 'node

[Qemu-devel] [PATCH v2 4/6] block: Add check on mirror target

Signed-off-by: Fam Zheng Reviewed-by: Max Reitz --- blockdev.c| 3 +++ include/block/block.h | 1 + 2 files changed, 4 insertions(+) diff --git a/blockdev.c b/blockdev.c index 2a0c0e2..de6383f 100644 --- a/blockdev.c +++ b/blockdev.c @@ -2929,6 +2929,9 @@ static void blockdev_mirror

[Qemu-devel] [PATCH v2 0/6] qmp: Add blockdev-mirror

v2: 01: Move bdrv_op_block_all down. [Max] 02, 04: Add Max's rev-by. 03: Check has_mode and fix "return;". [Max] 05: Check target->blk. Drop superfluous whitespace. [Max] 06: Drop superfluous whitespace hunk and add Max's rev-by. [Max] This is the counterpart of blockdev-ba

[Qemu-devel] [PATCH v2 1/6] block: Add blocker on mirror target

In block/backup.c, we already check and add blocker on the target bs, which is necessary so that it won't be intervened with other operations. In block/mirror.c we should also protect the mirror target bs, because it could have a node-name (drive-mirror ... node-name=XXX), and on top of that it's

Re: [Qemu-devel] [PATCH 3/6] block: Extract blockdev part of qmp_drive_mirror

On Wed, 06/24 18:34, Max Reitz wrote: > On 09.06.2015 04:13, Fam Zheng wrote: > >This is the part that will be reused by blockdev-mirror. > > > >Signed-off-by: Fam Zheng > >--- > > blockdev.c | 158 > > +++-- > > 1 file changed, 92 insertio

Re: [Qemu-devel] [PATCH 1/6] block: Add blocker on mirror target

On Wed, 06/24 18:14, Max Reitz wrote: > On 09.06.2015 04:13, Fam Zheng wrote: > >In block/backup.c, we already check and add blocker on the target bs, > >which is necessary so that it won't be intervened with other operations. > > > >In block/mirror.c we should also protect the mirror target bs, be

[Qemu-devel] [RESEND PATCH v8 4/4] icc_bus: drop the unused files

ICC bus impl has been droped, so all icc related files are not useful any more; delete them. Signed-off-by: Zhu Guihua --- default-configs/i386-softmmu.mak | 1 - default-configs/x86_64-softmmu.mak | 1 - hw/cpu/Makefile.objs | 1 - hw/cpu/icc_bus.c | 118

[Qemu-devel] [RESEND PATCH v8 3/4] cpu/apic: drop icc bus/bridge

From: Chen Fan After CPU hotplug has been converted to BUS-less hot-plug infrastructure, the only function ICC bus performs is to propagate reset to LAPICs. However LAPIC could be reset by registering its reset handler after all device are initialized. Do so and drop ~200LOC of not needed anymore

[Qemu-devel] [RESEND PATCH v8 1/4] apic: map APIC's MMIO region at each CPU's address space

From: Chen Fan Replace mapping APIC at global system address space with mapping it at per-CPU address spaces. Signed-off-by: Chen Fan Signed-off-by: Zhu Guihua --- exec.c| 5 + hw/i386/pc.c | 7 --- hw/intc/apic_common.c | 14 -- include/exec/mem

[Qemu-devel] [RESEND PATCH v8 0/4] remove icc bus/bridge

ICC Bus was used for providing a hotpluggable bus for APIC and CPU, but now we use HotplugHandler to make hotplug. So ICC Bus is unnecessary. This code has passed the new pc-cpu-test. And I have tested with kvm along with kernel_irqchip=on/off, it works fine. This patch series is based on the lat

[Qemu-devel] [RESEND PATCH v8 2/4] hw: add a wrapper for registering reset handler

Add a wrapper to specify reset order when registering reset handler, instead of non-obvious initiazation code ordering. Signed-off-by: Zhu Guihua --- include/hw/hw.h | 4 vl.c| 18 +- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/include/hw/hw.h

Re: [Qemu-devel] [PATCH qom v3 4/4] microblaze: boot: Use cpu_set_pc()

On Wed, Jun 24, 2015 at 11:29 AM, Andreas Färber wrote: > Am 24.06.2015 um 20:00 schrieb Andreas Färber: >> Am 24.06.2015 um 05:19 schrieb Peter Crosthwaite: >>> Use cpu_set_pc() for setting program counters when bootloading. This >>> removes an instance of system level code having to reach into t

[Qemu-devel] [Bug 1467240] Re: Regression - bridged networking broken for Mac OS X guest

Is there anything else you would like me to test? -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1467240 Title: Regression - bridged networking broken for Mac OS X guest Status in QEMU: New Bug

Re: [Qemu-devel] [PATCH] gdb command: qemu iohandlers

On Wed, 06/24 16:19, Stefan Hajnoczi wrote: > On Tue, Jun 23, 2015 at 03:43:53PM +0100, Dr. David Alan Gilbert (git) wrote: > > From: "Dr. David Alan Gilbert" > > > > Add a gdb command to print the current set of IOHandlers and > > if one of them is a thread yielding for data print the backtrace.

Re: [Qemu-devel] [Qemu-stable] [PATCH v7 0/8] block: Mirror discarded sectors

On Wed, 06/24 19:01, Paolo Bonzini wrote: > > > On 24/06/2015 11:08, Fam Zheng wrote: > >> Stefan, > >> > >> The only controversial patches are the qmp/drive-mirror ones (1-3), while > >> patches 4-8 are still useful on their own: they fix the mentioned crash and > >> improve iotests. > >> > >> S

Re: [Qemu-devel] [Qemu-block] [PATCH COLO-Block v6 07/16] Add new block driver interface to connect/disconnect the remote target

On 06/24/2015 10:07 PM, Dr. David Alan Gilbert wrote: > * Wen Congyang (ghost...@gmail.com) wrote: >> At 2015/6/19 18:49, Stefan Hajnoczi Wrote: >>> On Fri, Jun 19, 2015 at 08:54:56AM +0800, Wen Congyang wrote: On 06/19/2015 12:06 AM, Stefan Hajnoczi wrote: > On Thu, Jun 18, 2015 at 10:36:

Re: [Qemu-devel] [RFC PATCH] target-arm/psci.c: wake up sleeping CPUs (MTTCG)

On 24 June 2015 at 17:34, Alex Bennée wrote: > Testing with Alexander's bare metal syncronisation tests fails in MTTCG > leaving one CPU spinning forever waiting for the second CPU to wake up. > We simply need to poke the halt_cond once we have processed the PSCI > power on call. Thanks Alex. Wor

[Qemu-devel] [PATCH v4 06/15] target-mips: raise RI exceptions when FIR.PS = 0

64-bit paired-single (PS) floating point data type is optional in the pre-Release 6. It has to raise RI exception when PS type is not implemented. (FIR.PS = 0) (The PS data type is removed in the Release 6.) Loongson-2E and Loongson-2F don't have any implementation field in FCSR0(FIR) but do suppor

[Qemu-devel] [PATCH v4 07/15] target-mips: signal RI for removed instructions in microMIPS R6

Signal a Reserved Instruction exception for removed instruction encoding in microMIPS Release 6. Signed-off-by: Yongbok Kim Reviewed-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 68 +++ 1 files changed, 68 insertions(+),

[Qemu-devel] [PATCH v4 14/15] target-mips: microMIPS32 R6 POOL16{A, C} instructions

microMIPS32 Release 6 POOL16A/ POOL16C instructions Signed-off-by: Yongbok Kim Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 133 +- 1 files changed, 118 insertions(+), 15 deletions(-) diff --git a/target-mips/translate.c b/target-mips/t

[Qemu-devel] [PATCH v4 15/15] target-mips: add mips32r6-generic CPU definition

Define a new CPU definition supporting MIPS32 Release 6 ISA and microMIPS32 Release 6 ISA. Signed-off-by: Yongbok Kim Reviewed-by: Aurelien Jarno --- target-mips/translate_init.c | 37 + 1 files changed, 37 insertions(+), 0 deletions(-) diff --git a/target

[Qemu-devel] [PATCH v4 11/15] target-mips: microMIPS32 R6 POOL32F instructions

Add new microMIPS32 Release 6 POOL32F instructions Signed-off-by: Yongbok Kim Reviewed-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 231 --- 1 files changed, 199 insertions(+), 32 deletions(-) diff --git a/target-mips/tr

[Qemu-devel] [PATCH v4 09/15] target-mips: microMIPS32 R6 branches and jumps

Add new microMIPS32 Release 6 branch and jump instructions. Signed-off-by: Yongbok Kim Reviewed-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 242 +++ 1 files changed, 202 insertions(+), 40 deletions(-) diff --git a/targe

[Qemu-devel] [PATCH v4 12/15] target-mips: microMIPS32 R6 POOL32{I, C} instructions

Add new microMIPS32 Release 6 POOL32I/POOL32C type instructions Signed-off-by: Yongbok Kim Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 27 +-- 1 files changed, 21 insertions(+), 6 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.

[Qemu-devel] [PATCH v4 05/15] target-mips: rearrange gen_compute_compact_branch

The function will be also used for microMIPS Release 6. Signed-off-by: Yongbok Kim Reviewed-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 472 +++--- 1 files changed, 236 insertions(+), 236 deletions(-) diff --git a/target-mi

[Qemu-devel] [PATCH v4 10/15] target-mips: microMIPS32 R6 POOL32A{XF} instructions

Add new microMIPS32 Release 6 pool32a/pool32axf instructions. Signed-off-by: Yongbok Kim Reviewed-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 80 -- 1 files changed, 69 insertions(+), 11 deletions(-) diff --git a/targe

[Qemu-devel] [PATCH v4 13/15] target-mips: microMIPS32 R6 Major instructions

Add new microMIPS32 Release 6 Major opcode instructions Signed-off-by: Yongbok Kim Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 62 ++- 1 files changed, 45 insertions(+), 17 deletions(-) diff --git a/target-mips/translate.c b/target-mi

[Qemu-devel] [PATCH v4 04/15] target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAP

Refactor those instructions in order to reuse them for microMIPS32 Release 6. Rearrange gen_move_low32(). Signed-off-by: Yongbok Kim Reviewed-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 166 --- 1 files changed, 99 inser

[Qemu-devel] [PATCH v4 00/15] target-mips: add microMIPS32 R6 Instruction Set support

The patchset implements the latest microMIPS32 Release 6 Instruction Set. However LLX, LLXE, SCX and SCXE aren't included in the patchset. For more information, microMIPS R6 Instruction Set document is available: MIPS Architecture for Programmers Volume II-B: microMIPS32 Instruction Set Revision 6

[Qemu-devel] [PATCH v4 02/15] target-mips: add microMIPS TLBINV, TLBINVF

Add microMIPS TLBINV, TLBINVF Signed-off-by: Yongbok Kim Reviewed-by: Aurelien Jarno Reviewed-by: Leon Alrae --- target-mips/translate.c |8 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 97b74ba..963ff8b 1006

[Qemu-devel] [PATCH v4 01/15] target-mips: fix {RD, WR}PGPR in microMIPS

rt, rs were swapped Signed-off-by: Yongbok Kim Reviewed-by: Aurelien Jarno Reviewed-by: Leon Alrae --- target-mips/translate.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 1d128ee..97b74ba 100644 --- a/targe

[Qemu-devel] [PATCH v4 08/15] target-mips: add microMIPS32 R6 opcode enum

Add microMIPS32 Release 6 opcode enum. Remove RI checking for pre-R6 reserved opcode. Signed-off-by: Yongbok Kim Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 119 -- 1 files changed, 103 insertions(+), 16 deletions(-) diff --git a/targe

[Qemu-devel] [PATCH v4 03/15] target-mips: remove an unused argument

Remove an unused argument from decode_micromips32_opc() Signed-off-by: Yongbok Kim Reviewed-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/translate.c |5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c inde

Re: [Qemu-devel] [RFC] QDev explicit constructors & destructors

> On 24 Jun 2015, at 17:11, Liviu Ionescu wrote: > > ... it might very well be C++, with some wrappers ... unfortunately this is not technically feasible, for many reasons, one of them being the 'struct Object' member named 'class' :-( regards, Liviu

[Qemu-devel] [PATCH 2/2] block: qemu-iotests - add check for multiplication overflow in vpc

This checks that VPC is able to successfully fail (without segfault) on an image file with a max_table_entries that exceeds 0x4000. This table entry is within the valid range for VPC (although too large for this sample image). Signed-off-by: Jeff Cody --- tests/qemu-iotests/135

[Qemu-devel] [PATCH 1/2] block: vpc - prevent overflow if max_table_entries >= 0x40000000

When we allocate the pagetable based on max_table_entries, we multiply the max table entry value by 4 to accomodate a table of 32-bit integers. However, max_table_entries is a uint32_t, and the VPC driver accepts ranges for that entry over 0x4000. So during this allocation: s->pagetable = qem

[Qemu-devel] [PATCH 0/2] block: vpc - prevent overflow

This series fixes a bug found by Richard Jones. When we allocate the pagetable based on max_table_entries, we multiply the max table entry value by 4 to accomodate a table of 32-bit integers. However, max_table_entries is a uint32_t, and the VPC driver accepts ranges for that entry over 0x4000

[Qemu-devel] [Bug 1329956] Re: multi-core FreeBSD guest hangs after warm reboot

I am no longer able to reproduce this issue on a fully-updated server. My guess is that the issue was fixed in the kernel somewhere between 3.12 and 4.0, but for all I know it could be a Qemu (or even Seabios) change. Here are details of my test that failed and the one that succeeded. Breaks (VM h

Re: [Qemu-devel] [PATCH] m68k: remove useless parameter op_size from gen_lea_indexed()

On Wed, 24 Jun 2015 02:51:49 +0200 Laurent Vivier wrote: > Signed-off-by: Laurent Vivier > --- > target-m68k/translate.c | 7 +++ > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/target-m68k/translate.c b/target-m68k/translate.c > index d6c478f..bc83a6e 100644 > --- a/tar

Re: [Qemu-devel] [PATCH] m68k: is_mem is useless

On 24 June 2015 at 00:00, Laurent Vivier wrote: > Remove is_mem as it is never tested anymore since: > > commit bfa50bc2638d877cf2900712b7503be22e8811cb > Author: aliguori > Date: Tue Nov 18 20:26:41 2008 + > > Remove premature memop TB terminations (Jan Kiszka) > > Sign

Re: [Qemu-devel] [PATCH] m68k: is_mem is useless

On Wed, 24 Jun 2015 01:00:22 +0200 Laurent Vivier wrote: > Remove is_mem as it is never tested anymore since: > > commit bfa50bc2638d877cf2900712b7503be22e8811cb > Author: aliguori > Date: Tue Nov 18 20:26:41 2008 + > > Remove premature memop TB terminations (Jan Kisz

Re: [Qemu-devel] [PATCH qom v3 3/4] arm: boot: Use cpu_set_pc()

On 24 June 2015 at 19:22, Andreas Färber wrote: > Am 24.06.2015 um 05:19 schrieb Peter Crosthwaite: >> Use cpu_set_pc() across the board for setting program counters. This >> removes instances of system level code having to reach into the CPU >> env. >> >> Reviewed-by: Peter Maydell >> Reviewed-b

Re: [Qemu-devel] [RFC PATCH] target-arm/psci.c: wake up sleeping CPUs (MTTCG)

On 24 June 2015 at 18:18, Alex Bennée wrote: > > Paolo Bonzini writes: > >> On 24/06/2015 17:34, Alex Bennée wrote: >>> Testing with Alexander's bare metal syncronisation tests fails in MTTCG >>> leaving one CPU spinning forever waiting for the second CPU to wake up. >>> We simply need to poke th

Re: [Qemu-devel] [PATCH] m68k: remove useless file m68k-qreg.h

On Wed, 24 Jun 2015 02:07:24 +0200 Laurent Vivier wrote: > Unused since: > > commit e1f3808e03f73e7a7fa966afbed2455dd052202e > Author: pbrook > Date: Sat May 24 22:29:16 2008 + > > Convert m68k target to TCG. > > Signed-off-by: Laurent Vivier > --- > target-m68k/m6

Re: [Qemu-devel] [PATCH qom v3 1/4] cpu: Add wrapper to the set-pc() hook

On 24 June 2015 at 19:09, Andreas Färber wrote: > s/set-pc/set_pc/ > > Am 24.06.2015 um 05:19 schrieb Peter Crosthwaite: >> Add a wrapper around the CPUClass::set_pc() hook. >> >> Signed-off-by: Peter Crosthwaite >> --- >> changed since v2: >> drop "qom" from commit message subject. >> Add () to

Re: [Qemu-devel] [PATCH v2 2/4] gdbstub: Use cpu_set_pc helper

On 24 June 2015 at 18:16, Andreas Färber wrote: > Guys, is there any target that does not implement set_pc today? If so, > which? I'd rather implement it than carry around the iffery and > resulting complications. No, there are none, see my analysis in my review of patch 1 in this set. -- PMM

Re: [Qemu-devel] TCG baremetal tests repo

On 24 June 2015 at 17:39, Alex Bennée wrote: > > Alexander Spyridakis writes: >> You can find the latest tcg atomic test payload in the following repo: >>> git clone https://git.virtualopensystems.com/dev/tcg_baremetal_tests.git >> >> You also need an arm baremetal cross-compiler like arm-none-gn

Re: [Qemu-devel] [PATCH 5/9] memory: let address_space_rw/ld*/st* run outside the BQL

Paolo Bonzini writes: > On 24/06/2015 18:56, Alex Bennée wrote: >> This is where I get confused between the advantage of this over however >> same pid recursive locking. If you use recursive locking you don't need >> to add a bunch of state to remind you of when to release the lock. Then >> you'

Re: [Qemu-devel] [PATCH qom v3 0/4] qom-cpu: Wrap set_pc hook and use in bootloaders

Am 24.06.2015 um 05:19 schrieb Peter Crosthwaite: > Wrap the CPUClass::set_pc fn hook in a caller helper to reduce > verbosity of calls. Simplify the call from the gdbstub. > > Then use the call to abstract away the PC env fields from the ARM and > Microblaze bootloaders. > > This moves towards t

Re: [Qemu-devel] [RFC 5/9] block: add block job transactions

On 12.06.2015 12:09, Stefan Hajnoczi wrote: Sometimes block jobs must execute as a transaction group. Finishing jobs wait until all other jobs are ready to complete successfully. Failure or cancellation of one job cancels the other jobs in the group. Signed-off-by: Stefan Hajnoczi --- blockj

Re: [Qemu-devel] [PATCH qom v3 4/4] microblaze: boot: Use cpu_set_pc()

Am 24.06.2015 um 20:00 schrieb Andreas Färber: > Am 24.06.2015 um 05:19 schrieb Peter Crosthwaite: >> Use cpu_set_pc() for setting program counters when bootloading. This >> removes an instance of system level code having to reach into the CPU >> env. >> >> Reviewed-by: Andreas Färber >> Signed-of

Re: [Qemu-devel] [PATCH qom v3 3/4] arm: boot: Use cpu_set_pc()

On Wed, Jun 24, 2015 at 11:22 AM, Andreas Färber wrote: > Am 24.06.2015 um 05:19 schrieb Peter Crosthwaite: >> Use cpu_set_pc() across the board for setting program counters. This >> removes instances of system level code having to reach into the CPU >> env. >> >> Reviewed-by: Peter Maydell >> Re

Re: [Qemu-devel] [PATCH qom v3 3/4] arm: boot: Use cpu_set_pc()

Am 24.06.2015 um 05:19 schrieb Peter Crosthwaite: > Use cpu_set_pc() across the board for setting program counters. This > removes instances of system level code having to reach into the CPU > env. > > Reviewed-by: Peter Maydell > Reviewed-by: Andreas Färber > Signed-off-by: Peter Crosthwaite >

Re: [Qemu-devel] [RFC PATCH] target-arm/psci.c: wake up sleeping CPUs (MTTCG)

Paolo Bonzini writes: > On 24/06/2015 19:18, Alex Bennée wrote: >> @@ -196,6 +196,8 @@ void arm_handle_psci_call(ARMCPU *cpu) >> } >> target_cpu_class->set_pc(target_cpu_state, entry); >> >> +qemu_cond_signal(target_cpu_state->halt_cond); >>>

Re: [Qemu-devel] [PATCH qom v3 1/4] cpu: Add wrapper to the set-pc() hook

s/set-pc/set_pc/ Am 24.06.2015 um 05:19 schrieb Peter Crosthwaite: > Add a wrapper around the CPUClass::set_pc() hook. > > Signed-off-by: Peter Crosthwaite > --- > changed since v2: > drop "qom" from commit message subject. > Add () to functions in commit messages. > Drop error argument > --- >

[Qemu-devel] [PATCH v6 1/2] ich9: add TCO interface emulation

This interface provides some registers within a 32-byte range and can be acessed through PCI-to-LPC bridge interface (PMBASE + 0x60). It's commonly used as a watchdog timer to detect system lockups through SMIs that are generated -- if TCO_EN bit is set -- on every timeout. If NO_REBOOT bit is not

[Qemu-devel] [PATCH v6 2/2] tests: add testcase for TCO watchdog emulation

This patch adds a testcase that covers the following: 1) TCO default values 2) first and second TCO timeout 3) watch and validate ticks counter through TCO_RLD register 4) maximum supported TCO timeout (0x3ff) 5) watchdog actions (pause/reset/shutdown/none) upon second TCO timeout

[Qemu-devel] vhost-user: current status of multiqueue support

Hi, What is the status of vhost-user multiqueue support in Qemu? I am looking at 830d70db692e374b5f4407f96a1ceefdcc97 patch in master and observe the following: -8<- case VHOST_SET_VRING_KICK: case VHOST_SET

[Qemu-devel] vhost-user: current status of multiqueue support

Hi, What is the status of vhost-user multiqueue support in Qemu? I am looking at 830d70db692e374b5f4407f96a1ceefdcc97 patch in master and observe the following: -8<- case VHOST_SET_VRING_KICK: case VHOST_SET

Re: [Qemu-devel] [PATCH qom v3 4/4] microblaze: boot: Use cpu_set_pc()

Am 24.06.2015 um 05:19 schrieb Peter Crosthwaite: > Use cpu_set_pc() for setting program counters when bootloading. This > removes an instance of system level code having to reach into the CPU > env. > > Reviewed-by: Andreas Färber > Signed-off-by: Peter Crosthwaite > --- > changed since v2: > A

Re: [Qemu-devel] [PATCH v3 8/8] cpu-exec: Purge all uses of ENV_GET_CPU()

On Wed, Jun 24, 2015 at 10:32 AM, Andreas Färber wrote: > Am 24.06.2015 um 04:10 schrieb Peter Crosthwaite: >> On Thu, Jun 18, 2015 at 10:24 AM, Peter Crosthwaite >> wrote: >>> Remove un-needed usages of ENV_GET_CPU() by converting the APIs to use >>> CPUState pointers and retrieving the env_ptr

Re: [Qemu-devel] [RFC 4/9] block: keep bitmap if incremental backup job is cancelled

On 12.06.2015 12:09, Stefan Hajnoczi wrote: Reclaim the dirty bitmap if an incremental backup block job is cancelled. The ret variable may be 0 when the job is cancelled so it's not enough to check ret < 0. Signed-off-by: Stefan Hajnoczi --- block/backup.c | 2 +- 1 file changed, 1 insertio

Re: [Qemu-devel] [PATCH v3 8/8] cpu-exec: Purge all uses of ENV_GET_CPU()

Am 24.06.2015 um 04:10 schrieb Peter Crosthwaite: > On Thu, Jun 18, 2015 at 10:24 AM, Peter Crosthwaite > wrote: >> Remove un-needed usages of ENV_GET_CPU() by converting the APIs to use >> CPUState pointers and retrieving the env_ptr as minimally needed. >> >> Scripted conversion for target-* cha

Re: [Qemu-devel] [PATCH qom v4 4/7] translate-all: Change tb_flush() env argument to cpu

On Wed, Jun 24, 2015 at 10:23 AM, Andreas Färber wrote: > Am 24.06.2015 um 19:06 schrieb Peter Crosthwaite: >> On Wed, Jun 24, 2015 at 8:30 AM, Andreas Färber wrote: >>> Am 24.06.2015 um 04:31 schrieb Peter Crosthwaite: diff --git a/dtc b/dtc index 65cc4d2..bc895d6 16 --- a/dtc

Re: [Qemu-devel] [PATCH v2 2/4] gdbstub: Use cpu_set_pc helper

On Wed, Jun 24, 2015 at 10:16 AM, Andreas Färber wrote: > Am 24.06.2015 um 19:04 schrieb Peter Crosthwaite: >> On Wed, Jun 24, 2015 at 3:01 AM, Peter Maydell >> wrote: >>> On 24 June 2015 at 03:50, Peter Crosthwaite >>> wrote: On Mon, Jun 22, 2015 at 10:31 AM, Andreas Färber wrote: >

Re: [Qemu-devel] [PATCH 0/3] update CMOS for ISA-FDC with iobase=0x3f0

On 06/23/2015 12:58 PM, Laszlo Ersek wrote: > This is (again) for the other pc-q35-2.4 ISA-FDC problem reported by > Jan. Addressing comments from Markus. > > Jan, can you give it another try please? I realize this is getting old > pretty quick, so don't bother if you don't want to. > > Cc: Jan

Re: [Qemu-devel] [RFC PATCH] target-arm/psci.c: wake up sleeping CPUs (MTTCG)

On 24/06/2015 19:18, Alex Bennée wrote: >>> >> @@ -196,6 +196,8 @@ void arm_handle_psci_call(ARMCPU *cpu) >>> >> } >>> >> target_cpu_class->set_pc(target_cpu_state, entry); >>> >> >>> >> +qemu_cond_signal(target_cpu_state->halt_cond); >> > >> > That's called qemu_cpu_k

Re: [Qemu-devel] [PATCH qom v4 4/7] translate-all: Change tb_flush() env argument to cpu

Am 24.06.2015 um 19:06 schrieb Peter Crosthwaite: > On Wed, Jun 24, 2015 at 8:30 AM, Andreas Färber wrote: >> Am 24.06.2015 um 04:31 schrieb Peter Crosthwaite: >>> diff --git a/dtc b/dtc >>> index 65cc4d2..bc895d6 16 >>> --- a/dtc >>> +++ b/dtc >>> @@ -1 +1 @@ >>> -Subproject commit 65cc4d2748

Re: [Qemu-devel] [PATCH 5/9] memory: let address_space_rw/ld*/st* run outside the BQL

On 24/06/2015 18:56, Alex Bennée wrote: > This is where I get confused between the advantage of this over however > same pid recursive locking. If you use recursive locking you don't need > to add a bunch of state to remind you of when to release the lock. Then > you'd just need: > > static void

Re: [Qemu-devel] [RFC PATCH] target-arm/psci.c: wake up sleeping CPUs (MTTCG)

Paolo Bonzini writes: > On 24/06/2015 17:34, Alex Bennée wrote: >> Testing with Alexander's bare metal syncronisation tests fails in MTTCG >> leaving one CPU spinning forever waiting for the second CPU to wake up. >> We simply need to poke the halt_cond once we have processed the PSCI >> power o

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