Hello!
> The GIC-500 provides registers for managing interrupt sources, interrupt
> behavior, and interrupt
> routing to one or more cores. It supports:
> • Multiprocessor environments with up to 128 cores.
> • Up to 32 affinity-level 1 clusters.
> • Up to eight cores for each cluster.
> I gues
> On 22 May 2015, at 08:21, Stefan Weil wrote:
>
> ... If anybody knows a simple tool to get all non-standard DLL dependencies
> for a set of Windows executables,
"all dependencies" are hard to get, but I use "${cross-prefix}-objdump -x" to
get the direct dependencies.
also please note that
On 2015/5/21 19:30, Dr. David Alan Gilbert wrote:
* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote:
This is the 5th version of COLO, here is only COLO frame part, include: VM
checkpoint,
failover, proxy API, block replication API, not include block replication.
The block part has been sen
Based on patch by Nikolay Nikolaev:
Vhost-user will implement the multi queue support in a similar way
to what vhost already has - a separate thread for each queue.
To enable the multi queue functionality - a new command line parameter
"queues" is introduced for the vhost-user netdev.
Signed-off-b
On Thu, May 21, 2015 at 03:51:43PM +0200, Paolo Bonzini wrote:
> On the QEMU side, there is no support yet for persistent memory and the
> NFIT tables from ACPI 6.0. Once that (and ACPI support) is added, qboot
> will automatically start using it.
>
We are working on adding NFIT support into vir
On 05/21/2015 08:44 PM, Fam Zheng wrote:
> On Thu, 05/21 16:00, Wen Congyang wrote:
>> On 05/21/2015 02:42 PM, Fam Zheng wrote:
>>> It blocks device IO.
>>
>> Does tt only block virtio-blk/scsi? Not all block types?
>
> It's only necessary for dataplane enabled devices, which are virtio-blk and
>
Cscope and TAGS files work in source directory rather than the build
directory, also, don't ask users to run configure first, because they
may have an out of tree build.
Signed-off-by: Fam Zheng
---
Makefile | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/Mak
This generates ctags file
Signed-off-by: Fam Zheng
---
Makefile | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index d4515fa..f2efe71 100644
--- a/Makefile
+++ b/Makefile
@@ -6,7 +6,7 @@ BUILD_DIR=$(CURDIR)
# Before including a proper config-host.m
Fam Zheng (2):
Makefile: Fix "make cscope TAGS"
Makefile: Add "make ctags"
Makefile | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
--
2.4.1
Am 05.05.2014 um 19:29 schrieb Peter Maydell:
Ah, we're dynamically linking with glib too? In that case, yes, whatever
mechanism we're currently using to distribute the glib DLL we should use
for the libstdc++ too.
QEMU for Windows uses dynamic linking. Besides the DLL files which are
part of t
This is not a QEMU bug, but a problem of some installers from
http://qemu.weilnetz.de/.
http://qemu.weilnetz.de/w64/qemu-w64-setup-20150424.exe should work.
Get the missing dll from http://qemu.weilnetz.de/w64/dll/.
Reporting problems to the right address (here the owner of weilnetz.de) would
h
On Thu, 05/21 15:32, Fam Zheng wrote:
> On Thu, 05/21 15:06, Wen Congyang wrote:
> > On 05/21/2015 02:42 PM, Fam Zheng wrote:
> > > It blocks device IO.
> > >
> > > All bdrv_op_block_all/blk_op_block_all callers are taken care of:
> > >
> > > - virtio_blk_data_plane_create
> > > - virtio_scsi_hot
[adding qemu]
On 05/21/2015 07:49 AM, Francesco Romani wrote:
> (CCing Nir, from the oVirt/RHEV storage team)
>
> - Original Message -
>> From: "Eric Blake"
>> To: "Peter Krempa"
>> Cc: libvir-l...@redhat.com
>> Sent: Tuesday, May 19, 2015 2:42:16 PM
>> Subject: Re: [libvirt] RFC: expos
Signed-off-by: Fam Zheng
Reviewed-by: John Snow
Reviewed-by: Paolo Bonzini
---
tests/qemu-iotests/041| 66 ++-
tests/qemu-iotests/iotests.py | 28 ++
2 files changed, 43 insertions(+), 51 deletions(-)
diff --git a/tests/qemu-iotes
This checks that the discard on mirror source that effectively zeroes
data is also reflected by the data of target.
Signed-off-by: Fam Zheng
Reviewed-by: John Snow
---
tests/qemu-iotests/131 | 59 ++
tests/qemu-iotests/131.out | 5
tests/qem
Only poll the specific type of event we are interested in, to avoid
stealing events that should be consumed by someone else.
Suggested-by: John Snow
Signed-off-by: Fam Zheng
Reviewed-by: John Snow
---
tests/qemu-iotests/iotests.py | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
If guest discards a source cluster, mirroring with bdrv_aio_readv is overkill.
Some protocols do zero upon discard, where it's best to use
bdrv_aio_write_zeroes, otherwise, bdrv_aio_discard will be enough.
Signed-off-by: Fam Zheng
---
block/mirror.c | 19 +--
1 file changed, 17 i
If specified as "true", it allows discarding on target sectors where source is
not allocated.
Signed-off-by: Fam Zheng
---
block/mirror.c| 7 +--
blockdev.c| 5 +
hmp.c | 2 +-
include/block/block_int.h | 2 ++
qapi/block-core.json | 5
Using this function would always be wrong because a dirty bitmap must
have a specific owner that consumes the dirty bits and calls
bdrv_reset_dirty_bitmap().
Remove the unused function to avoid future misuse.
Reviewed-by: Eric Blake
Signed-off-by: Fam Zheng
Reviewed-by: John Snow
---
block.c
Unsetting dirty globally with discard is not very correct. The discard may zero
out sectors (depending on can_write_zeroes_with_unmap), we should replicate
this change to destinition side to make sure that the guest sees the same data.
Calling bdrv_reset_dirty also troubles mirror job because the
v4: Add Paolo's rev-by in 2,4.
Add "unmap" option to drive-mirror.
Introduce "above" to bdrv_get_block_status and use it in mirror.c
v3: Add John's rev-by in patches 3~6.
Rewrite patch 1: discard may not suffice, use write zeroes in that case.
v2: Fix typo and add Eric's rev-by in pat
Now this function follows the backing chain until seeing BDRV_BLOCK_ALLOCATED.
Base is not included, and it can be NULL just like bdrv_is_allocated_above().
Existing callers pass in bs->backing_hd to keep the old behavior.
Signed-off-by: Fam Zheng
---
block/io.c| 39
The function bdrv_clear_dirty_bitmap() is updated to use
faster hbitmap_reset_all() call.
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Acked-by: Paolo Bonzini
Reviewed-by: Eric Blake
Reviewed-by: John Snow
---
block.c| 2 +-
include/qemu/h
On 05/22/2015 07:40 AM, Chris Metcalf wrote:
> Congratulations!
>
Again, really thank all of you very much!! :-)
>> On May 21, 2015, at 4:58 PM, Chen Gang wrote:
>>
>>
>> After fix additional 3 bugs (one for mnz, one for mz, one for v1cmpeqi),
>> at present, tilegx linux user can print "Hello
The tests for device type "ide_cd" should only be tested for the pc
platform.
The default device id of hard disk on the s390 platform differs to that
of the x86 platform. A new variable device_id is defined and "virtio0"
set for the s390 platform. A x86 platform specific output file is also
needed.
v9.
1.Fix issue of line over 80 characters for test 049
2.Add Reviewed-by statements for test 051,130
v8.
1.Modify error message in qemu-option.c when image size is invalid
2.Remove Reviewed-by statements if any functional changes in a new patch version
for test 049,051,130
3.Change patch subject
when creating an image qemu-img enable us specifying the size of the
image using -o size=xx options. But when we specify an invalid size
such as a negtive size then different platform gives different result.
parse_option_size() function in util/qemu-option.c will be called to
parse the size, a cas
From: Xiao Guang Chen
There is no 'ide-cd' device defined on s390 platform, so
test_medium_not_found() test should be skipped.
Reviewed-by: Max Reitz
Reviewed-by: Michael Mueller
Signed-off-by: Xiao Guang Chen
---
tests/qemu-iotests/055 | 9 +
1 file changed, 9 insertions(+)
diff --
From: Xiao Guang Chen
This patch adds qemu machine type support to the io test suite.
Based on the qemu default machine type and alias of the default machine type
the reference output file can now vary from the default to a machine specific
output file if necessary. When using a machine specific
The default device id of hard disk on the s390 platform is "virtio0"
which differs to the "ide0-hd0" for the x86 platform. Setting id in
the drive definition, ie:"qemu -drive id=testdisk", will be the same
on all platforms.
Reviewed-by: Max Reitz
Signed-off-by: Bo Tu
---
tests/qemu-iotests/130
From: Xiao Guang Chen
There is no 'ide-cd' device defined on s390 platform, so
test_medium_not_found() test should be skipped.
Reviewed-by: Max Reitz
Reviewed-by: Michael Mueller
Signed-off-by: Xiao Guang Chen
---
tests/qemu-iotests/041 | 6 ++
1 file changed, 6 insertions(+)
diff --git
From: Xiao Guang Chen
This patch fixes an io test suite issue that was introduced with the
commit c88930a6866e74953e931ae749781e98e486e5c8 'qemu-char: Permit only
a single "stdio" character device'. The option supresses the creation of
default devices such as the floopy and cdrom. Output files fo
Congratulations!
> On May 21, 2015, at 4:58 PM, Chen Gang wrote:
>
>
> After fix additional 3 bugs (one for mnz, one for mz, one for v1cmpeqi),
> at present, tilegx linux user can print "Hello World"! :-)
>
> I shall reconstruct/prepare the code and send patch v11 for review
> within this mont
On 05/15/2015 11:13 AM, Igor Mammedov wrote:
+Field(HIGH, AnyAcc, NoLock, Preserve) {
+ SIG1, 32,
+ SIZE, 16,
+ CODE, 8,
+ SUCC, 8,
+ CODO, 8,
+ RESP, 32
+
Hello,
Same problem here with qemu-w64-setup-20150510.exe.
As suggested above I tried to install mingw 4.6.3 posix and set path like:
set PATH=C:\Program Files\mingw-builds\x64-4.6.3-posix-sjlj-rev2\;C:\Program
Files\mingw-builds\x64-4.6.3-posix-sjlj-rev2\bin;%PATH%
I do not have the libstdc++-6
Forgot to tell I am running Windows 7 x64, and trying to launch qemu-
system-arm.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1312561
Title:
libstdc++-6.dll is missing from your computer
Status
When executing a 64bit target chroot on 64bit host,
the ioctl() command can mismatch.
It seems the previous commit doesn't solve the problem in
my case:
9c6bf9c7 linux-user: Fix ioctl cmd type mismatch on 64-bit targets
For example, a ppc64 chroot on an x86_64 host:
bash-4.3# ls
Unsuppo
> Am 21.05.2015 um 23:32 schrieb Aurelien Jarno :
>
> When consecutive memory locations are on page boundary a page fault
> might occur when using the LOAD MULTIPLE instruction. In that case real
> hardware doesn't load any register.
>
> This is an important detail in case the base register is
On 05/21/2015 09:19 AM, Kevin Wolf wrote:
> The floppy controller spec describes three different controller phases,
> which are currently not explicitly modelled in our emulation. Instead,
> each phase is represented by a combination of flags in registers.
>
> This patch makes explicit in which
On 05/20/2015 04:20 AM, Markus Armbruster wrote:
> John Snow writes:
>
>> On 05/12/2015 04:06 PM, Eric Blake wrote:
>>> On 05/12/2015 01:53 PM, John Snow wrote:
Bitmaps can be in a handful of different states with potentially
more to come as we tool around with migration and persisten
On 05/21/2015 02:32 PM, Aurelien Jarno wrote:
> When consecutive memory locations are on page boundary a page fault
> might occur when using the LOAD MULTIPLE instruction. In that case real
> hardware doesn't load any register.
>
> This is an important detail in case the base register is in the li
On 05/21/2015 09:19 AM, Kevin Wolf wrote:
> Factor out a few common lines of code, reformat, improve comments.
>
> Signed-off-by: Kevin Wolf
> ---
> hw/block/fdc.c | 63
> --
> 1 file changed, 39 insertions(+), 24 deletions(-)
>
> diff
When consecutive memory locations are on page boundary a page fault
might occur when using the LOAD MULTIPLE instruction. In that case real
hardware doesn't load any register.
This is an important detail in case the base register is in the list
of registers to be loaded. If a page fault occurs thi
On 05/21/2015 09:19 AM, Kevin Wolf wrote:
> The RQM bit in MSR should be set whenever the guest is supposed to
> access the FIFO, and it should be cleared in all other cases. This is
> important so the guest can't continue writing/reading the FIFO beyond
> the length that it's suppossed to access
After fix additional 3 bugs (one for mnz, one for mz, one for v1cmpeqi),
at present, tilegx linux user can print "Hello World"! :-)
I shall reconstruct/prepare the code and send patch v11 for review
within this month.
Thanks.
On 5/19/15 10:47, Chen Gang wrote:
> Hello All:
>
> I also found ano
On 05/21/2015 01:08 PM, Peter Maydell wrote:
> On 21 May 2015 at 18:39, Richard Henderson wrote:
>> Having fixed the UL vs ULL fiasco in patch 17.
>
> ...you seem to have changed the implementation too?
> The previous pull used sextract64().
Yes. This is the same number of insns on x86_64, but
On 21 May 2015 at 18:39, Richard Henderson wrote:
> Having fixed the UL vs ULL fiasco in patch 17.
...you seem to have changed the implementation too?
The previous pull used sextract64().
-- PMM
On 05/21/2015 12:35 PM, Aurelien Jarno wrote:
> When the same temp is used twice or more as an input argument to a TCG
> instruction, the dead computation code doesn't recognize the second use
> as a dead temp. This is because the temp is marked as live in the same
> loop where dead inputs are chec
On 05/21/2015 03:56 AM, Daniel P. Berrange wrote:
> +QCryptoCipher *qcrypto_cipher_new(QCryptoCipherAlgorithm alg,
> + QCryptoCipherMode mode,
> + const uint8_t *key, size_t nkey,
> + Error **errp)
>
On 05/21/2015 03:56 AM, Daniel P. Berrange wrote:
> +static uint8_t *qcrypto_cipher_munge_des_rfb_key(const uint8_t *key,
> + size_t nkey)
> +{
> +uint8_t *ret = g_new0(uint8_t, nkey);
> +size_t i;
> +for (i = 0; i < nkey; i++) {
> +
On 05/21/2015 03:56 AM, Daniel P. Berrange wrote:
> #ifdef CONFIG_GNUTLS_GCRYPT
> #include "crypto/cipher-gcrypt.c"
> #else
> +#ifdef CONFIG_GNUTLS_NETTLE
> +#include "crypto/cipher-nettle.c"
> +#else
> #include "crypto/cipher-builtin.c"
> #endif
> +#endif
#elif, please.
r~
When the same temp is used twice or more as an input argument to a TCG
instruction, the dead computation code doesn't recognize the second use
as a dead temp. This is because the temp is marked as live in the same
loop where dead inputs are checked.
The fix is to split the loop in two parts. This
On 05/21/2015 08:20 AM, Ouyang Changchun wrote:
> From: Changchun Ouyang
>
It's better to post a v3 patch as a new top-level thread, rather than
in-reply-to an existing thread.
> Based on patch by Nikolay Nikolaev:
> Vhost-user will implement the multi queue support in a similar way
> to what v
> On 21 May 2015, at 21:35, Maciej W. Rozycki wrote:
>
> On Thu, 21 May 2015, Liviu Ionescu wrote:
>
>> p.s. and I think there are major differences between using -append to
>> pass arguments to the kernel and passing arguments to semihosting, this
>> being one of the reasons for suggesting a
On 20/05/15 16:10, Richard Henderson wrote:
> On 05/20/2015 02:59 AM, Michael S. Tsirkin wrote:
>> On Tue, May 19, 2015 at 01:29:51PM -0700, Richard Henderson wrote:
>>> And do not issue an error_report in that case.
>>>
>>> Signed-off-by: Richard Henderson
>>> ---
>>> hw/virtio/virtio-pci.c | 1
On 05/21/2015 02:49 PM, Cole Robinson wrote:
> On 05/21/2015 02:52 AM, Gerd Hoffmann wrote:
>> On Do, 2015-05-21 at 00:05 +0200, Kővágó Zoltán wrote:
>>
>>> Here are the drivers that could go in my opinion:
>>> esd: no longer maintained, last release in 2008, replaced by PulseAudio
>>> fmod: not su
On 05/21/2015 02:52 AM, Gerd Hoffmann wrote:
> On Do, 2015-05-21 at 00:05 +0200, Kővágó Zoltán wrote:
>
>> Here are the drivers that could go in my opinion:
>> esd: no longer maintained, last release in 2008, replaced by PulseAudio
>> fmod: not sure about this one, but apparently it's some no long
On 2015-05-20 12:16, Richard Henderson wrote:
> On 05/17/2015 08:05 PM, Rich Felker wrote:
> > At the very least qemu-sh4 should provide a correct value of AT_HWCAP
> > so we get working atomics with -cpu SH7785. And since the GUSA atomic
> > model can't work with app-level emulation, I really thin
On 2015-05-19 07:46, Richard Henderson wrote:
> On 05/19/2015 03:26 AM, Aurelien Jarno wrote:
> > @@ -1522,6 +1522,9 @@ static void tcg_liveness_analysis(TCGContext *s)
> > if (dead_temps[arg]) {
> > dead_args |= (1 << i);
> > }
> >
On Thu, 21 May 2015, Liviu Ionescu wrote:
> p.s. and I think there are major differences between using -append to
> pass arguments to the kernel and passing arguments to semihosting, this
> being one of the reasons for suggesting a new command.
Out of curiosity, why do you think there are diff
On 05/21/2015 07:21 PM, Paolo Bonzini wrote:
On 21/05/2015 17:48, Avi Kivity wrote:
Lovely!
Note you have memcpy.o instead of memcpy.c.
Doh, and it's not used anyway. Check the repository, and let me know if
OSv boots with it (it probably needs ACPI; Linux doesn't boot virtio
without ACPI).
On 05/13/2015 05:33 AM, Paolo Bonzini wrote:
>
>
> On 13/05/2015 00:18, John Snow wrote:
>> As discussed during the QEMU 2.3 development freeze.
>>
>> ==
>> For convenience, this branch is available at:
>> https://github.com/jnsnow/qemu.git branch glib-version-fix
>> https://github.com/jnsnow/q
at:
git://github.com/rth7680/qemu.git tags/pull-axp-20150521
for you to fetch changes up to 32ad48abd74a997220b841e4e913edeb267aa362:
target-alpha: Add vector implementation for CMPBGE (2015-05-21 10:34:18 -0700)
Rewrite fp
This form produces significantly smaller code on x86_64.
Signed-off-by: Richard Henderson
---
target-alpha/int_helper.c | 30 --
1 file changed, 12 insertions(+), 18 deletions(-)
diff --git a/target-alpha/int_helper.c b/target-alpha/int_helper.c
index 8e4537f..74f38c
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann
> ---
> target-tricore/helper.h | 2 ++
> target-tricore/op_helper.c | 49
>
> target-tricore/translate.c | 21 +
> target-tricore/
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> +static void gen_fret(DisasContext *ctx)
> +{
> +tcg_gen_andi_tl(cpu_PC, cpu_gpr_a[11], ~0x1);
> +tcg_gen_qemu_ld_tl(cpu_gpr_a[11], cpu_gpr_a[10], ctx->mem_idx, MO_LESL);
> +tcg_gen_addi_tl(cpu_gpr_a[10], cpu_gpr_a[10], 4);
> +tcg_
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> +static void gen_fcall_save_ctx(DisasContext *ctx)
> +{
> +tcg_gen_addi_tl(cpu_gpr_a[10], cpu_gpr_a[10], -4);
> +tcg_gen_qemu_st_tl(cpu_gpr_a[11], cpu_gpr_a[10], ctx->mem_idx, MO_LESL);
> +tcg_gen_movi_tl(cpu_gpr_a[11], ctx->next_pc);
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> This instruction was introduced by the new Aurix platform.
>
> Signed-off-by: Bastian Koppelmann
> ---
> target-tricore/helper.h | 2 ++
> target-tricore/op_helper.c | 11 +++
> target-tricore/translate.c | 5
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann
> ---
> target-tricore/translate.c | 10 ++
> target-tricore/tricore-opcodes.h | 1 +
> 2 files ch
Reviewed-by: Richard Henderson
r~
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> Those instruction were introduced in the new Aurix platform.
>
> Signed-off-by: Bastian Koppelmann
Likewise from cmpswap,
Reviewed-by: Richard Henderson
r~
On 21.05.15 14:34, Paolo Bonzini wrote:
>
>
> On 20/05/2015 21:21, Richard Henderson wrote:
>> On 05/19/2015 12:59 AM, Paolo Bonzini wrote:
>>> tcg-target.h does not use any QEMU-specific symbols, save for tci's usage
>>> of CPUArchState. Pull that up to tcg/tcg.h.
>>
>> Reviewed-by: Richard H
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> Those instruction were introduced in the new Aurix platform.
>
> Signed-off-by: Bastian Koppelmann
I can't really review this, because I can only find the v1.6 isa.
That said, the code for gen_cmpswap looks plausible, so...
Reviewed-by: Richar
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann
> ---
> target-tricore/translate.c | 11 +--
> 1 file changed, 9 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson
> +case OPC1_16_SRC_MOV_E:
> +if (tricore_feature(env, TRICORE
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> The aurix platform contains of several different cpu models and uses
> the 1.6.1 ISA. This patch changes the generic aurix model to the more
> specific tc27x cpu model and sets specific features.
>
> Signed-off-by: Bastian Koppelmann
> ---
> ta
On 05/13/2015 02:45 AM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann
> ---
> target-tricore/cpu.c | 8
> 1 file changed, 8 insertions(+)
Reviewed-by: Richard Henderson
r~
> On 21 May 2015, at 19:56, Peter Maydell wrote:
>
> ... That's because your code is adding quotes, which I've already
> said I think is incorrect. If you took out the addition of
> quotes the two would be the same.
it might be incorrect for some obscure/broken guest implementations, but my
se
On 2015-05-21 15:51, Paolo Bonzini wrote:
> Some of you may have heard about the "Clear Containers" initiative from
> Intel, which couple KVM with various kernel tricks to create extremely
> lightweight virtual machines. The experimental Clear Containers setup
> requires only 18-20 MB to launch a
On 05/21/2015 02:06 AM, Artyom Tarasenko wrote:
> Hi Richard,
>
> looking at target-sparc/cpu.h and target-sparc/ldst_helper.c I have an
> impression, that 2 mmu modes are not enough for sparc (32) machines:
> they have 4 types of accesses: the combination of user/privileged and
> data/code.
Data
On 21 May 2015 at 17:36, Liviu Ionescu wrote:
>
>> On 21 May 2015, at 18:54, Peter Maydell wrote:
>>
>> On 21 May 2015 at 16:47, Liviu Ionescu wrote:
>>>
On 21 May 2015, at 18:29, Peter Maydell wrote:
There's no way to not offer the choice. In your syntax
this would be
On Wed, May 20, 2015 at 07:29:28PM -0700, Mario Smarduch wrote:
> On 05/15/2015 10:04 AM, Andrew Jones wrote:
> > On Fri, May 15, 2015 at 08:02:59AM -0700, Christoffer Dall wrote:
> >> On Thu, May 14, 2015 at 03:32:13PM +0200, Andrew Jones wrote:
> >>> On Thu, May 14, 2015 at 12:55:49PM +0200, Chri
On 05/21/2015 09:57 AM, Denis V. Lunev wrote:
> On 21/05/15 16:51, Vladimir Sementsov-Ogievskiy wrote:
>> Hi all.
>>
>> Hmm. There is an interesting suggestion from Denis Lunev (in CC) about
>> how to drop meta bitmaps and make things easer.
>>
>> method:
>>
>> > start migration
>> disk and memor
> On 21 May 2015, at 18:54, Peter Maydell wrote:
>
> On 21 May 2015 at 16:47, Liviu Ionescu wrote:
>>
>>> On 21 May 2015, at 18:29, Peter Maydell wrote:
>>>
>>>
>>> There's no way to not offer the choice. In your syntax
>>> this would be
>>> --semihosting-cmdline "foo bar baz"
>>
>> not ex
On 21/05/2015 17:48, Avi Kivity wrote:
> Lovely!
>
> Note you have memcpy.o instead of memcpy.c.
Doh, and it's not used anyway. Check the repository, and let me know if
OSv boots with it (it probably needs ACPI; Linux doesn't boot virtio
without ACPI).
Paolo
On Thursday, May 21, 2015, Pavel Fedin wrote:
> Hello!
>
> > In order to support up to 128 cores with GIC-500 (GICv3 implementation)
> > affinity1 must be used. GIC-500 support up to 32 clusters with up to
> > 8 cores in a cluster. So for example, if one wishes to have 16 cores,
> > the options
On 05/21/2015 02:47 AM, Yongbok Kim wrote:
> On 20/05/2015 18:25, Richard Henderson wrote:
>
>>
>>> +int i; \
>>> +for (i = 0; i < DF_ELEMENTS(DF); i++) { \
>>> +wx.TYPE[i] = LD_INSN(env, addr
On 05/21/2015 02:47 AM, Yongbok Kim wrote:
> Fair enough. Actually I considered to pass the information but didn't
> bother as this way is so simple.
If you ever quit relying on a separate heck for atomics,
which you probably should, this would be incorrect.
r~
On 21 May 2015 at 16:47, Liviu Ionescu wrote:
>
>> On 21 May 2015, at 18:29, Peter Maydell wrote:
>>
>>
>> There's no way to not offer the choice. In your syntax
>> this would be
>> --semihosting-cmdline "foo bar baz"
>
> not exactly. in my implementation this would arrive in the guest
> code as
Hello!
> In order to support up to 128 cores with GIC-500 (GICv3 implementation)
> affinity1 must be used. GIC-500 support up to 32 clusters with up to
> 8 cores in a cluster. So for example, if one wishes to have 16 cores,
> the options are: 2 clusters of 8 cores each, 4 clusters with 4 cores ea
Hi Kirill,
On Thu, May 21, 2015 at 04:11:11PM +0300, Kirill Smelkov wrote:
> Sorry for maybe speaking up too late, but here is additional real
Not too late, in fact I don't think there's any change required for
this at this stage, but it'd be great if you could help me to review.
> Since arrays
On 05/21/2015 04:51 PM, Paolo Bonzini wrote:
Some of you may have heard about the "Clear Containers" initiative from
Intel, which couple KVM with various kernel tricks to create extremely
lightweight virtual machines. The experimental Clear Containers setup
requires only 18-20 MB to launch a vir
> On 21 May 2015, at 18:29, Peter Maydell wrote:
>
>
> There's no way to not offer the choice. In your syntax
> this would be
> --semihosting-cmdline "foo bar baz"
not exactly. in my implementation this would arrive in the guest code as
argc=1, argv[0]="foo bar baz", which will be understood
On 05/21/2015 04:38 AM, Peter Maydell wrote:
> 64-bit constants should always have the 'ULL' or 'LL' suffixes.
Oops, yes indeed.
r~
On 21 May 2015 at 16:24, Liviu Ionescu wrote:
>
>> On 21 May 2015, at 18:06, Peter Maydell wrote:
>>
>> ...
>> That's their choice... It is still an array of substrings,
>> but if the user only provides one string then we have an
>> array of length 1.
>
> this was my initial point, as long as you
ping?
On 05/13/2015 11:45 AM, Bastian Koppelmann wrote:
Hi,
the new Aurix platform introduces a new ISA version, so this patchset
adds a new feature bit and changes the generic Aurix cpu to a more specific
tc27x cpu model. While at this, it introduces a new cpu model tc1797 which
uses the v1.3.
> On 21 May 2015, at 18:06, Peter Maydell wrote:
>
> ...
> That's their choice... It is still an array of substrings,
> but if the user only provides one string then we have an
> array of length 1.
this was my initial point, as long as you offer the choice, you no longer have
consistent usage
On 21 May 2015 at 15:57, Liviu Ionescu wrote:
>
>> On 21 May 2015, at 17:33, Peter Maydell wrote:
>>
>> On 21 May 2015 at 15:28, Liviu Ionescu wrote:
>>> from what I understood, for MIPS the emulator must be called with a
>>> sequence of ,arg=xxx, while for ARM it needs to be called with a singl
> On 21 May 2015, at 17:33, Peter Maydell wrote:
>
> On 21 May 2015 at 15:28, Liviu Ionescu wrote:
>> from what I understood, for MIPS the emulator must be called with a
>> sequence of ,arg=xxx, while for ARM it needs to be called with a single
>> long string including the entire command line.
From: Changchun Ouyang
Based on patch by Nikolay Nikolaev:
Vhost-user will implement the multi queue support in a similar way
to what vhost already has - a separate thread for each queue.
To enable the multi queue funcionality - a new command line parameter
"queues" is introduced for the vhost-us
I'm using 62.72.104.10300. I started with the old virtio-win-0.1-100
ISO, but I couldn't figure out how to downgrade to the latest "stable"
release, so instead I upgraded to the 103 release to see if it fixed
anything. It does not.
--
You received this bug notification because you are a member
On 05/21/2015 07:52 AM, Olga Krishtal wrote:
> On 17/04/15 11:53, Chen Fan wrote:
>> Nowadays, qemu has supported physical NIC hotplug for high network
>> throughput. but it's in conflict with live migration feature, to keep
>> network connectivity, we could to create bond device interface which
>>
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