to add some detail,
Unfortunately Fred is away this week, so we won’t get this patch set to you ask
quickly as I’d have liked.
We have a ‘working’ implementation - where ‘working’ is limited to a couple of
SMP cores, booting and running Dhrystone. The performance improvement we get is
close to
Am 29.03.2015 um 23:52 schrieb Richard Henderson:
No decrease in boot time is good. We /know/ we're saving memory, after all.
Well, I would not mind a decrease in boot time, too.
The more it decreases, the better. :-)
To be honest: in my version I only used 1 bit bitfield entries for
boolean v
Nikunj A Dadhania writes:
> David Gibson writes:
>
>> On Mon, Mar 30, 2015 at 01:18:01PM +1100, Alexey Kardashevskiy wrote:
>>> On 03/27/2015 08:49 PM, Nikunj A Dadhania wrote:
>>> >Each hardware instance has a platform unique location code. The OF
>>> >device tree that describes a part of a ha
Am 29.03.2015 um 23:52 schrieb Richard Henderson:
On Mar 27, 2015 14:09, "Emilio G. Cota" wrote:
On Fri, Mar 27, 2015 at 09:55:03 +, Alex Bennée wrote:
Have you been able to measure any performance improvement with these new
structures? In theory, if aligned with cache lines, performance s
David Gibson writes:
> On Mon, Mar 30, 2015 at 01:18:01PM +1100, Alexey Kardashevskiy wrote:
>> On 03/27/2015 08:49 PM, Nikunj A Dadhania wrote:
>> >Each hardware instance has a platform unique location code. The OF
>> >device tree that describes a part of a hardware entity must include
>> >the
Alexey Kardashevskiy writes:
> On 03/27/2015 08:49 PM, Nikunj A Dadhania wrote:
>> Each hardware instance has a platform unique location code. The OF
>> device tree that describes a part of a hardware entity must include
>> the “ibm,loc-code” property with a value that represents the location
>>
On Fri, Mar 27, 2015 at 10:48:52AM +, Dr. David Alan Gilbert wrote:
> * David Gibson (da...@gibson.dropbear.id.au) wrote:
> > On Thu, Mar 26, 2015 at 04:33:28PM +, Dr. David Alan Gilbert wrote:
> > > (Only replying to some of the items in this mail - the others I'll get
> > > to another tim
On 03/27/2015 10:53 PM, Eric Blake wrote:
On 03/27/2015 03:20 AM, Zhu Guihua wrote:
When memory hot unplug fails, this patch adds support to send
QMP event to notify mgmt about this failure.
Signed-off-by: Zhu Guihua
---
docs/qmp/qmp-events.txt | 17 +
hw/acpi/memory_hotpl
On 03/30/2015 01:25 PM, David Gibson wrote:
On Mon, Mar 30, 2015 at 01:18:01PM +1100, Alexey Kardashevskiy wrote:
On 03/27/2015 08:49 PM, Nikunj A Dadhania wrote:
Each hardware instance has a platform unique location code. The OF
device tree that describes a part of a hardware entity must incl
Question:
When migrating from old qemu to one with this hot remove feature, I found
this feature would not work any more in new qemu.
The reason is that DSDT table will not re-generate in new qemu when
migration.
So the hot remove will not work in the new qemu even though qemu
has this feature
On Tue, Mar 10, 2015 at 10:56:22AM -0400, Luiz Capitulino wrote:
> On Tue, 10 Mar 2015 15:20:29 +0100
> "Michael S. Tsirkin" wrote:
>
> > On Fri, Mar 06, 2015 at 03:18:20PM +1100, David Gibson wrote:
> > > At present, ISA bus support is always included in the build for all
> > > targets. However
On Thu, Mar 26, 2015 at 04:35:01PM +1100, Gavin Shan wrote:
> The PCI device MSIx table is cleaned out in hardware after EEH PE
> reset. However, we still hold the stale MSIx entries in QEMU, which
> should be cleared accordingly. Otherwise, we will run into another
> (recursive) EEH error and the
On Thu, Mar 26, 2015 at 04:35:02PM +1100, Gavin Shan wrote:
> When rebooting the guest, some PEs might be in frozen state. The
> contained PCI devices won't work properly if their frozen states
> aren't cleared in time. One case running into this situation would
> be maximal EEH error times encount
On Mon, Mar 30, 2015 at 01:18:01PM +1100, Alexey Kardashevskiy wrote:
> On 03/27/2015 08:49 PM, Nikunj A Dadhania wrote:
> >Each hardware instance has a platform unique location code. The OF
> >device tree that describes a part of a hardware entity must include
> >the “ibm,loc-code” property with
On 03/27/2015 08:49 PM, Nikunj A Dadhania wrote:
Each hardware instance has a platform unique location code. The OF
device tree that describes a part of a hardware entity must include
the “ibm,loc-code” property with a value that represents the location
code for that hardware entity.
Introduce
On 2015/3/30 1:19, Andreas Färber wrote:
> Commit 8074264 (qom: Add description field in ObjectProperty struct)
> introduced property descriptions and copied them for alias properties.
>
> Instead of using the caller-supplied property name, use the returned
> property name for setting the descript
On Mon, Mar 23, 2015 at 9:05 PM, Peter Crosthwaite
wrote:
> Using standard ARM bootloader.
>
> Signed-off-by: Peter Crosthwaite
Reviewed-by: Alistair Francis
Thanks,
Alistair
> ---
> hw/arm/xlnx-ep108.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/hw/arm/xlnx-ep108.c b/h
On Mon, Mar 23, 2015 at 9:05 PM, Peter Crosthwaite
wrote:
> Zynq MPSoC supports external DDR RAM. Add a RAM at 0 to the model.
>
> Signed-off-by: Peter Crosthwaite
Reviewed-by: Alistair Francis
Thanks,
Alistair
> ---
> changed since v1:
> Add ram size clamps and warnings
>
> hw/arm/xlnx-ep1
On Mon, Mar 23, 2015 at 9:05 PM, Peter Crosthwaite
wrote:
> Connect the GPIO outputs from the individual CPUs for the timers to the
> GIC.
>
> Signed-off-by: Peter Crosthwaite
> ---
> hw/arm/xlnx-zynqmp.c | 16
> 1 file changed, 16 insertions(+)
>
> diff --git a/hw/arm/xlnx-zynq
On 2015/3/27 17:54, Ian Campbell wrote:
On Fri, 2015-03-27 at 09:29 +0800, Chen, Tiejun wrote:
On 2015/3/26 18:06, Ian Campbell wrote:
On Thu, 2015-03-26 at 08:53 +0800, Chen, Tiejun wrote:
Hrm, OK. I suppose we can live with autodetect and igd both meaning igd
and whoever adds a new type will
On Mon, Mar 23, 2015 at 9:05 PM, Peter Crosthwaite
wrote:
> Hi Peter and all,
>
> Xilinx's next gen SoC has been announced. This series adds a SoC and
> board.
>
> Series start with addition of ARM cortex A53 support (P1 and P2). The
> Soc skeleton is then added with GIC, EMACs and UARTs are added
On Mon, Mar 23, 2015 at 9:05 PM, Peter Crosthwaite
wrote:
> With quad Cortex-A53 CPUs.
>
> Signed-off-by: Peter Crosthwaite
> ---
> changed since v2:
> Added [*] to cpu child property name.
> changed since v1:
> Add &error_abort to CPU child adder call.
>
> default-configs/aarch64-softmmu.mak |
On Mon, Mar 23, 2015 at 9:05 PM, Peter Crosthwaite
wrote:
> Add a machine model for the Xilinx ZynqMP SoC EP108 board.
>
> Signed-off-by: Peter Crosthwaite
Looks good
Reviewed-by: Alistair Francis
Thanks,
Alistair
> ---
> Chaned since v1:
> Change board name to ep108
>
> hw/arm/Makefile.ob
The syslog output looks like its from the Host not the guest?
What does the libvirtd log say for the guest...typically at
/var/log/libvirt/qemu/XXX (XXX being the name of the guest).
There are 2 separate issues/related in this thread, first being USB
attachment to guests not working which is beli
On Mar 27, 2015 14:09, "Emilio G. Cota" wrote:
>
> On Fri, Mar 27, 2015 at 09:55:03 +, Alex Bennée wrote:
> > Have you been able to measure any performance improvement with these new
> > structures? In theory, if aligned with cache lines, performance should
> > improve but real numbers woul
Hey nickmaelao, your outputs show you've only changed the ownership of
the USB bus and not the USB device itself...I'd suspect if you looked at
'ls -la /dev/bus/usb/001/' then the actual USB device will still have
root ownership. Ergo if libvirtd is still creating the vm's with qemu
and a non-root
To be used for embedding the device.
Add gtk-doc private/public markers for parent fields.
Signed-off-by: Andreas Färber
---
hw/ide/internal.h | 155
hw/ide/isa.c | 13
include/hw/ide.h | 173 ++
Move drive_get() code to PReP machine.
Signed-off-by: Andreas Färber
---
hw/isa/pc87312.c | 32
hw/ppc/prep.c| 11 +++
include/hw/isa/pc87312.h | 6 ++
3 files changed, 29 insertions(+), 20 deletions(-)
diff --git a/hw/isa/pc8731
Signed-off-by: Andreas Färber
---
hw/isa/pc87312.c | 17 -
include/hw/isa/pc87312.h | 6 ++
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index d35eb0e..37e2df4 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
To be used for embedding the device.
Add gtk-doc private/public markers for parent field.
Signed-off-by: Andreas Färber
---
hw/block/fdc.c | 87 -
include/hw/block/fdc.h | 88 ++
2 files chan
To be used for embedding the device.
Add gtk-doc private/public markers for parent field.
Signed-off-by: Andreas Färber
---
hw/char/parallel.c | 30 +-
include/hw/char/parallel.h | 62 ++
2 files changed, 63 insertions(+),
Move serial_hds[] code into PReP machine.
Signed-off-by: Andreas Färber
---
hw/isa/pc87312.c | 33 -
hw/ppc/prep.c| 13 +
include/hw/isa/pc87312.h | 6 ++
3 files changed, 35 insertions(+), 17 deletions(-)
diff --git a/hw/isa/
Move the parallel_hds[] code to the PReP machine.
Signed-off-by: Andreas Färber
---
hw/isa/pc87312.c | 25 +++--
hw/ppc/prep.c| 9 +
include/hw/isa/pc87312.h | 5 ++---
3 files changed, 26 insertions(+), 13 deletions(-)
diff --git a/hw/isa/pc873
Hello Markus et al.,
This series attempts to fix the -device pc87312 issues you reported.
I can't add alias properties for devices that don't get created before realize.
Therefore this involves moving code for various ISA devices, to enable us
to initialize the objects early for alias properties
To be used for embedding the device.
Add gtk-doc private/public markers for parent field.
Signed-off-by: Andreas Färber
---
hw/char/serial-isa.c | 12
include/hw/char/serial.h | 14 ++
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/hw/char/serial-i
On 03/28/2015 05:46 PM, Reza Jelveh wrote:
Some operating systems such as FreeBSD and Mac OSX need the reset_register
section of the FADT filled to know which port to write to for a system reset.
What is the right way to set the reset_val and the reset addr in this case?
---
hw/i386/acpi-build
Commit 8074264 (qom: Add description field in ObjectProperty struct)
introduced property descriptions and copied them for alias properties.
Instead of using the caller-supplied property name, use the returned
property name for setting the description. This avoids an Error when
setting a property d
28.03.2015 10:46, Gonglei wrote:
[]
>> Can this go through -trivial?
>>
> It's ok, but I don't know if -trivial branch maintainer has a plan to send a
> pull request
> for rc2.
I do have plan to send a pull request, but this thing is ugly. The
original code is ugly, and your patch does not make
Am 29.03.2015 um 17:53 schrieb Stefan Weil:
Am 29.03.2015 um 15:47 schrieb Waldemar Brodkorb:
Hi Stefan,
Stefan Weil wrote,
You can debug the kernel panic by attaching a cross debugger to the
running kernel.
If you have a kernel image with debug symbols, this is very
comfortable.
How would I
What happens when I define a member key multiple times in a struct or
union type?
If I do it directly, the parser rejects the duplicate key in
get_members(). Covered by tests/qapi-schema/duplicate-key.json.
What if I hide the duplicate in a base type?
If I stick this into qapi-schema-test.json:
Am 29.03.2015 um 15:47 schrieb Waldemar Brodkorb:
Hi Stefan,
Stefan Weil wrote,
You can debug the kernel panic by attaching a cross debugger to the
running kernel.
If you have a kernel image with debug symbols, this is very comfortable.
How would I do this?
Tried to start qemu with -s -S and t
Markus Armbruster writes:
[...]
> I had a second look. I think the generator accepting '**' in exactly
> the right places relies on:
>
> (1) check_name() accepts only proper names, not '**'.
>
> (2) All names get checked with check_name().
>
> (3) Except check_type() accepts special type name '*
Hi Stefan,
Stefan Weil wrote,
> Am 28.03.2015 um 17:07 schrieb Waldemar Brodkorb:
> >Fixes following problem, when trying to boot linux:
> >qemu: hardware error: mcf_intc_write: Bad write offset 28
> >
> >CPU #0:
> >D0 = 00ff A0 = 402ea5dc F0 = ( 0)
> >D1 = 0
On Friday, 27 March 2015, John Snow wrote:
> The following changes since commit
> b27e767e8c8d56cb7c9d0b78eadd89521bdf836c:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/net-pull-request'
> into staging (2015-03-27 12:12:27 +)
>
> are available in the git repository at:
>
> http
Public bug reported:
[qemu/target-tricore/op_helper.c:2576]: (style) Expression '(X &
0x40) == 0x1' is always false.
if ((env->PCXI & MASK_PCXI_UL) == 1) {
/* CTYP trap */
}
** Affects: qemu
Importance: Undecided
Status: New
--
You received this bug notificati
Eric Blake writes:
> On 03/27/2015 10:19 AM, Markus Armbruster wrote:
>> Eric Blake writes:
>>
>>> ...or an array of dictionaries. Although we have to cater to
>>> existing commands, returning a non-dictionary means the command
>>> is not extensible (no new name/value pairs can be added if mor
Eric Blake writes:
> On 03/27/2015 02:48 AM, Markus Armbruster wrote:
>> Eric Blake writes:
>>
>>> Previous commits demonstrated that the generator overlooked various
>>> bad naming situations:
>>> - types, commands, and events need a valid name
>>> - union and alternate branches cannot be mark
Eric Blake writes:
[...]
> +valid_characters = set(string.ascii_letters + string.digits + '.' + '-' +
> '_')
> +def check_name(expr_info, source, name, allow_optional = False):
> +membername = name
> +
> +if not isinstance(name, str):
> +raise QAPIExprError(expr_info,
> +
On 29/03/2015 06:07, David Gibson wrote:
> On Sat, Mar 28, 2015 at 04:30:06PM +0100, Paolo Bonzini wrote:
>>
>>
>> On 25/02/2015 17:51, Dr. David Alan Gilbert (git) wrote:
>>> +if (err != EAGAIN) {
>>
>> if (err != EAGAIN && err != EWOULDBLOCK)
>
> I assume that's for the benefit
Eric Blake writes:
> On 03/27/2015 01:52 AM, Markus Armbruster wrote:
>> One more...
>>
>> Eric Blake writes:
>>
>> [...]
>>> diff --git a/scripts/qapi.py b/scripts/qapi.py
>>> index 90eb3bc..5d0dc91 100644
>>> --- a/scripts/qapi.py
>>> +++ b/scripts/qapi.py
>> [...]
>>> @@ -560,12 +585,22 @@
Eric Blake writes:
> On 03/27/2015 06:38 AM, Markus Armbruster wrote:
>> Eric Blake writes:
>>
>>> On 03/26/2015 09:55 AM, Markus Armbruster wrote:
Eric Blake writes:
> Demonstrate that the qapi generator doesn't deal well with
> expressions that aren't up to par. Later patch
Hello, I've testing some ARM machines and CPU's through qemu-arm, for sure had
different results through different systems, but I'm still wondering, does qemu
simulates the behavior of ARM machines, or just emulate the code?
Thanks!
مآبقى إلا أسمانا تنقش على سطح القمر، هيبة المطران من هيبة البح
On Sat, Mar 28, 2015 at 04:30:06PM +0100, Paolo Bonzini wrote:
>
>
> On 25/02/2015 17:51, Dr. David Alan Gilbert (git) wrote:
> > +if (err != EAGAIN) {
>
> if (err != EAGAIN && err != EWOULDBLOCK)
I assume that's for the benefit of non-Linux hosts? On Linux EAGAIN
== EWOULDBLOCK.
On 28/03/2015 19:54, Michael S. Tsirkin wrote:
> This API is pretty easy to misuse, and return
> value is completely undocumented. In fact, if I see
> "is" I assume a boolean return type.
>
> As you are touching all users anyway, how about
> wrappers that answer specific questions:
> memory_regi
On 28/03/2015 19:58, Michael S. Tsirkin wrote:
>> > +void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error
>> > **errp)
>> > +{
>> > +assert(mr->terminates);
> Why? Does "terminates" guarantee that ram_addr
> is valid? In any case, I think this needs a comment.
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