Test behaviour of timers and interrupts related to timeouts.
Signed-off-by: Frediano Ziglio
---
tests/Makefile | 2 +-
tests/rtl8139-test.c | 180 +++
2 files changed, 181 insertions(+), 1 deletion(-)
This patch was derived from a test I d
On Wed, 7 Jan 2015 21:08:21 +0200
"Michael S. Tsirkin" wrote:
> On Wed, Jan 07, 2015 at 05:13:32PM +0100, Cornelia Huck wrote:
> > On Tue, 30 Dec 2014 14:25:37 +0200
> > "Michael S. Tsirkin" wrote:
> >
> > > On Thu, Dec 11, 2014 at 02:25:15PM +0100, Cornelia Huck wrote:
> > > > virtio-1 allow s
From: Gu Zheng
Signed-off-by: Gu Zheng
Signed-off-by: Bharata B Rao
(added spapr bits)
---
cpus.c | 44
hw/ppc/spapr.c | 14 -
include/qom/cpu.h| 11 ++
include/sysemu/kvm.h | 1 +
kvm-all.c
Support CPU hotplug via device-add command. Use the exising EPOW event
infrastructure to send CPU hotplug notification to the guest.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr.c | 205 +++-
hw/ppc/spapr_events.c | 8 +-
target-ppc/t
Advertise CPU DR-capability to the guest via device tree.
Signed-off-by: Bharata B Rao
Signed-off-by: Michael Roth
[spapr_drc_reset implementation]
---
hw/ppc/spapr.c | 28
1 file changed, 28 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
Parse ibm,architecture.vec table obtained from the guest and enable
memory node configuration via ibm,dynamic-reconfiguration-memory if guest
supports it. This is in preparation to support memory hotplug for
sPAPR guests.
This changes the way memory node configuration is done. Currently all
memory
Support hot removal of CPU for sPAPR guests.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr.c | 43 +++
1 file changed, 43 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 4347471..ec793b1 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@
Add support for ibm,lrdr-capacity since this is needed by the guest
kernel to know about the possible hot-pluggable CPUs and Memory.
Define minimum hotpluggable memory size as 256MB and start storing maximum
possible memory for the guest in sPAPREnvironment.
Signed-off-by: Bharata B Rao
---
hw/
PowerPC kernel adds or removes CPUs in core granularity and hence
onlines/offlines all the SMT threads of a core during hot plug/unplug.
Support this notion by starting all SMT threads of a core when a core
is hotplugged.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr.c | 25 +
Make use of pc-dimm infrastructure to support memory hotplug
for PowerPC.
Modelled on i386 memory hotplug.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr.c| 107 +-
hw/ppc/spapr_events.c | 3 ++
2 files changed, 108 insertions(+), 2 delet
This patchset enables CPU and memory hotplug support for PowerPC guests.
Changes in this patchset (v1):
- Based on top of Michael Roth's tree
(https://github.com/mdroth/qemu/commits/spapr-hotplug-core) which serves
as base for his PCI hotplug patches too.
- Switched to device_add/del semantic
Move some CPU initialization code from machine init function to
CPU realizefn so that it can be used from CPU hotplug path too.
With the inclusion of ppc.h in translate_init.c, explicit *irq_init()
function definitions aren't required, remove them.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr.
From: Michael Roth
Introduce an sPAPRMachineClass sub-class of MachineClass to
handle sPAPR-specific machine configuration properties.
The 'dr_phb[cpu,lmb]_enabled' field of that class can be set as
part of machine-specific init code, and is then propagated
to sPAPREnvironment to conditional ena
Initialize a hotplug memory region under which all the hotplugged
memory is accommodated. Also enable memory hotplug by setting
CONFIG_MEM_HOTPLUG.
Modelled on i386 memory hotplug.
Signed-off-by: Bharata B Rao
---
default-configs/ppc64-softmmu.mak | 1 +
hw/ppc/spapr.c| 26
Use max_cpus instead of smp_cpus when intializating xics system. Also
report max_cpus in ibm,interrupt-server-ranges device tree property of
interrupt controller node.
Signed-off-by: Bharata B Rao
---
hw/ppc/spapr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/s
Signed-off-by: Bharata B Rao
---
target-ppc/translate_init.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index cf9d8d3..cda706b 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8184,6 +8184,7 @@ POWERP
Hi All,
During building this so library, I found that there are many functions with
same name in stubs and other source file, for example,
There are two implement functions with same name slirp_pollfds_fill in slirp.c
and main-loop.c.
./stubs/slirp.c:void slirp_pollfds_fill(GArray *po
Does anyone know what the flags variable means in the DisplaySurface structure
located in console.h?
struct DisplaySurface {
pixman_format_code_t format;
pixman_image_t *image;
uint8_t flags;
};
Ping
Patches here:
http://patchwork.ozlabs.org/patch/424738/
Description:
In multi-core guest, set irq affinity will eventually lead to guest crash, this
is a
severe BUG, I do not know why this patch was ignored?
Wenshuang Ma
On Wed, 01/07 15:08, Stefan Hajnoczi wrote:
> On Tue, Dec 16, 2014 at 10:04:38AM +0800, Fam Zheng wrote:
> > On Thu, 12/04 11:43, Fam Zheng wrote:
> > > v2: Emulate nanoseconds precison of timeout with ppoll and timerfd.
> > > Their performance is on par with each other, but both much better th
On Thu, 01/08 00:07, Frediano Ziglio wrote:
> Test behaviour of timers and interrupts related to timeouts.
>
> Signed-off-by: Frediano Ziglio
> ---
> tests/Makefile | 2 +-
> tests/rtl8139-test.c | 164
> +++
> 2 files changed, 165 inserti
Hi David,
On Wed, Jan 7, 2015 at 1:06 AM, David Morrison wrote:
> Fixed the decoding of "system" instructions (starting with 0x2)
> in dec_sys() in translate.c. In particular, the l.trap instruction
> is now correctly decoded, which enables for singlestepping and
> breakpoints to be set in GDB.
Quoting Stefan Hajnoczi (2015-01-06 05:49:11)
> On Mon, Jan 05, 2015 at 05:12:10PM +0400, Andrey Korolyov wrote:
> > On Fri, Jan 2, 2015 at 4:04 PM, Stefan Hajnoczi wrote:
> > > On Thu, Dec 18, 2014 at 07:38:59PM +0400, Andrey Korolyov wrote:
> > >> 2.1-stable is currently crashing with the
> > >>
This patch adds a new bit to memory hotplug IO port indicating that
ej0 has been evaluated by guest OS. And call pc-dimm unplug cb to do
the real removal.
Signed-off-by: Hu Tao
Signed-off-by: Tang Chen
---
docs/specs/acpi_mem_hotplug.txt | 8 ++--
hw/acpi/memory_hotplug.c| 23
From: Hu Tao
This patch implements MEMORY_SLOT_EJECT_METHOD according to ACPI spec.
Signed-off-by: Hu Tao
Signed-off-by: Tang Chen
---
hw/i386/acpi-dsdt-mem-hotplug.dsl | 11 ++-
hw/i386/ssdt-mem.dsl | 5 +
include/hw/acpi/pc-hotplug.h | 2 ++
3 files changed,
Call memory unplug cb in piix4_device_unplug_cb().
---
hw/acpi/piix4.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index f809c3a..4ae4867 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -377,8 +377,16 @@ static void piix
Reset all memory status, and unparent the memory device.
---
hw/acpi/memory_hotplug.c | 16
include/hw/acpi/memory_hotplug.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/hw/acpi/memory_hotplug.c b/hw/acpi/memory_hotplug.c
index 3d8e398..2b0c8ca 100644
--- a/hw/
Call memory unplug cb in ich9_pm_device_unplug_cb().
---
hw/acpi/ich9.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 841f57d..0a8e757 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -317,8 +317,14 @@ void ich9_pm_device_un
Implement unplug cb for pc-dimm. It remove the corresponding
memory region, and unregister vmstat. At last, it calls memory
unplug cb to reset memory status and do unparenting.
---
hw/i386/pc.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/hw/i386/p
Implement memory unplug request cb for pc-dimm, and call it in
pc_machine_device_unplug_request_cb().
---
hw/i386/pc.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 0f3b1e0..f501f1f 100644
--- a/hw/i386/pc.c
+++
From: Hu Tao
Call memory unplug request cb in piix4_device_unplug_request_cb().
Signed-off-by: Hu Tao
Signed-off-by: Tang Chen
---
hw/acpi/piix4.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 4407388..f809c3a 100644
--- a/hw/
Add a new API named acpi_memory_hotplug_sci() to send memory hotplug SCI.
Doing this is because this procedure will be used by other functions in the
next coming patches.
Signed-off-by: Tang Chen
---
hw/acpi/memory_hotplug.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
dif
Memory hot unplug are both asynchronize procedures.
When the unplug operation happens, unplug request cb is called first.
And when ghest OS finished handling unplug, unplug cb will be called
to do the real removal of device.
This patch adds unplug request cb for memory device. Add a new bool
membe
Add a new API named acpi_memory_get_slot_status_descriptor() to obtain
a single memory slot status. Doing this is because this procedure will
be used by other functions in the next coming patches.
Signed-off-by: Tang Chen
---
hw/acpi/memory_hotplug.c | 27 +++
1 file chan
Call memory unplug request cb in ich9_pm_device_unplug_request_cb().
---
hw/acpi/ich9.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index c48d176..841f57d 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -304,8 +304,14 @@ void i
Replace string "slot" in acpi_memory_plug_cb() with MACRO PC_DIMM_SLOT_PROP.
Signed-off-by: Tang Chen
---
hw/acpi/memory_hotplug.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/memory_hotplug.c b/hw/acpi/memory_hotplug.c
index ed39241..c6580da 100644
--- a/hw/acpi
Memory hot unplug are both asynchronize procedures.
When the unplug operation happens, unplug request cb is called first.
And when ghest OS finished handling unplug, unplug cb will be called
to do the real removal of device.
This patch-set is based on QEmu 2.2
This series depends on the following
On 01/07/15 12:23, Alex Williamson wrote:
> We use an unsigned int when working with the PCI BAR size, which can
> obviously overflow if the BAR is 4GB or larger. This needs to change
> to a fixed length uint64_t. A similar issue is possible, though even
> more unlikely, when mapping the region a
When disabling MSI/X interrupts the disable functions will leave the
device in INTx mode (when available). This matches how hardware
operates, INTx is enabled unless MSI/X is enabled (DisINTx is handled
separately). Therefore when we really want to disable all interrupts,
such as when removing th
Test behaviour of timers and interrupts related to timeouts.
Signed-off-by: Frediano Ziglio
---
tests/Makefile | 2 +-
tests/rtl8139-test.c | 164 +++
2 files changed, 165 insertions(+), 1 deletion(-)
This patch was derived from a test I d
On 07.01.15 16:52, Claudio Fontana wrote:
> On 06.01.2015 17:03, Alexander Graf wrote:
>> Now that we have a working "generic" PCIe host bridge driver, we can plug
>> it into ARMs virt machine to always have PCIe available to normal ARM VMs.
>>
>> I've successfully managed to expose a Bochs VGA d
This patch adds the Netduino 2 Machine.
This is a Cortex-M3 based machine. Information can be found at:
http://www.netduino.com/netduino2/specs.htm
Signed-off-by: Alistair Francis
---
hw/arm/Makefile.objs | 1 +
hw/arm/netduino2.c | 54
2
This patch adds the stm32f2xx timers: TIM2, TIM3, TIM4 and TIM5
to QEMU.
Signed-off-by: Alistair Francis
---
V9:
- Convert tick_offset to now be updated on more events
- This is similar to what I did with the ARM PCCNT regiseter
V8:
- Fix tick_offset to allow now to wrap around
- Remove th
This patch adds the stm32f2xx System Configuration
Controller. This is used to configure what memory is mapped
at address 0 (although that is not supported) as well
as configure how the EXTI interrupts work (also not
supported at the moment).
This device is not required for basic examples, but mor
This patch adds the stm32f205 SoC. This will be used by the
Netduino 2 to create a machine.
Signed-off-by: Alistair Francis
---
V6:
- Correct the number of USART/UART devices
- Use macros to define how many devices are inited
- Update the memory regions name from netduino.* to
STM32F205.*
This patch moves the memory region init code from the
armv7m_init function to the stellaris_init function
Signed-off-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
---
V3:
- Rename the flash_size argument to mem_size
- Remove the sram_size and related code
- Thanks to Peter C
V2:
- C
This patch allows the board to specifiy the number of NVIC interrupt
lines when using armv7m_init.
Signed-off-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
---
hw/arm/armv7m.c | 7 ---
hw/arm/stellaris.c | 5 -
include/hw/arm/arm.h | 2 +-
3 files changed, 9 insertions(+),
This patch adds the stm32f2xx USART controller
(UART also uses the same controller).
Signed-off-by: Alistair Francis
---
V8:
- Clear IRQ on reset
- Lower IRQ on data read/status clear
- Set IRQ if enabled while data is avaliable
V6:
- Rename to STM32F2XX
- Fix up unimplemented printing
- Ad
This patch series adds the Netduino 2 Machine to QEMU
Information on the board is avalible at:
http://www.netduino.com/netduino2/specs.htm
The git tree can be found at:
https://github.com/alistair23/qemu/tree/netduino2.9
This patch series makes some changes to the armv7m_init function
that allow
On 07/01/2015 20:48, Michael S. Tsirkin wrote:
> This is v3 of the patchset.
> Changes since v2:
> - Address Paolo's comments: drop an unused function, fix up
> comment.
>
> Changes since v1:
> - Any RAM can now be resizeable - there's no requirement
> that it's device RAM an
On 7 January 2015 at 18:02, Stefan Weil wrote:
> Hello,
>
> this patch which is part of QEMU for more than a year now needs to be fixed
> for builds on Mac OS X:
> I just saw that the Mac's native linker ld does not support --verbose, but
> shows a warning.
Cosmetically ugly, but not a show stop
On Wed, Jan 7, 2015 at 2:55 AM, Paolo Bonzini wrote:
>
>
> On 07/01/2015 11:39, Peter Maydell wrote:
>>> > Within the virt team, we have always considered the authoritative source
>>> > to be qemu.git and Gerd to be the maintainer. Jiri is a Red Hatter but
>>> > not in the virt team, hence the co
Document that when using qemu_ram_resize for anything mapped into guest
address space, it's the job of the resize function to update guest
visible state.
Signed-off-by: Michael S. Tsirkin
---
exec.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/exec.c b/exec.c
index 71af138..58ac6d6
Use resizeable ram API so we can painlessly extend ROMs in the
future. Note: migration is not affected, as we are
not actually changing the used length for RAM, which
is the part that's migrated.
Use this in acpi: reserve x16 more RAM space.
Signed-off-by: Michael S. Tsirkin
---
hw/lm32/lm32_h
Add API to allocate resizeable RAM MR.
This looks just like regular RAM generally, but
has a special property that only a portion of it
(used_length) is actually used, and migrated.
This used_length size can change across reboots.
Follow up patches will change used_length for such blocks at migr
This patch allows us to distinguish between two
length values for each block:
max_length - length of memory block that was allocated
used_length - length of block used by QEMU/guest
Currently, we set used_length - max_length, unconditionally.
Follow-up patches allow used_length <= max_leng
If block used_length does not match, try to resize it.
Signed-off-by: Michael S. Tsirkin
---
arch_init.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 106f46e..cfedbf0 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -1086,11 +1086
Add API to allocate "resizeable" RAM.
This looks just like regular RAM generally, but
has a special property that only a portion of it
(used_length) is actually used, and migrated.
This used_length size can change across reboots.
Follow up patches will change used_length for such blocks at migrat
This is v3 of the patchset.
Changes since v2:
- Address Paolo's comments: drop an unused function, fix up
comment.
Changes since v1:
- Any RAM can now be resizeable - there's no requirement
that it's device RAM any longer.
- For simplicity, max_size RAM is always pre-alloca
Add API to change MR size.
Will be used internally for RAM resize.
Signed-off-by: Michael S. Tsirkin
---
include/exec/memory.h | 10 ++
memory.c | 16
2 files changed, 26 insertions(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index f64ab5e
Make cpu_physical_memory_set/clear_dirty_range
behave symmetrically.
To clear range for a given client type only, add
cpu_physical_memory_clear_dirty_range_type.
Signed-off-by: Michael S. Tsirkin
---
include/exec/ram_addr.h | 15 ---
exec.c | 2 +-
2 files changed,
On Wed, Jan 07, 2015 at 05:29:49PM +0100, Cornelia Huck wrote:
> On Sun, 28 Dec 2014 12:24:46 +0200
> "Michael S. Tsirkin" wrote:
>
> > On Thu, Dec 11, 2014 at 02:25:21PM +0100, Cornelia Huck wrote:
> > > Wire up virtio-blk to provide different feature bit sets depending
> > > on whether legacy o
On Wed, Jan 07, 2015 at 05:22:32PM +0100, Cornelia Huck wrote:
> On Sun, 28 Dec 2014 10:32:06 +0200
> "Michael S. Tsirkin" wrote:
>
> > On Thu, Dec 11, 2014 at 02:25:20PM +0100, Cornelia Huck wrote:
> > > Devices may support different sets of feature bits depending on which
> > > revision they're
On Wed, Jan 07, 2015 at 05:13:32PM +0100, Cornelia Huck wrote:
> On Tue, 30 Dec 2014 14:25:37 +0200
> "Michael S. Tsirkin" wrote:
>
> > On Thu, Dec 11, 2014 at 02:25:15PM +0100, Cornelia Huck wrote:
> > > virtio-1 allow setting of the FEATURES_OK status bit to fail if
> > > the negotiated feature
On 01/07/2015 10:02 AM, Stefan Weil wrote:
> Would it be sufficient to redirect that warning to /dev/null (as it was done
> in
> the previous code)?
Probably.
r~
On 01/06/2015 12:48 PM, Peter Wu wrote:
Previously the sector table parsing relied on the previous offset of
the DMG file. Now it uses the sector number from the BLKX header
(see http://newosxbook.com/DMG.html).
The implementation of dmg2img (from vu1tur) does not base the output
sector on the
On 01/06/2015 12:48 PM, Peter Wu wrote:
Disk images may contain large all-zeroes gaps (1.66k sectors or 812 MiB
is seen in the real world). These blocks (type 2) do not need to be
extracted into a temporary buffer, there is no need to allocate memory
for these blocks nor to check its length.
(
On 01/06/2015 12:48 PM, Peter Wu wrote:
This patch adds support for bzip2-compressed block entries as introduced
with OS X 10.4 (source: https://en.wikipedia.org/wiki/Apple_Disk_Image).
It was tested against a 5.2G "OS X Yosemite" installation image which
stores the BLXX block in the XML prope
On 01/06/2015 12:48 PM, Peter Wu wrote:
In preparation for adding bzip2 support, split the type check into a
separate function. Make all offsets relative to the begin of a chunk
such that it is easier to recognize the position without having to
add up all offsets. Some comments are added to des
On 01/06/2015 12:48 PM, Peter Wu wrote:
This patch addresses two issues:
- The data fork offset was not taken into account, resulting in failure
to read an InstallESD.dmg file (5164763151 bytes) which had a
non-zero DataForkOffset field.
- The offset of the previous block ("partiti
On 01/06/2015 12:48 PM, Peter Wu wrote:
Right now the virtual size is always reported as zero which makes it
impossible to convert between formats.
After this patch, the number of sectors will be read from the trailer
("koly" block).
To verify the behavior, the output of `dmg2img foo.dmg foo.
On 01/06/2015 12:48 PM, Peter Wu wrote:
The format is simple enough to avoid using a full-blown XML parser. It
assumes that all BLKX items begin with the "mish" magic word, therefore
it is not a problem if other values get matched which are not a BLKX
block.
The offsets are based on the descri
On 01/06/2015 12:48 PM, Peter Wu wrote:
Besides the offset, also read the resource length. This length is now
used in the extracted function to verify the end of the resource fork
against "count" from the resource fork.
Instead of relying on the value of offset to conclude whether the
resource
On 01/06/2015 12:48 PM, Peter Wu wrote:
Previously the chunk size was not checked, allowing for a large memory
allocation. This patch checks whether the chunks size is within the
resource fork length, and whether the resource fork is below the
trailer of the dmg file.
Signed-off-by: Peter Wu
Hello,
this patch which is part of QEMU for more than a year now needs to be
fixed for builds on Mac OS X:
I just saw that the Mac's native linker ld does not support --verbose,
but shows a warning.
Would it be sufficient to redirect that warning to /dev/null (as it was
done in the previous
On 07/01/2015 18:36, Eduardo Habkost wrote:
> The Memory Device size calculation logic is broken when the RAM size is
> a multiple of 16GB, making the size of the last entry be 0 instead of
> 16GB. Fix the logic to handle that case correctly.
>
> Signed-off-by: Eduardo Habkost
> ---
> hw/i386/
On 07/01/2015 18:36, Eduardo Habkost wrote:
> SVVP requires processor speed on Type 4 structures to not be unknown.
> This was fixed in SeaBIOS 0.5.0 (in 2009), but the bug was reintroduced
> in QEMU 2.1.
>
> Revert to old behavior and report CPU speed as 2000 MHz instead of
> unknown.
>
> Sign
Right now, the AVX512 registers are split in many different fields:
xmm_regs for the low 128 bits of the first 16 registers, ymmh_regs
for the next 128 bits of the same first 16 registers, zmmh_regs
for the next 256 bits of the same first 16 registers, and finally
hi16_zmm_regs for the full 512 bit
After the next patch, each vmstate field will extract parts of a larger
(32x512-bit) array, so we cannot check the vmstate field against the
type of the array.
While changing this, change the macros to accept the index of the first
element (which will not be 0 for Hi16_ZMM_REGS) instead of the num
After the next patch, we will move the high parts of AVX and AVX512 registers
in the same array as the SSE registers. This will make it impossible to
memcpy an array of 128-bit values in and out of xmm_regs in one swoop.
Use a for loop instead.
Signed-off-by: Paolo Bonzini
---
target-i386/kvm.c
Right now, AVX and AVX512 registers are stored part in the SSE registers,
part in separate fields that follow the XSAVE format.
This series instead uses a single 512-bit field for each of the
32 registers. It makes the marshalling a bit more complicated but
keeps the madness out of CPUX86State's
This was accessing an XMM register's low half without going through XMM_Q.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Paolo Bonzini
---
target-i386/translate.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index ebdc350..5a
On Jan 7, 2015, at 5:35 AM, Paolo Bonzini wrote:
>
>
> On 06/01/2015 22:33, G 3 wrote:
>>
>> 00:01.0 VGA compatible controller: Technical Corp. Device (rev
>> 02) (prog-if 00 [VGA controller])
>>Subsystem: Qumranet, Inc. Device 1100
>>Control: I/O+ Mem+ BusMaster- SpecCycl
The Memory Device size calculation logic is broken when the RAM size is
a multiple of 16GB, making the size of the last entry be 0 instead of
16GB. Fix the logic to handle that case correctly.
Signed-off-by: Eduardo Habkost
---
hw/i386/smbios.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletio
SVVP requires processor speed on Type 4 structures to not be unknown.
This was fixed in SeaBIOS 0.5.0 (in 2009), but the bug was reintroduced
in QEMU 2.1.
Revert to old behavior and report CPU speed as 2000 MHz instead of
unknown.
Signed-off-by: Eduardo Habkost
---
hw/i386/smbios.c | 5 +++--
1
Some changed introduced by the new QEMU smbios table generation code broke
SVVP. This series fixes those issues.
Eduardo Habkost (2):
smbios: Fix dimm size calculation when RAM is multiple of 16GB
smbios: Don't report unknown CPU speed (fix SVVP regression)
hw/i386/smbios.c | 8 +---
1 f
We use an unsigned int when working with the PCI BAR size, which can
obviously overflow if the BAR is 4GB or larger. This needs to change
to a fixed length uint64_t. A similar issue is possible, though even
more unlikely, when mapping the region above an MSI-X table. The
start of the MSI-X vecto
Hi Peter,
On 01/06/2015 07:57 PM, Peter Maydell wrote:
> On 5 January 2015 at 16:14, Eric Auger wrote:
>> Allows sysbus devices to be instantiated from command line by
>> using -device option. Machvirt creates a platform bus at init.
>> The dynamic sysbus devices are attached to this platform bus
On 07/01/2015 17:34, Peter Maydell wrote:
>>> >> # All Red Hat contributions (at least Avi, Juan, me; don't know about
>>> >> rth)
>>> >> # are available under GPLv2+; also other authors agreed on it. For this
>>> >> # particular license,
>>> >> # Acked-by: Paolo Bonzini
>>> >>
>>> >> and Juan
On 7 January 2015 at 14:26, Claudio Fontana wrote:
> Yes I did but it seems it's not picking up the CONFIG_PCI_GENERIC=y for some
> reason.
> If I force hw/pci-host/Makefile.objs to build it by making it a common-obj-y
> then it builds.
This is a long-standing bug in our makefiles:
http://lists
On 7 January 2015 at 16:29, Paolo Bonzini wrote:
> On 07/01/2015 17:23, Peter Maydell wrote:
>> On 7 January 2015 at 11:04, Paolo Bonzini wrote:
>> You said
>> # All Red Hat contributions (at least Avi, Juan, me; don't know about rth)
>> # are available under GPLv2+; also other authors agreed on
It works without the -trace option.
Want I meant with this post is that the "events" argument of the "-trace"
option has no effect in the case of using LTTng UST as the tracing backend
because the events are enabled from the LTTng tracer itself.
Is there some way I can make an argument optiona
On 07/01/2015 17:23, Peter Maydell wrote:
> On 7 January 2015 at 11:04, Paolo Bonzini wrote:
>>
>>
>> On 07/01/2015 11:34, Peter Maydell wrote:
>>> The thing is that after all these relicensings we end up with a
>>> file with a mix of licenses in it. So for somebody actually
>>> using the file t
On Sun, 28 Dec 2014 12:24:46 +0200
"Michael S. Tsirkin" wrote:
> On Thu, Dec 11, 2014 at 02:25:21PM +0100, Cornelia Huck wrote:
> > Wire up virtio-blk to provide different feature bit sets depending
> > on whether legacy or v1.0 has been requested.
> >
> > Note that VERSION_1 is still disabled d
On Jan 7, 2015, at 9:43 AM, Gerd Hoffmann wrote:
> Hi,
>
>> However, you should specify it whatever the host endianness and the host
>> OS is. If this is not the case, you're just exchanging a bug with another.
>>
>> If something
>>
>> a) works with Linux host but not with Mac OS X host
>>
Oops, forgot to include Kevin and Stefan on cc for this.
Dave
* Dr. David Alan Gilbert (git) (dgilb...@redhat.com) wrote:
> From: "Dr. David Alan Gilbert"
>
> This pair of patches fixes a problem where IDE/ATAPI cdrom
> reads get lost/corrupted over migration.
>
> The first of the patches (re
On 7 January 2015 at 11:04, Paolo Bonzini wrote:
>
>
> On 07/01/2015 11:34, Peter Maydell wrote:
>> The thing is that after all these relicensings we end up with a
>> file with a mix of licenses in it. So for somebody actually
>> using the file the controlling license is GPLv2+. (In particular
>>
On Sun, 28 Dec 2014 10:32:06 +0200
"Michael S. Tsirkin" wrote:
> On Thu, Dec 11, 2014 at 02:25:20PM +0100, Cornelia Huck wrote:
> > Devices may support different sets of feature bits depending on which
> > revision they're operating at. Let's give the transport a way to
> > re-query the device ab
Hi,
Am 05.01.2015 um 20:54 schrieb Greg Kurz:
> On Mon, 5 Jan 2015 14:23:32 +
> Peter Maydell wrote:
>
>> The CPUClass QOM methods virtio_is_big_endian, write_elf{32,64}_note
>> and write_elf{32,64}_qemunote were added without any description
>> being added to the doc comment. Correct this
I have tried what you suggested (breaking the bridge on the host, and giving
the host tap 192.168.5.1 and the guest eth0 192.168.5.2
and tried pinging one from the other. I get 100% packet loss.
This points to QEMU's tap networking as far as I can see.
I have tried uninstalling the 64 bit version
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