On 12/16/14 21:41, Peter Maydell wrote:
> On 16 December 2014 at 19:00, Laszlo Ersek wrote:
>> The root of this question is what each of
>>
>> enum device_endian {
>> DEVICE_NATIVE_ENDIAN,
>> DEVICE_BIG_ENDIAN,
>> DEVICE_LITTLE_ENDIAN,
>> };
>>
>> means.
>
> An opening remark: endiann
> Patch 0500-block-raw-posix-Try-both-FIEMAP-and-SEEK_HOLE.patch appears to be
> part of a bigger re-write
> of the related code. and is ON TOP of the patches already applied in this bug.
Yep, sorry for not mentioning this. As far as I understand qemu-2.1 package
contains this partially rewritte
From: linhaifeng
If we create VM with two or more numa nodes qemu will create two
or more hugepage files but qemu only send one hugepage file fd
to vhost-user when VM's memory size is 2G and with two numa nodes.
Signed-off-by: linhaifeng
---
hw/virtio/vhost-user.c | 78 +++
On 2014/12/16 18:42, Eric Auger wrote:
> This patch series enables machvirt to dynamically instantiate sysbus
> devices from command line (using -device option).
>
> All those sysbus devices are plugged onto a platform bus. This latter
> device is instantiated in machvirt and takes care of the bin
On 12/16/14 21:40, Paolo Bonzini wrote:
> On 16/12/2014 21:06, Laszlo Ersek wrote:
>> You flipped the combined ops to LE in commit 6fdf98f2 (and, apparently,
>> I reviewed it). Shouldn't we do the same for the standalone selector?
>
> No. The standalone selector is used as MMIO, and the BE platf
it basicaly does the same as original approach,
* just without bus/notify tables tracking (less obscure)
which is easier to follow.
* drops unnecessary loops and bitmaps,
creating devices and notification method in the same loop.
* saves us ~100LOC
change in behavior:
* generate hotpluggable d
On 12/16/14 22:47, Paolo Bonzini wrote:
> On 16/12/2014 21:17, Laszlo Ersek wrote:
I can't imagine how that would happen; fw_cfg_data_mem_read() ignores
both "addr" and "size", and fw_cfg_read() simply advances the
"cur_offset" member.
>> Ah okay, I understand your point now; you're
On 2014/12/16 21:20, Gerd Hoffmann wrote:
> This patch switches vnc over to QemuOpts, and it (more or less
> as side effect) allows multiple vnc server instances.
>
> Signed-off-by: Gerd Hoffmann
> ---
> include/ui/console.h | 4 +-
> qmp.c| 15 ++-
> ui/vnc.c | 2
On 2014/12/16 22:01, Peter Maydell wrote:
> On 16 December 2014 at 09:22, wrote:
>> From: root
>>
>> This is my first pull request as a submaintainer. Those patches just
>> move boot order related code to bootdevice.c and add a Error **errp
>> argument for corresponding functions so that it can
On 2014/12/16 21:23, Peter Maydell wrote:
> On 16 December 2014 at 13:04, Gonglei wrote:
>> On 2014/12/16 20:42, Peter Maydell wrote:
>>
>>> On 16 December 2014 at 09:22, wrote:
@@ -412,9 +411,7 @@ void pc_cmos_init(ram_addr_t ram_size, ram_addr_t
above_4g_mem_size,
object_
Hi Peter,
please pull my current target-xtensa queue.
The following changes since commit d86fb03469e016af4e54f04efccbc20a8afa3e19:
Merge remote-tracking branch 'remotes/spice/tags/pull-spice-20141216-1' into
staging (2014-12-16 16:52:42 +)
are available in the git repository
On 12/16/2014 08:36 PM, John Snow wrote:
Amazingly, we weren't doing this before.
Make sure we migrate the IDEState structure that belongs to
the AHCIDevice.IDEBus structure during migrations.
No version numbering changes because AHCI is not officially
migratable (and we can all see with good
When the AHCI HBA device is migrated, all of the information that
led to the request being created is stored in the AHCIDevice
structures, except for pointers into guest data where return
information needs to be stored.
The "cur_cmd" field is usually responsible for this.
To rebuild the cur_cmd p
Amazingly, we weren't doing this before.
Make sure we migrate the IDEState structure that belongs to
the AHCIDevice.IDEBus structure during migrations.
No version numbering changes because AHCI is not officially
migratable (and we can all see with good reason why) so we
do not impact any official
From: Paolo Bonzini
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
---
hw/ide/isa.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ide/isa.c b/hw/ide/isa.c
index b084162..5eb35c2 100644
--- a/hw/ide/isa.c
+++ b/hw/ide/isa.c
@@ -74,7 +74,8 @@ static void isa_ide
This patch adds tests for werror and rerror functionality
for the PCI and ISA ide buses.
Tests for the AHCI device are to be included at a later
date after requisite patches have been merged upstream
to support needed functionality by the tests.
Signed-off-by: Paolo Bonzini
Signed-off-by: John S
From: Paolo Bonzini
This only breaks backwards migration compatibility if the bus is in
an error state. It is in principle possible to avoid this by making
two subsections (one for version 1, and one for version 2, but with
the same name) with different "_needed" callbacks. The v1 callback woul
From: Paolo Bonzini
Start moving the initial state of the current request to IDEBus, so that
AHCI can use it. The set_unit callback is not used anymore once this is
done.
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
---
hw/ide/ahci.c | 7 ---
hw/ide/core.c | 6 --
From: Paolo Bonzini
Resetting the io_buffer_index to 0 is commonized,
with the exception of the case within ide_atapi_cmd_reply,
where we need to reset this index to 0 prior to the
ide_atapi_cmd_reply_end call.
Note that not all calls to ide_atapi_cmd_reply_end
expect the index to be 0, so setti
From: Paolo Bonzini
This is easy, since start_dma already restarts processing from the
beginning of the PRDT.
Migration is also easy to cover; the comment about busy_slot is
wrong, busy_slot will only be set if there is an error. In this
case we have nothing to do really. The core IDE code wil
From: Paolo Bonzini
With BMDMA specific excised from the restart functions,
create a HBA-agnostic restart callback to be shared
between the different HBAs.
Change the callback registered with the vmstate_change
handler to always point to ide_restart_cb instead of
relying on the IDEDMAOps.restart
From: Paolo Bonzini
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
---
hw/ide/core.c | 12
hw/ide/internal.h | 4
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/ide/core.c b/hw/ide/core.c
index b89cde0..66ab93d 100644
--- a/hw/ide/core.c
+++ b/h
From: Paolo Bonzini
A helper is added that registers the IDEDMAOp .restart_cb()
via qemu_add_vm_change_state_handler instead of requiring
each HBA to register the callback themselves.
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
---
hw/ide/cmd646.c | 3 +--
hw/ide/core.c | 5 ++
From: Paolo Bonzini
With restarts now handled by ide_restart_cb and
the IDEDMAOps.restart_dma() member, remove the old
restart_cb callback.
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
---
hw/ide/ahci.c | 5 -
hw/ide/core.c | 5 -
hw/ide/internal.h | 1 -
hw/ide/macio
From: Paolo Bonzini
Pass the containing IDEBus to the restart_cb instead
of the more specific BMDMAState child.
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
---
hw/ide/core.c | 2 +-
hw/ide/pci.c | 10 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/ide
From: Paolo Bonzini
This moves more common restarting logic to the core IDE code.
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
---
hw/ide/core.c | 6 ++
hw/ide/internal.h | 2 ++
hw/ide/pci.c | 15 ++-
hw/ide/pci.h | 5 ++---
4 files changed, 16 inser
From: Paolo Bonzini
Whenever an error stops the VM, ide_handle_rw_error does
"s->bus->dma->unit = s->unit". So we can just use
idebus_active_if.
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
---
hw/ide/pci.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw
From: Paolo Bonzini
This patch adds the restart_dma callback and adjusts
the ide_restart_dma function to utilize this callback
to call the BMDMA-specific restart code instead of statically
executing BMDMA-specific code.
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
---
hw/ide/internal
From: Paolo Bonzini
This patch begins refactoring the restart dma functions
out of bmdma to be shared with AHCI and other future
IDE HBA implementations.
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
---
hw/ide/pci.c | 30 +++---
1 file changed, 19 insertions(+
This series was written mostly by Paolo Bonzini to do two things:
1. Unify the restart callbacks for ISA, AHCI and BMDMA
2. Ensure we can restart a command after migration
Many of the early patches only make much sense considering the
end-goal of eliminating BMDMA specific restart code to be shar
Hi list!
This is not the first post on this topic, but I haven't seen any
solution about it.
I tested so far linux guest on windows host and the AltGr key is dead in
the guest. (using git master branch)
On french keyboard, the keys to yield the bar "|" are alt-gr + 6.
when executing this comb
Patchg 0500-block-raw-posix-Try-both-FIEMAP-and-SEEK_HOLE.patch appears
to be part of a bigger re-write of the related code. and is ON TOP of
the patches already applied in this bug.
No doubt the rewirtten code is "better" but backporting it contains more risk
than the 2 simple fixes I already
On 16/12/2014 21:17, Laszlo Ersek wrote:
>> > I can't imagine how that would happen; fw_cfg_data_mem_read() ignores
>> > both "addr" and "size", and fw_cfg_read() simply advances the
>> > "cur_offset" member.
> Ah okay, I understand your point now; you're probably saying that
> access_with_adjusted
On 16 December 2014 at 20:40, Paolo Bonzini wrote:
> Honestly neither can I. But still the automatic splitting (which is
> even tested by tests/endianness-test.c :)) assumes idempotency of the
> components and it's not entirely surprising that it somehow/sometimes
> breaks if you don't respect th
Since net_init() checks whether 'netdev->mac' is NULL, before alloc it;
net_release() also need set 'netdev->mac' to NULL after free it.
Signed-off-by: Chen Gang
---
hw/net/xen_nic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/net/xen_nic.c b/hw/net/xen_nic.c
index 8eaa77b..19ecfc4 10
Without this fix, qemu segfaults when emulating the sigaltstack syscall,
because it incorrectly treats the ss_flags field as 64 bits rather than 32
bits.
Signed-off-by: Ed Swierk
---
linux-user/mips64/target_signal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/
linux-user passes the cmd argument of the ioctl syscall as a signed long,
but compares it to an unsigned int when iterating through the ioctl_entries
list. When the cmd is a large value like 0x80047476 (TARGET_TIOCSWINSZ on
mips64) it gets sign-extended to 0x80047476, causing the compariso
net_init() and net_free() are pairs, net_connect() and net_disconnect()
are pairs. net_init() creates 'netdev->nic', so also need free it in
net_free().
Signed-off-by: Chen Gang
---
hw/net/xen_nic.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/net/xen_nic.c b/hw
When map 'netdev->rxs' fails, need free the original resource, or will
cause resource leak.
Signed-off-by: Chen Gang
---
hw/net/xen_nic.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/net/xen_nic.c b/hw/net/xen_nic.c
index 63918ae..7a57feb 100644
--- a/hw/net/xen_n
On 16 December 2014 at 19:00, Laszlo Ersek wrote:
> The root of this question is what each of
>
> enum device_endian {
> DEVICE_NATIVE_ENDIAN,
> DEVICE_BIG_ENDIAN,
> DEVICE_LITTLE_ENDIAN,
> };
>
> means.
An opening remark: endianness is a horribly confusing topic and
support of more t
On 16/12/2014 21:06, Laszlo Ersek wrote:
> On 12/16/14 20:49, Paolo Bonzini wrote:
>> fw_cfg_read (and
>> thus fw_cfg_data_mem_read) is not idempotent. The split/compose stuff
>> accesses the bytes at offsets 8,9,10,11,12,13,14,15 and composes them
>> according to the endianness.
>>
>> In the ca
> I could reproduce this very well on a random OS image that I had around.
> This is raw over XFS over dm-crypt, and the image is about 75% sparse
> (8.2G used over 35G). I only get 1-2%, but still it's visible.
>
> However I can hardly reproduce it when using a partition directly:
>
>
On 12/16/14 21:06, Laszlo Ersek wrote:
> On 12/16/14 20:49, Paolo Bonzini wrote:
>>
>>
>> On 16/12/2014 20:00, Laszlo Ersek wrote:
>>> Yes.
>>>
>>> The root of this question is what each of
>>>
>>> enum device_endian {
>>> DEVICE_NATIVE_ENDIAN,
>>> DEVICE_BIG_ENDIAN,
>>> DEVICE_LITTLE_E
On 12/16/14 20:49, Paolo Bonzini wrote:
>
>
> On 16/12/2014 20:00, Laszlo Ersek wrote:
>> Yes.
>>
>> The root of this question is what each of
>>
>> enum device_endian {
>> DEVICE_NATIVE_ENDIAN,
>> DEVICE_BIG_ENDIAN,
>> DEVICE_LITTLE_ENDIAN,
>> };
>
> Actually, I think the root of th
From: "Maciej W. Rozycki"
Enable vectored interrupt support for the 74Kf CPU, reflecting hardware.
Signed-off-by: Maciej W. Rozycki
Reviewed-by: Leon Alrae
Signed-off-by: Leon Alrae
---
target-mips/translate_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-mi
From: "Maciej W. Rozycki"
Add the M14K and M14Kc processors from MIPS Technologies that are the
original implementation of the microMIPS ISA. They are dual instruction
set processors, implementing both the microMIPS and the standard MIPSr32
ISA.
These processors correspond to the M4K and 4KEc C
From: "Maciej W. Rozycki"
Make the data type used for the CP0.Config4 and CP0.Config5 registers
and their mask signed, for consistency with the remaining 32-bit CP0
registers, like CP0.Config0, etc.
Signed-off-by: Maciej W. Rozycki
Reviewed-by: Leon Alrae
Signed-off-by: Leon Alrae
---
target
From: "Maciej W. Rozycki"
Signed-off-by: Maciej W. Rozycki
Signed-off-by: Leon Alrae
---
target-mips/translate_init.c | 40 +---
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index
From: "Maciej W. Rozycki"
Signed-off-by: Maciej W. Rozycki
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index f0b8e6f..643214a 100644
--- a/target-mips/translate.c
+++
Signed-off-by: Leon Alrae
Reviewed-by: Peter Maydell
---
disas/mips.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/disas/mips.c b/disas/mips.c
index 2614c52..b94d5d9 100644
--- a/disas/mips.c
+++ b/disas/mips.c
@@ -3801,13 +3801,6 @@ static const char * const mips_hwr_names_mips3264
This array is used by print_mips16_insn_arg() which is guarded by #if 0.
Therefore doing the same with the array as it generates clang warnings.
Signed-off-by: Leon Alrae
---
disas/mips.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/disas/mips.c b/disas/mips.c
index b94d
From: "Maciej W. Rozycki"
Reduce line wrapping throughout MSA helper macros by using a local float
status pointer rather than referring to the float status through the
environment each time. No functional change.
Signed-off-by: Maciej W. Rozycki
Reviewed-by: Leon Alrae
Signed-off-by: Leon Alr
Signed-off-by: Leon Alrae
Reviewed-by: Peter Maydell
---
target-mips/translate.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index f65ed84..1205909 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -
From: "Maciej W. Rozycki"
Make sure the address space is unconditionally wrapped on 32-bit
processors, that is ones that do not implement at least the MIPS III
ISA.
Also make MIPS16 SAVE and RESTORE instructions use address calculation
rather than plain arithmetic operations for stack pointer ma
From: "Maciej W. Rozycki"
Add missing calls to synchronise the SoftFloat status with the CP1.FSCR:
+ for the rounding and flush-to-zero modes upon processor reset,
+ for the flush-to-zero mode on FSCR updates through the GDB stub.
Refactor code accordingly and remove the redundant RESTORE_ROUN
From: "Maciej W. Rozycki"
Replace the 20Kc original MIPS64 ISA processor used for 64-bit user
emulation with the 5KEf processor that implements the MIPS64r2 ISA,
complementing the choice of the 24Kf processor for 32-bit emulation.
Signed-off-by: Maciej W. Rozycki
Reviewed-by: Leon Alrae
Signed
From: "Maciej W. Rozycki"
Make CP0.Status writes made with the MTTC0 instruction respect this
register's mask just like all the other places. Also preserve the
current values of masked out bits.
Signed-off-by: Maciej W. Rozycki
Reviewed-by: Leon Alrae
Signed-off-by: Leon Alrae
---
target-mi
From: "Maciej W. Rozycki"
Tighten ISA level checks down to MIPS II that many of our instructions
are missing. Also make sure any 64-bit instruction enables are only
applied to 64-bit processors, that is ones that implement at least the
MIPS III ISA.
Signed-off-by: Maciej W. Rozycki
Reviewed-by
Signed-off-by: Leon Alrae
Reviewed-by: Peter Maydell
---
target-mips/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-mips/helper.c b/target-mips/helper.c
index c4b3658..7d26705 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -388,7 +388,6 @@ hw
From: "Maciej W. Rozycki"
Fix CP0.Config3.ISAOnExc write accesses on microMIPS processors. This
bit is mandatory for any processor that implements the microMIPS
instruction set. This bit is r/w for processors that implement both the
standard MIPS and the microMIPS instruction set. This bit is
From: "Maciej W. Rozycki"
Fix microMIPS MOVE16 and MOVEP instructions on 64-bit processors by
using register addition operations.
This copies the approach taken with MIPS16 MOVE instructions (I8_MOV32R
and I8_MOVR32 opcodes) and follows the observation that OPC_ADDU expands
to tcg_gen_mov_tl whe
From: "Maciej W. Rozycki"
Make writes to CP0.Status and CP0.Cause have the same effect as
executing corresponding MTC0 instructions would in Kernel Mode. Also
ignore writes in the user emulation mode.
Currently for requests from the GDB stub we write all the bits across
both registers, ignoring
From: "Maciej W. Rozycki"
Set DisasContext's ulri member to 0 or 1 as with other bool members.
Signed-off-by: Maciej W. Rozycki
Reviewed-by: Leon Alrae
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-mips/transl
From: "Maciej W. Rozycki"
Correct these issues with the handling of CP0.Status for MIPSr6:
* only ignore the bit pattern of 0b11 on writes to CP0.Status.KSU, that
is for processors that do implement Supervisor Mode, let the bit
pattern be written to CP0.Status.UM:R0 freely (of course the val
From: "Maciej W. Rozycki"
Restore the order of helpers that used to be: unary operations (generic,
then MIPS-specific), binary operations (generic, then MIPS-specific),
compare operations. At one point FMA operations were inserted at a
random place in the file, disregarding the preexisting order
From: "Maciej W. Rozycki"
Correct MIPS16/microMIPS branch size calculation in PC adjustment
needed:
- to set the value of CP0.ErrorEPC at the entry to the reset exception,
- for the purpose of branch reexecution in the context of device I/O.
Follow the approach taken in `exception_resume_pc' f
From: "Maciej W. Rozycki"
Rewrite the FPU register access parts of `mips_cpu_gdb_read_register'
and `mips_cpu_gdb_write_register' for consistency between each other.
Signed-off-by: Maciej W. Rozycki
Reviewed-by: Leon Alrae
Signed-off-by: Leon Alrae
---
target-mips/gdbstub.c | 38
From: "Maciej W. Rozycki"
Include CP0.Config2 through CP0.Config5 registers in the register dump
produced with the `info registers' monitor command. Align vertically
with the registers already output.
Signed-off-by: Maciej W. Rozycki
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 4
From: "Maciej W. Rozycki"
Remove the `FLOAT_OP' macro, unused since commit
b6d96beda3a6cbf20a2d04a609eff78adebd8859 [Use temporary registers for
the MIPS FPU emulation.].
Signed-off-by: Maciej W. Rozycki
Signed-off-by: Leon Alrae
---
target-mips/op_helper.c | 2 --
1 file changed, 2 deletions
From: "Maciej W. Rozycki"
Add the 5KEc and 5KEf processors from MIPS Technologies that are the
original implementation of the MIPS64r2 ISA.
Silicon for these processors has never been taped out and no soft cores
were released even. They do exist though, a CP0.PRId value has been
assigned and ex
From: "Maciej W. Rozycki"
Fix an off-by-one error in `mips_cpu_gdb_write_register' for register
matching how `mips_cpu_gdb_read_register' handles it. This register
slot is a fake anyway, there's nothing in hardware that corresponds to
it.
Signed-off-by: Maciej W. Rozycki
Reviewed-by: Leon Alra
From: "Maciej W. Rozycki"
Move the call to `update_fcr31' in `helper_float_cvtw_s' after the
exception flag check, for consistency with the remaining helpers that do
it last too.
Signed-off-by: Maciej W. Rozycki
Signed-off-by: Leon Alrae
---
target-mips/op_helper.c | 2 +-
1 file changed, 1 i
From: "Maciej W. Rozycki"
Signed-off-by: Maciej W. Rozycki
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 643214a..a5a5ca4 100644
--- a/target-mips/t
From: "Maciej W. Rozycki"
CP1.FIR is read-only in hardware so gdbstub must respect it. We already
respect it for CTC1 instructions, so do it here too.
Signed-off-by: Maciej W. Rozycki
Reviewed-by: Leon Alrae
Signed-off-by: Leon Alrae
---
target-mips/gdbstub.c | 2 +-
1 file changed, 1 inser
)
are available in the git repository at:
git://github.com/lalrae/qemu.git tags/mips-20141216
for you to fetch changes up to d4fa5354a246a1c6cb538a5d8ebcc21206d502fb:
target-mips: remove excp_names[] from linux-user as it is unused (2014-12-16
12:4
On 16/12/2014 20:00, Laszlo Ersek wrote:
> Yes.
>
> The root of this question is what each of
>
> enum device_endian {
> DEVICE_NATIVE_ENDIAN,
> DEVICE_BIG_ENDIAN,
> DEVICE_LITTLE_ENDIAN,
> };
Actually, I think the root of the answer :) is that fw_cfg_read (and
thus fw_cfg_data_mem
On 12/16/14 14:48, Andrew Jones wrote:
> On Fri, Dec 12, 2014 at 04:58:45PM +0100, Laszlo Ersek wrote:
>> Make it clear that the maximum access size to the MMIO data register
>> determines the full size of the memory region.
>>
>> Currently the max access size is 1. Ensure that if a larger size wer
On 12/16/14 18:20, Alexander Graf wrote:
> On 12/16/14 18:10, Peter Maydell wrote:
>> On 16 December 2014 at 16:59, Laszlo Ersek wrote:
>>> To elaborate on the above -- the fw_cfg device appears to be
>>> undestructible at the moment. It has no unrealize callback. If it were
>>> destructible, then
On 15 December 2014 at 23:09, Greg Bellows wrote:
> This patchset adds functionality for enabling the ARM CPU security extensions.
> At this time, the only machines supported are Versatile Express and the QEMU
> ARM virtual machines both with Cortex A9 & A15.
>
> The patchset establishes the defau
On 16/12/2014 14:10, Kevin Wolf wrote:
> Am 16.12.2014 um 12:28 hat Paolo Bonzini geschrieben:
>>
>>
>> On 16/12/2014 12:07, Kevin Wolf wrote:
>>> Am 11.12.2014 um 14:52 hat Paolo Bonzini geschrieben:
Keep a queue of requests that were not submitted; pass them to
the kernel when a compl
Conscious design decision: Backend (BB) and node (BDS) names share a
common name space.
Enables a convenience feature: when a command needs a node, we accept
either kind of name, and a backend name is resolved to its root node.
Should not be confused with a command that can work either on a backe
On 12/16/14 18:10, Peter Maydell wrote:
On 16 December 2014 at 16:59, Laszlo Ersek wrote:
To elaborate on the above -- the fw_cfg device appears to be
undestructible at the moment. It has no unrealize callback. If it were
destructible, then the above leak would be the smallest of concerns --
it
On 16 December 2014 at 16:59, Laszlo Ersek wrote:
> To elaborate on the above -- the fw_cfg device appears to be
> undestructible at the moment. It has no unrealize callback. If it were
> destructible, then the above leak would be the smallest of concerns --
> it doesn't unmap nor destroy the memo
Ekaterina Tumanova writes:
> Updates:
> v2 -> v3:
> 1. Fix comments
> 2. Fix error codes to -ENOTSUP.
> 3. Reduce LOC in probe_logical_blocksize.
> 4. Adjust #ifdef - #else logic in couple of places.
> 5. Rebased.
>
> I hope that I addressed all the comments from the last round of review.
> If yo
Ekaterina Tumanova writes:
> Introduce driver methods of defining disk blocksizes (physical and
> logical) and hard drive geometry.
> Methods are only implemented for "host_device". For "raw" devices
> driver calls child's method.
>
> For now geometry detection will only work for DASD devices. To
On 12/16/14 13:42, Laszlo Ersek wrote:
> On 12/16/14 13:06, Alexander Graf wrote:
>>
>>
>> On 12.12.14 16:58, Laszlo Ersek wrote:
>>> The "data_memwidth" property is capable of changing the maximum valid
>>> access size to the MMIO data register, and (corresponding to the previous
>>> patch) resize
Ekaterina Tumanova writes:
> Put it in new probe_logical_blocksize().
>
> Signed-off-by: Ekaterina Tumanova
> ---
> block/raw-posix.c | 41 -
> 1 file changed, 24 insertions(+), 17 deletions(-)
>
> diff --git a/block/raw-posix.c b/block/raw-posix.c
> inde
On 16 December 2014 at 12:26, Amit Shah wrote:
> The following changes since commit 54600752a1dd67844c2cf3c467db562c39499838:
>
> Merge remote-tracking branch 'remotes/rth/tags/x86-next-20141214' into
> staging (2014-12-15 11:11:52 +)
>
> are available in the git repository at:
>
> git://
Ekaterina Tumanova writes:
> Add driver functions for geometry and blocksize detection
>
> Signed-off-by: Ekaterina Tumanova
> Reviewed-by: Thomas Huth
> ---
> block.c | 34 ++
> include/block/block.h | 13 +
> include/block/blo
On 16 December 2014 at 09:13, wrote:
> From: KONRAD Frederic
>
> This adds a lock to avoid multiple exclusive access at the same time in case
> of
> TCG multithread.
This feels to me like it's not really possible to review on
its own, since you can't see how it fits into the design of
the rest
On 15/12/14 14:06, Kevin Wolf wrote:
Am 15.12.2014 um 09:27 hat Denis V. Lunev geschrieben:
Signed-off-by: Denis V. Lunev
Acked-by: Roman Kagan
Reviewed-by: Jeff Cody
CC: Kevin Wolf
CC: Stefan Hajnoczi
---
block/parallels.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff -
On 12/16/2014 04:48 AM, Yan Vugenfirer wrote:
>> +
>> +if (si.wProcessorArchitecture == PROCESSOR_ARCHITECTURE_AMD64 ||
>> +si.wProcessorArchitecture == PROCESSOR_ARCHITECTURE_IA64) {
>
> If one of the motivations is to update drivers on the guest - those should be
> treated as defere
On 12/16/2014 12:30 AM, zhanghailiang wrote:
> Hi,
>
> This patch series add a new guest command 'guest-get-os-version'.
> It is now only available for windows guest.
Why not also supply it for Linux guests? uname() is your friend; it
should be fairly easy to wire up.
>
> It will return guest'
On 12/16/2014 12:30 AM, zhanghailiang wrote:
> Signed-off-by: zhanghailiang
> ---
Might be nice to show an example (intended) usage of the new command in
the commit message.
> +++ b/qga/qapi-schema.json
> @@ -738,3 +738,29 @@
> ##
> { 'command': 'guest-get-fsinfo',
>'returns': ['GuestFiles
Add API to allocate resizeable RAM MR.
This looks just like regular RAM generally, but
has a special property that only a portion of it
(used_length) is actually used, and migrated.
This used_length size can change across reboots.
Follow up patches will change used_length for such blocks at migr
Use resizeable ram API so we can painlessly extend ROMs in the
future. Note: migration is not affected, as we are
not actually changing the used length for RAM, which
is the part that's migrated.
Use this in acpi: reserve x16 more RAM space.
Signed-off-by: Michael S. Tsirkin
---
hw/lm32/lm32_h
This patch allows us to distinguish between two
length values for each block:
max_length - length of memory block that was allocated
used_length - length of block used by QEMU/guest
Currently, we set used_length - max_length, unconditionally.
Follow-up patches allow used_length <= max_leng
Add API to allocate "resizeable" RAM.
This looks just like regular RAM generally, but
has a special property that only a portion of it
(used_length) is actually used, and migrated.
This used_length size can change across reboots.
Follow up patches will change used_length for such blocks at migrat
Make cpu_physical_memory_set/clear_dirty_range
behave symmetrically.
To clear range for a given client type only, add
cpu_physical_memory_clear_dirty_range_type.
Signed-off-by: Michael S. Tsirkin
---
include/exec/ram_addr.h | 15 ---
exec.c | 2 +-
2 files changed,
If block used_length does not match, try to resize it.
Signed-off-by: Michael S. Tsirkin
---
arch_init.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 106f46e..cfedbf0 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -1086,11 +1086
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