Re: [Qemu-devel] [PATCH v5 1/3] contrib: add ivshmem client and server

2014-09-06 Thread Michael S. Tsirkin
On Fri, Sep 05, 2014 at 02:07:54PM +0200, David Marchand wrote: > Hello Michael, > > On 09/04/2014 05:56 PM, Michael S. Tsirkin wrote: > >>+/* create the unix listening socket */ > >>+sock_fd = socket(AF_UNIX, SOCK_STREAM, 0); > >>+if (sock_fd < 0) { > >>+debug_log(server, "can

Re: [Qemu-devel] Supporting multiple CPU AddressSpaces and memory transaction attributes

2014-09-06 Thread Edgar E. Iglesias
On Thu, Sep 04, 2014 at 06:47:58PM +0100, Peter Maydell wrote: > One of the parts of the ARM TrustZone/Security Extensions > which the patchsets we've seen so far haven't attempted to > tackle is the problem of Secure vs NonSecure memory accesses. > Architecturally, every memory transaction should

[Qemu-devel] [PATCH v3 3/3] target-i386: x87 exception pointers using TCG.

2014-09-06 Thread Jaume Marti Farriol
This adds tests for the x87 exception pointers. Signed-off-by: jaume.mar...@gmail.com --- tests/tcg/test-i386.c | 71 ++- 1 file changed, 65 insertions(+), 6 deletions(-) diff --git a/tests/tcg/test-i386.c b/tests/tcg/test-i386.c index b05572b..bc9

[Qemu-devel] [PATCH v3 2/3] target-i386: x87 exception pointers using TCG.

2014-09-06 Thread Jaume Marti Farriol
This modifies the helpers for instructions fstenv/fnstenv, fsave, fxsave, fldenv, frstor and fxrstor, to store to memory and restore from memory the x87 exception pointers. Also it add logic that efficiently stores the values of the exception pointers, to be used in the instructions mentioned above

[Qemu-devel] [PATCH v3 1/3] target-i386: x87 exception pointers using TCG.

2014-09-06 Thread Jaume Marti Farriol
This adds new fields in the CPUX86State struct to store the x87 exception pointers. Also it adds a new enum type that encodes the operand size and the processor operating mode (protected and real mode). Signed-off-by: jaume.mar...@gmail.com --- target-i386/cpu.h | 23 +--

[Qemu-devel] [PATCH v3 0/3] target-i386: x87 exception pointers using TCG.

2014-09-06 Thread Jaume Marti Farriol
Hello, I submit a patch to fix bugs 661696 and 1248376. This is the third version of this patch. As mentioned in a previous email, the patch implements, for TCG, the specifications provided in Intel and AMD programmer's manuals regarding the x87 exception pointers. That is, when executing inst

Re: [Qemu-devel] Polymorphic Inline Caching

2014-09-06 Thread Xin Tong
I've collected some data running X86_64 SPECINT2006 guest on qemu-system-x86_64. Indirect branches and calls are responsible for an average 16.49% of all the code cache exits on the measured workloads with the highest of 33.2% in 464.h264ref. Every code cache exit is followed by a TB lookup and c

[Qemu-devel] [Bug 1366363] [NEW] qemu-git gravis ultrasound not working

2014-09-06 Thread Winston Wu
Public bug reported: Qemu git 2.1.50 with dos622 and windows 3.11. Parameter: For build: default-configs/sound.mak CONFIG_GUS=y Starting parameter: qemu-system-i386 -cpu 486 -m 32M -vga cirrus -hda disk1.img -soundhw gus,pcspk -parallel none -net nic,model=ne2k_isa -net user The installer of G

Re: [Qemu-devel] Audio stream handling in QEMU device model

2014-09-06 Thread Harry Cruise
Hi, Thanks for the reply.. Kindly help me with few more queries.. I tried to understand the audio implementation in qemu from the sources you have suggested. Now, I am confused how audio emulation actually works. The subject is that I need to read the audio streams sampled at particular freq

Re: [Qemu-devel] [PATCH v3] target-arm: Fix resetting issues on ARMv7-M CPUs

2014-09-06 Thread Peter Crosthwaite
On Sat, Sep 6, 2014 at 8:42 PM, Peter Maydell wrote: > On 6 September 2014 03:45, Peter Crosthwaite > wrote: >> CC Alistair who is into ARMv7M >> >> On Sat, Sep 6, 2014 at 4:39 AM, Martin Galvan >> wrote: >>> When calling qemu_system_reset after startup on a Cortex-M >>> CPU, the initial values

Re: [Qemu-devel] [PATCH v3] target-arm: Fix resetting issues on ARMv7-M CPUs

2014-09-06 Thread Peter Maydell
On 6 September 2014 03:45, Peter Crosthwaite wrote: > CC Alistair who is into ARMv7M > > On Sat, Sep 6, 2014 at 4:39 AM, Martin Galvan > wrote: >> When calling qemu_system_reset after startup on a Cortex-M >> CPU, the initial values of PC, MSP and the Thumb bit weren't being set >> correctly if t

Re: [Qemu-devel] Supporting multiple CPU AddressSpaces and memory transaction attributes

2014-09-06 Thread Peter Maydell
On 6 September 2014 01:26, Peter Crosthwaite wrote: > On Fri, Sep 5, 2014 at 3:47 AM, Peter Maydell > wrote: >> (Another oddball usecase is the Cortex-M split I and D >> bus for low memory, where instruction and data accesses >> go out via different buses and might map to different things, >> bu

Re: [Qemu-devel] [RFC PATCH v3 11/18] spapr_pci: Add windows counter

2014-09-06 Thread David Gibson
On Fri, Aug 29, 2014 at 08:12:15PM +1000, Alexey Kardashevskiy wrote: > We are goint to have more than one DMA window and this is going to > be dynamic. This adds a counter which will be used to get a new DMA > window LIOBN. It is set to 1 by default as window #0 is there by default. > > Signed-of

Re: [Qemu-devel] [RFC PATCH v3 09/18] spapr_rtas: Reserve DDW RTAS token numbers

2014-09-06 Thread David Gibson
On Fri, Aug 29, 2014 at 08:12:13PM +1000, Alexey Kardashevskiy wrote: > Will be squashed later. > > Signed-off-by: Alexey Kardashevskiy Reviewed-by: David Gibson -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank yo

Re: [Qemu-devel] [RFC PATCH v3 10/18] spapr_pci: Define DDW callbacks

2014-09-06 Thread David Gibson
On Fri, Aug 29, 2014 at 08:12:14PM +1000, Alexey Kardashevskiy wrote: > This adds callbacks definitions which PHB needs to implement in order to > support dynamic DMA windows (DDW). > > Will be squashed later. > > Signed-off-by: Alexey Kardashevskiy Reviewed-by: David Gibson -- David Gibson