Hello,
exists there someone who is able to commit this?
On 2014-02-14 17:22, Andreas Färber wrote:
Am 14.02.2014 17:06, schrieb Sebastian Huber:
The LEON3 processor has support for the CASA instruction which is
normally only available for SPARC V9 processors. Binutils 2.24
and GCC 4.9 will su
Ping.
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilun
Markus Armbruster writes:
> readlink() returns the number of bytes written to the buffer, and it
> doesn't write a terminating null byte. do_readlink() writes it
> itself. Overruns the buffer when readlink() filled it completely.
>
> Fix by reserving space for the null byte when calling readlin
On Sat, Feb 15, 2014 at 04:07:05PM +, Peter Maydell wrote:
<...>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 06953ac..7cbe69b 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -173,10 +173,8 @@ typedef struct CPUARMState {
> uint32_t c1_coproc; /* Coprocess
On Wed, Feb 26, 2014 at 01:56:44PM +0800, Fam Zheng wrote:
> Compiling util/modules.c with modules enabled fails now.
>
> Fix it by:
>
> 1) Add "#define CONFIG_MODULES" with --enable-modules
>
> 2) Include qemu-common.h before #ifdef testing in module.c.
>
> Signed-off-by: Fam Zheng
> ---
> s
Am 19.02.2014 07:04, schrieb Stefan Weil:
> GTK without VTE is needed for hosts which don't support VTE (for example
> all variants of MinGW), but it can also be reasonable for other hosts.
>
> Signed-off-by: Stefan Weil
> ---
> configure | 54 +-
Am 25.02.2014 09:37, schrieb Andreas Färber:
> Am 25.02.2014 00:07, schrieb Stefan Weil:
[...]
>>> I had moved the field unchanged from another header, I believe. I don't
>>> think this is a good change (assuming the Windows API is still using
>>> this type and not void*), especially since it's #if
On Wed, Feb 19, 2014 at 10:36:57AM +0100, Igor Mammedov wrote:
> On Wed, 19 Feb 2014 10:03:13 +0100
> Paolo Bonzini wrote:
>
> > 19/02/2014 08:54, Hu Tao ha scritto:
> > > Thus makes user control how to allocate memory for ram backend.
> > >
> > > Signed-off-by: Hu Tao
> > > ---
> > > backend
Compiling util/modules.c with modules enabled fails now.
Fix it by:
1) Add "#define CONFIG_MODULES" with --enable-modules
2) Include qemu-common.h before #ifdef testing in module.c.
Signed-off-by: Fam Zheng
---
scripts/create_config | 3 +++
util/module.c | 2 +-
2 files changed, 4 in
The vfio code has logic that checks if a FLR is possible and attempts it
before and after device assignment. Replacing the FLR with a bus reset
succeeds past the stuck option rom loading phase and we are able to boot
into the guest successfully which means that the first initialization
(by the hard
Comments from Alex Williamson :
> The sequence leading up to this is quite short. We do standard PCI BAR
> sizing and setup, read the ROM, then do:
>
> vfio: vfio_pci_write_config(:03:00.0, @0x78, 0x1, len=0x4)
> vfio: vfio_pci_write_config(:03:00.0, @0x80, 0x9430, len=0x4)
> vfio: vfio_p
Hello,
I'm writing a small OS for ARM cortex processors and have found it greatly
useful to test using qemu and the lm3s6965evb machine. The one peripheral
it is missing is the flash controller. I was able to add the basic
interface to mirror registers allowing to write flash words as well as
eras
Public bug reported:
With a Broadcom Corporation NetXtreme II BCM57810 10 Gigabit Ethernet
card, device assignment does not work. The guest hangs during option rom
execution. Moreover, if an attempt is made to quit qemu when the guest
is in the hung state, the card gets into an inoperable state. O
Based on the trace in the attachment, the sequence of config space
accesses leading up to the hang -
vfio: vfio_pci_write_config(:03:00.0, @0x78, 0x1, len=0x4)
vfio: vfio_pci_write_config(:03:00.0, @0x80, 0x9430, len=0x4)
vfio: vfio_pci_write_config(:03:00.0, @0x78, 0xa30c, len=0x4)
vf
It has been suggested to blacklist loading of rom for this card (and for any
other similar card that exhibit such issues) by default, a patch has been
posted upstream and is going several iterations based on reviews. The most
uptodate series is
[PATCH 0/2 v3] vfio: blacklist loading of unstable
On Tue, Feb 25, 2014 at 04:37:43PM -0800, Peter Crosthwaite wrote:
> Hi Edgar,
>
> This file is written for a very old qdev style of machine description.
> Remove by inlining all usages of its functions (which is consistent with
> the modern preference that qdev_initery should be inline and not in
I am looking into a file which is i8259.c which is basically an interrupt
controller. here in end is a function which is
static int pic_initfn(ISADevice *dev)
{
PicState *s = DO_UPCAST(PicState, dev, dev);
memory_region_init_io(&s->base_io, &pic_base_ioport_ops, s, "pic", 2);
memory_r
On Tue, Feb 25, 2014 at 03:15:53PM +0100, Paolo Bonzini wrote:
> Il 25/02/2014 11:20, Hu Tao ha scritto:
> >There is a problem that user_creatable_complete() is called before
> >adding object to "/objects" (see object_create()), which triggers a
> >assert failure when calling object_get_canonical_p
On Wed, Feb 26, 2014 at 10:49:59AM +0800, Hu Tao wrote:
> On Sat, Feb 15, 2014 at 04:07:24PM +, Peter Maydell wrote:
> > From: Rob Herring
> >
> > Add support for v8 page table walks. This supports stage 1 translations
> > for 4KB, 16KB and 64KB page sizes starting with 0 or 1 level.
> >
> >
Li Guang wrote:
Michael R. Hines wrote:
On 02/19/2014 09:00 AM, Li Guang wrote:
Hi,
mrhi...@linux.vnet.ibm.com wrote:
From: "Michael R. Hines"
This patch sets up the initial changes to the migration state
machine and prototypes to be used by the checkpointing code
to interact with the state
On Sat, Feb 15, 2014 at 04:07:24PM +, Peter Maydell wrote:
> From: Rob Herring
>
> Add support for v8 page table walks. This supports stage 1 translations
> for 4KB, 16KB and 64KB page sizes starting with 0 or 1 level.
>
> Signed-off-by: Rob Herring
> [PMM: fix style nits, fold in 16/64K pa
We basically add support for the SysBusDevice type in addition to the
existing PCIDevice support. This involves taking common code from the
existing vfio_initfn(), and putting it under a new vfio_find_get_group(),
that both vfio_initfn() and the new vfio_platform_realize() call.
Since realize() re
This is an RFC for the first step of many to enable platform device
passthrough, where a guest OS is able to directly access platform
device MMIO, DMA regions, and receive interrupts from platform devices.
The first RFC patch works around the limitation of QEMU not being able
to create platform de
This is a hack and only serves as an example of what needs to be
done to make the next RFC - add vfio-platform support - work
for development purposes on a Calxeda Midway system. We don't want
mach-virt to always create this ethernet device - DO NOT APPLY, etc.
Initial attempts to convince QEMU t
On Tue, 2014-02-25 at 06:35 -0700, Eric Blake wrote:
> On 02/25/2014 02:07 AM, Chen Fan wrote:
> > Signed-off-by: Chen Fan
> > ---
> > include/qom/node.h | 66 +++
> > qom/Makefile.objs | 2 +-
> > qom/node.c | 156
> > +
This is now obsolete - remove the header and all its inclusions.
Signed-off-by: Peter Crosthwaite
---
hw/microblaze/petalogix_ml605_mmu.c | 1 -
hw/microblaze/petalogix_s3adsp1800_mmu.c | 1 -
hw/ppc/virtex_ml507.c| 2 +-
include/hw/xilinx.h | 10
Inline the only usage of each of xilinx_axiethernet_init and
xilinx_axidma_init. Converts this init to at least a semi-recent QOM
styling.
Signed-off-by: Peter Crosthwaite
---
hw/microblaze/petalogix_ml605_mmu.c | 24 +++-
include/hw/xilinx.h | 33 ---
Inline the only usage. Converts this init to at least a semi-recent QOM
styling.
Signed-off-by: Peter Crosthwaite
---
hw/microblaze/petalogix_s3adsp1800_mmu.c | 9 -
include/hw/xilinx.h | 19 ---
2 files changed, 8 insertions(+), 20 deletions(-)
di
Inline these usages. Converts these init to at least a semi-recent QOM
styling.
Signed-off-by: Peter Crosthwaite
---
hw/microblaze/petalogix_ml605_mmu.c | 7 ++-
hw/microblaze/petalogix_s3adsp1800_mmu.c | 9 -
hw/ppc/virtex_ml507.c| 7 ++-
include/hw/
Inline these usages. Converts these init to at least a semi-recent QOM
styling.
Signed-off-by: Peter Crosthwaite
---
hw/microblaze/petalogix_ml605_mmu.c | 8 ++--
hw/microblaze/petalogix_s3adsp1800_mmu.c | 9 +++--
hw/ppc/virtex_ml507.c| 6 +-
include/hw/
Define (missing) macros for the interrupt and memory maps for the sake
of self documentation.
Signed-off-by: Peter Crosthwaite
---
I haven't converted the xilinx_foo_create usages because they will be
deleted in following patches
hw/microblaze/petalogix_ml605_mmu.c | 15 ---
1 file
Define macros for the interrupt and memory maps for the sake of self
documentation.
Signed-off-by: Peter Crosthwaite
---
I haven't converted the xilinx_foo_create usages because they will be
deleted in following patches
hw/ppc/virtex_ml507.c | 14 +++---
1 file changed, 11 insertions(+)
Define macros for the interrupt map for the sake of self documentation.
Signed-off-by: Peter Crosthwaite
---
I haven't converted the xilinx_foo_create usages because they will be
deleted in following patches
hw/microblaze/petalogix_s3adsp1800_mmu.c | 7 ++-
1 file changed, 6 insertions(+),
Hi Edgar,
This file is written for a very old qdev style of machine description.
Remove by inlining all usages of its functions (which is consistent with
the modern preference that qdev_initery should be inline and not in
cross-board helper functions).
To avoid movement of magic numbers, Define m
On Sun, Feb 16, 2014 at 2:06 AM, Peter Maydell wrote:
> The raw read and write functions were using the ARM_CP_64BIT flag in
> ri->type to determine whether to treat the register's state field as
> uint32_t or uint64_t; however AArch64 register info structs don't use
> that flag. Abstract out the
Implement the missing DMAADNH instruction. This is a minor variant
of the DMAADDH instruction, so factor out to a common implementation
for both (dmaadxh).
Signed-off-by: Peter Crosthwaite
---
changed from v1:
Type casting tweaks (PMM review)
hw/dma/pl330.c | 19 ---
1 file chan
This is the product of the data-width and the depth arguments, I.e the
depth of the FIFO is in terms of data entries and not bytes (which is
what the original implementation was suggesting). Fix.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
changed since v1:
Remove double spac
These are helpful to anyone trying to debug event sequencing.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
hw/dma/pl330.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index 8046a6f..303f8b8 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl3
As per current QOM conventions.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
hw/dma/pl330.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index a4cc6f9..8046a6f 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -227,7
Use PRI formats as appropriate rather than raw %x and %d. This fixes
debug printfery on some host platforms. Fix types of debug only
variables as appropriate.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
hw/dma/pl330.c | 26 ++
1 file changed, 14 inse
This type really should just be a regular int as no usages rely on it's
32 bitness (it's only meaningful as a bit position and not a bit mask).
This also fixes a printf which uses the variable with a regular %d.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
hw/dma/pl330.c | 2
When using event synchronisation, this particular debug printf floods.
Just delete it.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
hw/dma/pl330.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index 401399d..68adf39 100644
--- a/hw/dma/pl
Hi Peter,
Some minor fixups and tweaks to PL330.
changed since v1:
Addressed PMM review.
Regards,
Peter
Peter Crosthwaite (7):
dma/pl330: Delete overly verbose debug printf
dma/pl330: Fix misleading type
dma/pl330: printf format type sweep.
dma/pl330: Rename parent_obj
dma/pl330: Add
Setting opts before the realize property is set allows the
following patch to make decisions based on whether the user
specified "rombar". This also avoids having to create a new
tristate property especially for this purpose
Reviewed-by: Andreas Färber
Signed-off-by: Bandan Das
---
qdev-monitor
Certain cards such as the Broadcom BCM57810 have rom quirks
that exhibit unstable system behavior duing device assignment. In
the particular case of 57810, rom execution hangs and if a FLR
follows, the device becomes inoperable until a power cycle. This
change blacklists loading of rom for such car
v4:
1. Short Description of the issue in comments, pointer
to qemu bug tracker in 2/2
2. Remove unnecessary check on rom_bar in vfio_pci_size_rom 2/2
3. No changes to 1/2 - Andreas, I have retained your "Reviewed-by"
since the code hasn't changed.
v3:
1. Change the "force" logic to depend on wheth
On Sun, Feb 16, 2014 at 2:07 AM, Peter Maydell wrote:
> Emit the correct MMU index information for loads and stores from
> A64 code, rather than hardwiring it to "always kernel mode",
> by storing the exception level in the TB flags, and make
> cpu_mmu_index() return the right answer when the CPU
On Tue, Feb 25, 2014 at 06:46:32PM +1000, Peter Crosthwaite wrote:
> Ping!
>
Hi Peter,
Can you please repost path nr 3, it never reached me. I'll give it
a testrun and apply.
Thanks,
Edgar
> On Thu, Feb 13, 2014 at 9:21 AM, Peter Crosthwaite
> wrote:
> > Hi Edgar,
> >
> > This file is writte
On Sun, Feb 16, 2014 at 2:07 AM, Peter Maydell wrote:
> To avoid complication in code that otherwise would not need to
> care about whether EL1 is AArch32 or AArch64, we should store
> the interrupt mask bits (CPSR.AIF in AArch32 and PSTATE.DAIF
> in AArch64) in one place consistently regardless o
On Sun, Feb 16, 2014 at 2:07 AM, Peter Maydell wrote:
> Implement the WFI instruction for A64; this just involves wiring
> up the instruction, and adding a gen_a64_set_pc_im() which was
> accidentally omitted from the A64 decoder top loop.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Peter Cros
On 02/25/2014 01:25 PM, Tom Musta wrote:
> Per Richard Henderson's review, the array of masks used in the
> vgbbd instruction should be declared as static const.
>
> Signed-off-by: Tom Musta
> ---
> target-ppc/int_helper.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
Reviewed-b
Per Richard Henderson's review, the array of masks used in the
vgbbd instruction should be declared as static const.
Signed-off-by: Tom Musta
---
target-ppc/int_helper.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
in
On 25/02/14 20:34, Andreas Färber wrote:
> Hi,
>
> Am 25.02.2014 20:15, schrieb Christian Borntraeger:
>> On 25/02/14 15:34, Jason J. Herne wrote:
>>
>>> Christian, at one point you mentioned that it might be helpful to see this
>>> patch in the context of the rest of the hotplug patches. If you
On 15 February 2014 16:06, Peter Maydell wrote:
> Here's the latest patchset aimed towards implementing AArch64
> system emulation.
> Peter Maydell (30):
> target-arm: Fix raw read and write functions on AArch64 registers
> target-arm: A64: Make cache ID registers visible to AArch64
> targe
On 25 February 2014 09:32, Will Newton wrote:
> Add support for AArch32 CRC32 and CRC32C instructions added in ARMv8.
> The CRC32-C implementation used is the built-in qemu implementation
> and The CRC-32 implementation is from zlib. This requires adding zlib
> to LIBS to ensure it is linked for t
Hi,
Am 25.02.2014 20:15, schrieb Christian Borntraeger:
> On 25/02/14 15:34, Jason J. Herne wrote:
>
>> Christian, at one point you mentioned that it might be helpful to see this
>> patch in the context of the rest of the hotplug patches. If you still feel
>> this way let me know and I'll post
On 25/02/14 15:34, Jason J. Herne wrote:
> Christian, at one point you mentioned that it might be helpful to see this
> patch in the context of the rest of the hotplug patches. If you still feel
> this way let me know and I'll post the 4-patch series. If not, I still
> propose this one for s390
The most recent mailing list discussion about the problem is here:
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-December/219176.html
It does not look likely that there will be a fix soon: it's complicated
(and the suggestion to inject a data abort has been rejected), and it
only affe
On 25 February 2014 16:42, Peter Maydell wrote:
> On 25 February 2014 16:36, Paolo Bonzini wrote:
>> gmodule-2.0's pkg-config files include -Wl,--export-dynamic, which breaks
>> static builds. It is a glib bug, but we need to support --static builds for
>> the linux-user targets, and in the end
On 25 February 2014 18:52, Juan Quintela wrote:
> BTW, did you find this bug by testing or by code inspection?
Trying a KVM<->TCG migration of an ARM guest will likely
hit the bug (because the number of coprocessor registers
on either end differs).
thanks
-- PMM
Alvise Rigo wrote:
> The method is not behaving in the way it's supposed to. It should return
> the new value only if it's less than the actual one.
>
> Signed-off-by: Alvise Rigo
See David patch of this function. There were a bug, we were doing the
wrong comparison. But we expect not to chang
A workaround that we used was to rename dmidecode to /bin/true and .make
it persistent. dpkg-divert --local --divert /path/dmidecode --rename
--add /bin/true. But that is just a workaround, any code that maps()
/dev/mem can cause these crashes. Is there a fix for this in the horizon
?
--
You rec
gcc's C++ compiler complains about being passed some -W options
which make sense for C but not for C++. This means we mustn't try
a C++ compile with QEMU_CFLAGS, but only with a filtered version
that removes the offending options. This filtering was already being
done for uses of C++ in the build i
Am 25.02.2014 09:01, schrieb Andreas Färber:
> Hi,
>
> Am 24.02.2014 20:08, schrieb Romain Dolbeau:
[...]
>> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
>> index 4e0701d..07c8cdd 100644
>> --- a/hw/pci/pci.c
>> +++ b/hw/pci/pci.c
>> @@ -1572,6 +1572,9 @@ static const char * const pci_nic_models[] = {
On 25 February 2014 16:52, Alvise Rigo wrote:
> CPUARMState:
> * added adfsr cp register.
> * added aifsr cp register.
> These registers have been added because they are migrated by KVM. This
> prevents
> the migration from failing when trying to copy their values.
This should be done in a separ
On 25 February 2014 16:52, Alvise Rigo wrote:
> Since the irq bit seems to not be updated, exclude it from the check done
> while copying data during migration.
>
> Signed-off-by: Alvise Rigo
> ---
> target-arm/cpu.c | 22 ++
> 1 file changed, 18 insertions(+), 4 deletions(-)
On 25 February 2014 16:52, Alvise Rigo wrote:
> The value of this flag indicates the execution mode of the CPU prior the
> migration. It is used to handle the KVM <-> TCG migration.
>
> Signed-off-by: Alvise Rigo
> ---
> target-arm/cpu-qom.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --
On 25 February 2014 16:52, Alvise Rigo wrote:
> The method is not behaving in the way it's supposed to. It should return
> the new value only if it's less than the actual one.
>
> Signed-off-by: Alvise Rigo
This clashes with David Gilbert's patch to this function:
http://patchwork.ozlabs.org/pa
On Tue, Feb 25, 2014 at 05:52:47PM +0100, Alvise Rigo wrote:
> The method is not behaving in the way it's supposed to. It should return
> the new value only if it's less than the actual one.
>
> Signed-off-by: Alvise Rigo
> ---
> vmstate.c | 8
> 1 file changed, 4 insertions(+), 4 delet
Add a new interface to register/deregister sources of adapter interrupts
identified by an unique id via the flic. Adapters may also be maskable
and carry a list of pinned pages.
These adapters will be used by irq routing later.
Signed-off-by: Cornelia Huck
---
Documentation/virtual/kvm/devices/
Hi,
here's my current patchset enabling irqfds for s390, based on current
kvm/queue.
It introduces adapter interrupts for virtio-ccw (these have been specced
for virtio-1.0 in the virtio oasis standard that is currently under work).
We use two-staged indicators for the queue indicator area (summa
On 02/25/2014 10:19 AM, Stefan Hajnoczi wrote:
> The "query-iothreads" command returns a list of information about
> iothreads. See the patch for API documentation.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> iothread.c | 36
> qapi-schema.json | 29 +++
The maximum number for irq routes is currently 1024, which is a bit on
the small size for s390: We support up to 4 x 64k virtual devices with
up to 64 queues, and we need one route for each of the queues if we want
to operate it via irqfd.
Let's bump this to 4k on s390 for now, as this at least co
On 02/25/2014 10:19 AM, Stefan Hajnoczi wrote:
> Keep the thread ID around so we can report it via QMP.
>
> There's only one problem: qemu_get_thread_id() (gettid() wrapper on
> Linux) must be called from the thread itself. There is no way to get
> the thread ID outside the thread.
>
> This patc
Make code using the same indicators point to a single allocated structure
that is freed when the last user goes away.
This will be used by the irqfd code to unmap addresses after the last user
is gone.
Reviewed-by: Thomas Huth
Signed-off-by: Cornelia Huck
---
hw/s390x/virtio-ccw.c | 80 +
Make use of the new s390 adapter irq routing support to enable real
in-kernel irqfds for virtio-ccw with adapter interrupts.
Note that s390 doesn't provide the common KVM_CAP_IRQCHIP capability, but
rather needs KVM_CAP_S390_IRQCHIP to be enabled. This is to ensure backward
compatibility.
Reviewe
Provide helper functions for enabling capabilities (on a vcpu and on a vm).
Reviewed-by: Thomas Huth
Signed-off-by: Cornelia Huck
---
include/sysemu/kvm.h |4
kvm-all.c| 19 ++-
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/include/sysemu/
Register an I/O adapter interrupt source for when virtio-ccw devices start
using adapter interrupts.
Reviewed-by: Thomas Huth
Signed-off-by: Cornelia Huck
---
hw/intc/s390_flic.c | 66 +
hw/s390x/css.c| 51 +++
Per-vm capability enablement, adapter interrupt sources, irq routing on s390.
Reviewed-by: Thomas Huth
Signed-off-by: Cornelia Huck
---
linux-headers/asm-s390/kvm.h | 22 ++
linux-headers/linux/kvm.h| 16
2 files changed, 38 insertions(+)
diff --git
Hi,
here's the companion patchset to "KVM: irqfds for s390", based on
Christian's s390-next branch.
Patch 1 adds support for adapter interrupts to virtio-ccw. This has been
posted before, modulo some fixes.
Patch 2 grabs the interfaces introduced by the kernel patchset. Will be
replaced by a nor
When registering a new irqfd, we call its ->poll method to collect any
event that might have previously been pending so that we can trigger it.
This is done under the kvm->irqfds.lock, which means the eventfd's ctx
lock is taken under it.
However, if we get a POLLHUP in irqfd_wakeup, we will be ca
Introduce a new interrupt class for s390 adapter interrupts and enable
irqfds for s390.
This is depending on a new s390 specific vm capability, KVM_CAP_S390_IRQCHIP,
that needs to be enabled by userspace.
Signed-off-by: Cornelia Huck
---
Documentation/virtual/kvm/api.txt | 21 ++
From: Martin Schwidefsky
Add airq_iv_alloc and airq_iv_free to allocate and free consecutive
ranges of irqs from the interrupt vector.
Signed-off-by: Martin Schwidefsky
Signed-off-by: Cornelia Huck
---
arch/s390/include/asm/airq.h | 14 +++--
drivers/s390/cio/airq.c | 66
Handle the new CCW_CMD_SET_IND_ADAPTER command enabling adapter interrupts
on guest request. When active, host->guest notifications will be handled
via global_indicator -> queue indicators instead of queue indicators +
subchannel I/O interrupt. Indicators for virtqueues may be present at an
offset.
Allow KVM_ENABLE_CAP to act on a vm as well as on a vcpu. This makes more
sense when the caller wants to enable a vm-related capability.
s390 will be the first user; wire it up.
Reviewed-by: Thomas Huth
Signed-off-by: Cornelia Huck
---
Documentation/virtual/kvm/api.txt |6 --
arch/s390
Implement the new CCW_CMD_SET_IND_ADAPTER command and try to enable
adapter interrupts for every device on the first startup. If the host
does not support adapter interrupts, fall back to normal I/O interrupts.
virtio-ccw adapter interrupts use the same isc as normal I/O subchannels
and share a su
The "query-iothreads" command returns a list of information about
iothreads. See the patch for API documentation.
Signed-off-by: Stefan Hajnoczi
---
iothread.c | 36
qapi-schema.json | 29 +
qmp-commands.hx | 39 +++
Keep the thread ID around so we can report it via QMP.
There's only one problem: qemu_get_thread_id() (gettid() wrapper on
Linux) must be called from the thread itself. There is no way to get
the thread ID outside the thread.
This patch uses a condvar to wait for iothread_run() to populate the
t
v2:
* Use "thread-id" instead of "thread_id" in QAPI [eblake]
* Avoid mutex unlock/destroy race between threads [pbonzini]
This series applies on top of "[PATCH v4 0/6] dataplane: switch to N:M
devices-per-thread model".
The new "query-iothreads" command allows QMP clients to fetch the thread I
On 2014-02-25 15:54:37 +, Alex Bennée wrote:
>
> >> Feedback I'm interested in
> >> ==
> >>
> >> * Any instruction failure (please include the log line with the
> >> unsupported message)
> >
> > Neon support is not complete enough to run the hand written neon
> > assem
Am 25.02.2014 14:41, schrieb Kevin Wolf:
> Am 24.02.2014 um 14:01 hat Peter Lieven geschrieben:
>> On 24.02.2014 11:38, Paolo Bonzini wrote:
>>> Il 24/02/2014 11:26, Peter Lieven ha scritto:
I personally do not need this for QCOW2 but for iSCSI. Here the
optimization
is basically sa
On 24 February 2014 19:08, Peter Maydell wrote:
> gcc's C++ compiler complains about being passed some -W options
> which make sense for C but not for C++. This means we mustn't try
> a C++ compile with QEMU_CFLAGS, but only with a filtered version
> that removes the offending options. This filter
CPUARMState:
* added adfsr cp register.
* added aifsr cp register.
These registers have been added because they are migrated by KVM. This prevents
the migration from failing when trying to copy their values.
ARMCPRegInfo:
* added a pointer to the parent that generated the register (if any).
* a fl
QEMU at the moment doesn't allow the migration between KVM and TCG, in
both directions. This limitation is due first of all to the different set
of coprocessor registers supported by KVM and TCG, but also in the way
the coprocessors values are copied from the incoming data to the local QEMU
structu
Since the irq bit seems to not be updated, exclude it from the check done
while copying data during migration.
Signed-off-by: Alvise Rigo
---
target-arm/cpu.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 6e7
The value of this flag indicates the execution mode of the CPU prior the
migration. It is used to handle the KVM <-> TCG migration.
Signed-off-by: Alvise Rigo
---
target-arm/cpu-qom.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index afbd422
The method is not behaving in the way it's supposed to. It should return
the new value only if it's less than the actual one.
Signed-off-by: Alvise Rigo
---
vmstate.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/vmstate.c b/vmstate.c
index 284b080..038b274 100644
-
Alex Williamson writes:
> On Mon, 2014-02-24 at 23:34 -0500, Bandan Das wrote:
>> Certain cards such as the Broadcom BCM57810 have rom quirks
>> that exhibit unstable system behavior duing device assignment. In
>> the particular case of 57810, rom execution hangs and if a FLR
>> follows, the devi
On 25 February 2014 16:36, Paolo Bonzini wrote:
> gmodule-2.0's pkg-config files include -Wl,--export-dynamic, which breaks
> static builds. It is a glib bug, but we need to support --static builds for
> the linux-user targets, and in the end all that is needed to fix this is:
>
> * outlaw --enab
Il 25/02/2014 17:25, Alex Bligh ha scritto:
I'm generally in favour of this patch set or something like it. It's
nicely constrained to 2 include files. It appears to touch no code.
And it appears to makes things tidier.
Stefan / Paolo? If you agree I will review in greater detail.
Sure, any h
1 - 100 of 237 matches
Mail list logo
