Signed-off-by: liguang
---
exec.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/exec.c b/exec.c
index 3ca9381..2170295 100644
--- a/exec.c
+++ b/exec.c
@@ -1824,7 +1824,9 @@ static void memory_map_init(void)
address_space_init(&address_space_io, system_io, "I/O"
在 2013-09-04三的 08:23 +0200，Paolo Bonzini写道：
> Il 04/09/2013 03:07, Li Guang ha scritto:
> > 在 2013-09-03二的 10:39 +0200，Andreas Färber写道：
> >> Am 03.09.2013 08:59, schrieb liguang:
> >>> Signed-off-by: liguang
> >>> ---
> >>> exec.c |4 +++-
> >>> 1 files changed, 3 insertions(+), 1 deletions(
Il 04/09/2013 03:07, Li Guang ha scritto:
> 在 2013-09-03二的 10:39 +0200，Andreas Färber写道：
>> Am 03.09.2013 08:59, schrieb liguang:
>>> Signed-off-by: liguang
>>> ---
>>> exec.c |4 +++-
>>> 1 files changed, 3 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/exec.c b/exec.c
>>> index 3ca9381.
On Wed, Sep 4, 2013 at 3:21 PM, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov
> ---
> hw/arm/digic.c | 25 ++
> hw/timer/Makefile.objs | 1 +
> hw/timer/digic-timer.c | 122
> +
> hw/timer/digic-timer.h | 19
> i
Il 04/09/2013 00:29, Hervé Poussineau ha scritto:
> While ISA address space in prep machine is currently the one returned
> by get_system_io(), this depends of the implementation of i82378/raven
> devices, and this may not be the case forever.
>
> Use the right ISA address space when adding some m
Il 04/09/2013 00:29, Hervé Poussineau ha scritto:
> PCI I/O region is 0x3f80 bytes starting at 0x8000.
> Do not use global QEMU I/O region, which is only 64KB.
You can make the global QEMU I/O region larger, that's not a problem.
Not using address_space_io is fine as well, but it's a sepa
On Tue, Sep 3, 2013 at 7:17 PM, Paolo Bonzini wrote:
> Il 02/09/2013 09:06, Liu Ping Fan ha scritto:
>> note: I rebase it onto Stefan's net-next tree, since pc-1.7 has already been
>> defined there.
>>
>> v4:
>> use standard compat property to set hpet's interrupt compatibility
>>
>> v3:
>> c
Signed-off-by: Antony Pavlov
---
hw/arm/digic_boards.c | 74 +++
1 file changed, 74 insertions(+)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 0b99227..b5a9e1a 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -1
Signed-off-by: Antony Pavlov
---
hw/arm/digic.c | 14
hw/char/Makefile.objs | 1 +
hw/char/digic-uart.c | 197 +
hw/char/digic-uart.h | 27 +++
include/hw/arm/digic.h | 4 +
5 files changed, 243 insertions(+)
create mode
Signed-off-by: Antony Pavlov
---
hw/arm/digic.c | 25 ++
hw/timer/Makefile.objs | 1 +
hw/timer/digic-timer.c | 122 +
hw/timer/digic-timer.h | 19
include/hw/arm/digic.h | 7 +++
5 files changed, 174 insertions(+)
cr
Also this patch adds initial support for Canon
PowerShot A1100 IS compact camera.
Signed-off-by: Antony Pavlov
---
hw/arm/Makefile.objs | 2 +-
hw/arm/digic_boards.c | 63 +++
2 files changed, 64 insertions(+), 1 deletion(-)
create mode 100644 h
DIGIC is Canon Inc.'s name for a family of SoC
for digital cameras and camcorders.
There is no publicly available specification for
DIGIC chips. All information about DIGIC chip
internals is based on reverse engineering efforts
made by CHDK (http://chdk.wikia.com) and
Magic Lantern (http://www.mag
[RFC v3 1/5] hw/arm: add very initial support for Canon DIGIC SoC
[RFC v3 2/5] hw/arm/digic: prepare DIGIC-based boards support
[RFC v3 3/5] hw/arm/digic: add timer support
[RFC v3 4/5] hw/arm/digic: add UART support
[RFC v3 5/5] hw/arm/digic: add NOR ROM support
Changes since v2:
1. rebase ove
This adds version supporting macros VMSTATE_STRUCT_POINTER_TEST_V
and VMSTATE_STRUCT_POINTER_V in addition to the already existing
VMSTATE_STRUCT_POINTER and VMSTATE_STRUCT_POINTER_TEST macros.
Cc: Andreas Färber
Signed-off-by: Alexey Kardashevskiy
---
include/migration/vmstate.h | 17 +
On 2013-9-3 13:38, Lei Li wrote:
> On 09/03/2013 12:20 PM, Frank Yang wrote:
>> Yes, it depends on low-level implementation. During my earlier test,
>
> What do you mean by the 'it depends on low-level implementation'? Do you test
> it with IB or Ethernet?
I've tested both IB(40 GigE) and Ethernet
Dear qemuers:
my qemu-kvm version is 1.0.1
I would like to figure out the qemu disk cache mode. I have visited the
qemu-options.hx
there is two cache that I didn't understand: the host cache page and the qemu
disk write cache.
Is "host page cache" only used for read. and "qemu disk write cache"
On 2013-9-3 22:13, Michael R. Hines wrote:
>
> No top-posting, please.
>
> On 09/03/2013 12:20 AM, Frank Yang wrote:
>> Yes, it depends on low-level implementation. During my earlier test,
>> using one CQ to send and receive may cause packet loss with heavy load:
>> the destination thinks it send R
On 09/04/2013 09:49 AM, Eduardo Habkost wrote:
> On Fri, Aug 30, 2013 at 11:10:41AM +0800, Wanlong Gao wrote:
>> Change -numa option like following as Paolo suggested:
>> -numa node,nodeid=0,cpus=0-1 \
>> -numa mem,nodeid=0,size=1G
>>
>> This new option will make later coming memory hotplug
On 08/30/2013 03:28 PM, Alexey Kardashevskiy wrote:
> Yet another try with XICS and XICS-KVM.
>
> v3->v4:
> Addressed multiple comments from Alex;
> Split out many tiny patches to make them easier to review;
> Fixed xics_cpu_setup not to call the parent;
> And many, many small changes.
>
> v2->v3
On 2013-9-3 13:03, Lei Li wrote:
> Hi Frank,
>
> I failed to apply this patch. Please make sure to use git-send-email,
> otherwise
> it's a little hard to review. :)
>
> On 08/30/2013 08:39 PM, Frank Yang wrote:
>> When several VMs migrate with RDMA at the same time, the increased pressure
>> cau
On 09/04/2013 10:28 AM, Eduardo Habkost wrote:
> On Fri, Aug 30, 2013 at 11:10:45AM +0800, Wanlong Gao wrote:
>> The memory policy setting format is like:
>>
>> policy={default|membind|interleave|preferred}[,relative=true],host-nodes=N-N
>> And we are adding this setting as a suboption of "-nu
Signed-off-by: Isaku Yamahata
---
migration-rdma.c | 23 +++
1 file changed, 7 insertions(+), 16 deletions(-)
diff --git a/migration-rdma.c b/migration-rdma.c
index db5a908..941c07e 100644
--- a/migration-rdma.c
+++ b/migration-rdma.c
@@ -1128,8 +1128,7 @@ static int qemu_r
Signed-off-by: Isaku Yamahata
---
migration-rdma.c |8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/migration-rdma.c b/migration-rdma.c
index e71c10a..db5a908 100644
--- a/migration-rdma.c
+++ b/migration-rdma.c
@@ -511,19 +511,21 @@ static int qemu_rdma_exchange_sen
On Fri, Aug 30, 2013 at 11:10:45AM +0800, Wanlong Gao wrote:
> The memory policy setting format is like:
>
> policy={default|membind|interleave|preferred}[,relative=true],host-nodes=N-N
> And we are adding this setting as a suboption of "-numa mem,",
> the memory policy then can be set like fo
On Fri, Aug 30, 2013 at 11:10:41AM +0800, Wanlong Gao wrote:
> Change -numa option like following as Paolo suggested:
> -numa node,nodeid=0,cpus=0-1 \
> -numa mem,nodeid=0,size=1G
>
> This new option will make later coming memory hotplug better.
> And this new option is implemented using O
在 2013-09-03二的 18:54 +0200，Andreas Färber写道：
> Am 03.09.2013 13:17, schrieb Michael Tokarev:
> > 03.09.2013 12:35, Andreas Färber wrote:
> >> I also don't understand why qemu-trivial is suddenly picking up Stefan's
> >> arm translation patch, it used to be for unmaintained areas only. But
> >> arm
On 04.09.2013, at 03:13, Alexey Kardashevskiy wrote:
> On 09/03/2013 07:22 PM, Andreas Färber wrote:
>> Am 03.09.2013 11:07, schrieb Alexey Kardashevskiy:
>>> On 09/03/2013 06:42 PM, Andreas Färber wrote:
Am 03.09.2013 09:31, schrieb Alexey Kardashevskiy:
> diff --git a/target-ppc/machin
On 09/03/2013 07:22 PM, Andreas Färber wrote:
> Am 03.09.2013 11:07, schrieb Alexey Kardashevskiy:
>> On 09/03/2013 06:42 PM, Andreas Färber wrote:
>>> Am 03.09.2013 09:31, schrieb Alexey Kardashevskiy:
diff --git a/target-ppc/machine.c b/target-ppc/machine.c
index 12e1512..d1ffc7f 100644
在 2013-09-03二的 10:39 +0200，Andreas Färber写道：
> Am 03.09.2013 08:59, schrieb liguang:
> > Signed-off-by: liguang
> > ---
> > exec.c |4 +++-
> > 1 files changed, 3 insertions(+), 1 deletions(-)
> >
> > diff --git a/exec.c b/exec.c
> > index 3ca9381..4509daa 100644
> > --- a/exec.c
> > +++ b/e
PCI I/O region is 0x3f80 bytes starting at 0x8000.
Do not use global QEMU I/O region, which is only 64KB.
Signed-off-by: Hervé Poussineau
---
hw/pci-host/prep.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
i
PCI memory region is 0x3f00 bytes starting at 0xc000.
However, keep compatibility with Open Hack'Ware expectations
by adding a hack for Open Hack'Ware display.
Signed-off-by: Hervé Poussineau
---
hw/pci-host/prep.c |9 ++---
hw/ppc/prep.c |9 +
2 files changed,
Signed-off-by: Hervé Poussineau
---
hw/pci-host/prep.c | 40 +---
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 38df10c..0de835a 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -69,7
Remove now duplicated code from prep board.
Signed-off-by: Hervé Poussineau
---
hw/pci-host/prep.c | 82 +
hw/ppc/prep.c | 94 ++--
2 files changed, 85 insertions(+), 91 deletions(-)
diff --git
This has been tested on Linux 2.4/PPC with the lsi53c895a SCSI adapter.
Signed-off-by: Hervé Poussineau
---
hw/pci-host/prep.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index bba76af..3baf66f 100644
--- a/hw/pci-host/pr
Signed-off-by: Hervé Poussineau
---
hw/pci-host/prep.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index db03adc..38df10c 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -222,12 +222,12 @@ static void raven_pci
While ISA address space in prep machine is currently the one returned
by get_system_io(), this depends of the implementation of i82378/raven
devices, and this may not be the case forever.
Use the right ISA address space when adding some more ports to it.
We can use whatever ISA device on the right
Regions added in next patches will also have the pci_ prefix.
Signed-off-by: Hervé Poussineau
---
hw/pci-host/prep.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 25baef1..95fa2ea 100644
--- a/hw/pci-host/prep.c
+++ b/
Raven datasheet explains where firmware lives in system memory, so do
it there instead of in board code. Other boards using the same PCI
host will not have to copy the firmware loading code.
However, add a specific hack for Open Hack'Ware, which provides only
a 512KB blob to be loaded at 0xfff
This patchset improves Raven PCI host emulation, found in some PPC platforms,
like the QEMU 'prep' one, and for example the IBM RS/6000 40p.
Some features added to raven emulation were already present in prep board
(non contiguous I/O, firmware loading), while some other are new (PCI bus
mastering
Signed-off-by: Hervé Poussineau
---
hw/pci-host/prep.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index e120058..557486e 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -47,7 +47,7 @@ typedef struct PRePPCIState
In preperation for vhdx_create(), move more endian translation
functions out to vhdx-endian.c.
Signed-off-by: Jeff Cody
---
block/vhdx-endian.c | 75 +
block/vhdx.c| 20 +++---
block/vhdx.h| 9 ++-
3 files changed,
From: Alexander Graf
We will need to share the disassembly status struct between AArch32 and
AArch64 modes. So put it into a header file that both sides can use.
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
Message-id: 1368505980-17151-2-git-send-email-john.ri...@linaro.org
Signed-o
On 09/03/2013 04:05 PM, Eduardo Otubo wrote:
On 09/03/2013 03:02 PM, Corey Bryant wrote:
On 08/30/2013 10:21 AM, Eduardo Otubo wrote:
On 08/29/2013 05:34 AM, Stefan Hajnoczi wrote:
On Wed, Aug 28, 2013 at 10:04:32PM -0300, Eduardo Otubo wrote:
Now there's a second whitelist, right bef
This patch series contains the initial VHDX log parsing, replay,
and write support. (New with v4: VHDX image file creation)
=== v5 changes ===
v5 is also available for testing from:
https://github.com/codyprime/qemu-kvm-jtc/tree/vhdx-write-v5-upstream
Most of the patches from v4 -> v5 are the s
This adds support for writing to VHDX image files, using coroutines.
Writes into the BAT table goes through the VHDX log. Currently, BAT
table writes occur when expanding a dynamic VHDX file, and allocating a
new BAT entry.
Signed-off-by: Jeff Cody
---
block/vhdx.c | 150 +++
This is preperation for vhdx_create(). The ability to write headers,
and calculate the number of BAT entries will be needed within the
create() functions, so move this relevant code into helper functions.
Signed-off-by: Jeff Cody
---
block/vhdx.c | 121 +++---
Allow tracking of first file write in the VHDX image, as well as
the ability to update the GUID in the header. This is in preparation
for log support.
Signed-off-by: Jeff Cody
---
block/vhdx.c | 30 --
block/vhdx.h | 6 ++
2 files changed, 30 insertions(+), 6 de
Bit shifting can be fun, but in this case it was unnecessary. The
upper 44 bits of the 64-bit BAT entry is specifies the File Offset,
so we shifted the bits to get access to the value.
However, per the spec the value is in MB. So we dutifully shifted back
to the left by 20 bits, to convert to a
Regions in the image file cannot overlap - the log, region tables,
and metdata must all be unique and non-overlapping.
This adds region checking by means of a QLIST; there can be a variable
number of regions and metadata (there may be metadata or region tables
that we do not recognize / know about
This adds some magic number defines, and internal structure definitions
for VHDX log replay support. The struct VHDXLogEntries does not reflect
an on-disk data structure, and thus does not need to be packed.
Some minor code style fixes are applied as well.
Signed-off-by: Jeff Cody
---
block/vh
Just a couple of minor comments to help note where allocated
buffers are freed, and a typo fix.
Signed-off-by: Jeff Cody
---
block/vhdx.c | 6 --
block/vhdx.h | 6 +++---
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/block/vhdx.c b/block/vhdx.c
index e9704b1..56bc88e 100644
Signed-off-by: Jeff Cody
---
block/vhdx.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/block/vhdx.c b/block/vhdx.c
index 4dc056b..9db6531 100644
--- a/block/vhdx.c
+++ b/block/vhdx.c
@@ -777,6 +777,15 @@ exit:
}
+static void vhdx_close(BlockDriverSt
On Tuesday, September 03, 2013 05:07:53 PM Eduardo Otubo wrote:
> On 09/03/2013 03:21 PM, Paul Moore wrote:
> > On Tuesday, September 03, 2013 02:08:28 PM Corey Bryant wrote:
> >> On 09/03/2013 02:02 PM, Corey Bryant wrote:
> >>> On 08/30/2013 10:21 AM, Eduardo Otubo wrote:
> On 08/29/2013 05:
This adds the ability to update the headers in a VHDX image, including
generating a new MS-compatible GUID.
As VHDX depends on uuid.h, VHDX is now a configurable build option. If
VHDX support is enabled, that will also enable uuid as well. The
default is to have VHDX enabled.
To enable/disable
VHDXPage83Data and VHDXParentLocatorHeader both incorrectly had their
MSGUID fields set as arrays of 16. This is incorrect (it stems from
an early version where those fields were uint_8 arrays). Those fields
were, up to this patch, unused.
Also, there were a couple of typos and incorrect wording
This patchset is v6 of the "preparation patchset" that started
off with Alex, was passed to John Rigby and now to me.
*** I plan to commit these patches (except the configs
*** patches which actually enable the aarch64 targets)
*** to target-arm.next unless there are issues raised in
*** review of
In preparation for VHDX log support, move these structures to the
header.
Signed-off-by: Jeff Cody
---
block/vhdx.c | 51 ---
block/vhdx.h | 47 +++
2 files changed, 47 insertions(+), 51 deletions(-)
dif
This adds support for writing to the VHDX log.
For spec details, see VHDX Specification Format v1.00:
https://www.microsoft.com/en-us/download/details.aspx?id=34750
There are a few limitations to this log support:
1.) There is no caching yet
2.) The log is flushed after each entry
The primary wr
This adds support for VHDX v0 logs, as specified in Microsoft's
VHDX Specification Format v1.00:
https://www.microsoft.com/en-us/download/details.aspx?id=34750
The following support is added:
* Log parsing, and validation - validate that an existing log
is correct.
* Log search - search throug
On 09/03/2013 03:21 PM, Paul Moore wrote:
On Tuesday, September 03, 2013 02:08:28 PM Corey Bryant wrote:
On 09/03/2013 02:02 PM, Corey Bryant wrote:
On 08/30/2013 10:21 AM, Eduardo Otubo wrote:
On 08/29/2013 05:34 AM, Stefan Hajnoczi wrote:
On Wed, Aug 28, 2013 at 10:04:32PM -0300, Eduardo
On 09/03/2013 03:02 PM, Corey Bryant wrote:
On 08/30/2013 10:21 AM, Eduardo Otubo wrote:
On 08/29/2013 05:34 AM, Stefan Hajnoczi wrote:
On Wed, Aug 28, 2013 at 10:04:32PM -0300, Eduardo Otubo wrote:
Now there's a second whitelist, right before the vcpu starts. The
second
whitelist is the
This moves the endian translation functions out from the vhdx.c source,
into a separate source file. In addition to the previously defined
endian functions, new endian translation functions for log support are
added as well.
Signed-off-by: Jeff Cody
---
block/Makefile.objs | 2 +-
block/vhdx-e
This adds support for VHDX image creation, for images of type "Fixed"
and "Dynamic". "Differencing" types (i.e., VHDX images with backing
files) are currently not supported.
Options for image creation include:
* log size:
The size of the journaling log for VHDX. Minimum is 1MB,
Create a new AArch64CPU class; all 64-bit capable ARM
CPUs are subclasses of this. (Currently we only support
one, the "any" CPU used by linux-user.)
Signed-off-by: Peter Maydell
---
target-arm/Makefile.objs |1 +
target-arm/cpu-qom.h | 12 +
target-arm/cpu64.c | 111 +++
From: Alexander Graf
Add the necessary code to configure to handle AArch64 as a target
CPU (we already have some code for supporting it as host). Note
that this doesn't enable the AArch64 targets yet.
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
Message-id: 1368505980-17151-12-git-s
From: Alexander Graf
The AArch64 syscall definitions are all publicly available in the Linux
kernel. Let's add them to our linux-user emulation target, so that we
can easily handle AArch64 syscalls.
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
Message-id: 1368505980-17151-8-git-send
From: Andreas Schwab
This patch adds signal handling for AArch64. The code is based on the
respective source in the Linux kernel.
Signed-off-by: Andreas Schwab
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
Message-id: 1368505980-17151-10-git-send-email-john.ri...@linaro.org
[PMM: fi
AArch32 code (ie traditional 32 bit world) expects to be
able to pass a vaddr in a TCGv_i32. However when QEMU is
compiled with TARGET_LONG_BITS=32 the TCG load/store
functions take a TCGv_i64. Abstract out load/store with
a 32 bit vaddr so we have a place to put the zero extension
of the vaddr and
For newer target architectures, glibc can be picky about the kernel
version: for example, it will not run on an aarch64 system unless
the kernel reports itself as at least 3.8.0. Accommodate this by
enhancing the existing support for faking the kernel version so
that each target can optionally spec
From: Alexander Graf
Add the AArch64 termbits.h with all the target's termios related
constants and structures.
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
[PMM: split out from another patch]
Signed-off-by: Peter Maydell
---
linux-user/aarch64/termbits.h | 220 ++
From: Alexander Graf
This patch adds all the prerequisites for AArch64 support that didn't
fit into split up patches. It extends important bits in the core cpu
headers to also take AArch64 mode into account.
Add new ARM_TBFLAG_AARCH64_STATE translation buffer flag
indicate an ARMv8 cpu running i
From: Alexander Graf
We should translate AArch64 mode separately from AArch32 mode. In AArch64 mode,
registers look vastly different, instruction encoding is completely different,
basically the system turns into a different machine.
So let's do a simple if() in translate.c to decide whether we c
From: Alexander Graf
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
[PMM: pulled out from another patch; don't use is_a64() here;
moved to linux-user from target-arm]
Signed-off-by: Peter Maydell
---
linux-user/aarch64/target_cpu.h | 35 +++
1 file
Add the main linux-user cpu loop for AArch64. Since AArch64
has a different system call interface, doesn't need to worry
about FPA emulation and may in the future keep the prefetch/data
abort information in different system registers, it's simplest
just to use a completely separate loop from the 32
From: Alexander Graf
We want to be able to debug AArch64 guests. So let's add the respective gdb
stub functions and xml descriptions that allow us to do so.
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
Message-id: 1368505980-17151-6-git-send-email-john.ri...@linaro.org
[PMM: dropped
From: Alexander Graf
The cpu_env tcg variable will be used by both the AArch32 and AArch64
handling code. Unstaticify it, so that both sides can make use of it.
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
Message-id: 1368505980-17151-3-git-send-email-john.ri...@linaro.org
Signed-of
On ARM, linux-user emulation includes NWFPE support for emulating the
ancient FPA floating point coprocessor. This has long since been
superseded by VFP and is only required for legacy binaries. The
AArch64 linux-user target doesn't compile in NWFPE support, so make
sure the relevant code is protec
We want gen_set_pc_im() to work for both AArch64 and AArch32, but
to do this we'll need the DisasContext* so we can tell which mode
we're in, so pass it in as a parameter.
Signed-off-by: Peter Maydell
---
target-arm/translate.c | 26 +-
1 file changed, 13 insertions(+),
Make the 'any' CPU for target-arm available only in linux-user mode.
The ARM target provides a CPU named "any", which turns on support for
all user-level instruction set extensions we know about. This is
intended for linux-user emulation mode, where it is the default CPU type.
It makes no sense to
Add a config for aarch64-softmmu; this enables building of this target.
The resulting executable doesn't know about any 64 bit CPUs, but all
the 32 bit CPUs and board models work.
Signed-off-by: Peter Maydell
---
default-configs/aarch64-softmmu.mak | 82 +++
1 f
From: Alexander Graf
This patch adds support for AArch64 in all the small corners of
linux-user (primarily in image loading and startup code).
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
Message-id: 1368505980-17151-11-git-send-email-john.ri...@linaro.org
[PMM:
* removed some unne
From: Alexander Graf
32-bit ARM has a lot of different names for different types of CPUs it supports.
On AArch64, we don't have this, so we really don't want to execute the 32-bit
logic. Stub it out for AArch64 linux-user guests.
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
Message-
If we're building aarch64-linux-user then the 32 bit CPUs are
all unwanted, because they can't possibly execute the 64 bit
binaries we will be running; disable them.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c |9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/
Add a config for aarch64-linux-user, thereby enabling it as
a valid target.
Signed-off-by: Peter Maydell
---
default-configs/aarch64-linux-user.mak |3 +++
1 file changed, 3 insertions(+)
create mode 100644 default-configs/aarch64-linux-user.mak
diff --git a/default-configs/aarch64-linux-u
From: Alexander Graf
Some syscall handlers have special code for ARM enabled that we don't
need on AArch64. Exclude AArch64 in those cases. In other places we
can share struct definitions with other targets or have to provide our
own.
With this patch applied, most syscall definitions in linux-us
From: Alexander Graf
Correct a few places that were using uint32_t or a 32 bit
only format string to handle something that should be a target_ulong.
Signed-off-by: Alexander Graf
Signed-off-by: John Rigby
[PMM: split out to separate patch; added gen_goto_tb() and
gen_set_pc_im() dest params to
Anthony,
The following changes since commit 4ff78e0dbcd5c795962567fdc1b31e9e03c55b07:
Merge remote-tracking branch 'luiz/queue/qmp' into staging (2013-08-30
12:26:04 -0500)
are available in the git repository at:
git://github.com/borntraeger/qemu.git tags/s390-20130902
for you to fetch
On 09/03/2013 02:21 PM, Paul Moore wrote:
On Tuesday, September 03, 2013 02:08:28 PM Corey Bryant wrote:
On 09/03/2013 02:02 PM, Corey Bryant wrote:
On 08/30/2013 10:21 AM, Eduardo Otubo wrote:
On 08/29/2013 05:34 AM, Stefan Hajnoczi wrote:
On Wed, Aug 28, 2013 at 10:04:32PM -0300, Eduardo
Am 21.08.2013 07:44, schrieb Stefan Weil:
> Compiler option -Wextra enables an additional set of compiler warnings.
>
> Some of these warnings were already enabled explicitly in QEMU:
> -Wold-style-declaration, -Wtype-limits, -Wignored-qualifiers and
> -Wempty-body are now redundant and can be remo
On 09/03/2013 02:02 PM, Corey Bryant wrote:
On 08/30/2013 10:21 AM, Eduardo Otubo wrote:
On 08/29/2013 05:34 AM, Stefan Hajnoczi wrote:
On Wed, Aug 28, 2013 at 10:04:32PM -0300, Eduardo Otubo wrote:
Now there's a second whitelist, right before the vcpu starts. The
second
whitelist is the
Hi,
We have a quirky PCI device which requires PCI config write access. We had
modified /etc/xen/xend-pci-permissive.sxp and /etc/xen/xend-pci-quirks.sxp
to give full access to PCI config space of our home grown PCI device for
Xen.
Kindly let me know how we can mention the same in KVM since we a
On Tuesday, September 03, 2013 02:08:28 PM Corey Bryant wrote:
> On 09/03/2013 02:02 PM, Corey Bryant wrote:
> > On 08/30/2013 10:21 AM, Eduardo Otubo wrote:
> >> On 08/29/2013 05:34 AM, Stefan Hajnoczi wrote:
> >>> On Wed, Aug 28, 2013 at 10:04:32PM -0300, Eduardo Otubo wrote:
> Now there's a
On 08/30/2013 10:21 AM, Eduardo Otubo wrote:
On 08/29/2013 05:34 AM, Stefan Hajnoczi wrote:
On Wed, Aug 28, 2013 at 10:04:32PM -0300, Eduardo Otubo wrote:
Now there's a second whitelist, right before the vcpu starts. The second
whitelist is the same as the first one, except for exec() and s
Am 03.09.2013 13:17, schrieb Michael Tokarev:
> 03.09.2013 12:35, Andreas Färber wrote:
>> I also don't understand why qemu-trivial is suddenly picking up Stefan's
>> arm translation patch, it used to be for unmaintained areas only. But
>> arm is not my problem.
>
> Which patch you're talking abou
Rahul, this bug was reported a while ago and there hasn't been any
activity in it recently. We were wondering if this is still an issue? If
so, could you please test for this with the latest server release of
Ubuntu? ISO images are available from http://releases.ubuntu.com/raring/
.
If it remains
Hello list,
I am thinking about QEMU block filters lately.
I am not a block.c/blockdev.c expert so tell me what you think of the following.
The use cases I see would be:
-$user want to have some real cryptography on top of qcow2/qed or another
format.
snapshots and other block features should
Il 03/09/2013 17:28, Alexey Kardashevskiy ha scritto:
> On 09/03/2013 08:42 PM, Jan Kiszka wrote:
>> On 2013-09-03 11:32, Alexey Kardashevskiy wrote:
>>> On 09/03/2013 07:29 PM, Peter Maydell wrote:
On 3 September 2013 09:27, Alexey Kardashevskiy wrote:
> Signed-off-by: Alexey Kardashevsk
On 09/03/2013 10:17 AM, Michael S. Tsirkin wrote:
On Tue, Sep 03, 2013 at 06:08:25PM +1000, Alexey Kardashevskiy wrote:
On PPC64 systems MSI Messages are translated to system IRQ in a PCI
host bridge. This is already supported for emulated MSI/MSIX but
not for irqfd where the current QEMU alloca
On Wed, 2013-09-04 at 01:47 +1000, Alexey Kardashevskiy wrote:
> On 09/04/2013 01:34 AM, Peter Maydell wrote:
> > On 3 September 2013 16:28, Alexey Kardashevskiy wrote:
> >> On 09/03/2013 08:42 PM, Jan Kiszka wrote:
> >>> This shouldn't be routed through trivial in general as things broke too
> >>
ROM layout may change after reset of devices are hotplugged, so we have
to pick up the physical address again when the ROM is initialized. This
is best achieved by resetting the state to INACTIVE.
CC: qemu-sta...@nongnu.org
Signed-off-by: Jan Kiszka
---
hw/i386/kvmvapic.c | 4 +---
1 file change
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