As of 5a49d3e9 we assume SPICE_PORT_EVENT_BREAK to be defined.
However, it is defined not in 0.12.2 what we require now, but in
0.12.3. Therefore in order to prevent build failure we must
adjust our minimal requirements.
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
On Thu, Feb 28, 2013 at 02:12:37PM -0700, Eric Blake wrote:
> On 02/28/2013 05:13 AM, Hu Tao wrote:
> > This patch enables preservation of cpu runstate during save/load vm.
> > So when a vm is restored from snapshot, the cpu runstate is restored,
> > too.
>
> What happens if a management app wants
On Thu, Feb 28, 2013 at 10:52:49AM -0700, Alex Williamson wrote:
> We currently expect to find VGA devices on the root bus but we will
> also support them below bridges iff the VGA routing across the bridges
> is pre-configured. This patch maintains that behavior, but also
> enables SeaBIOS to ena
于 2013-2-28 18:50, Kevin Wolf 写道:
Am 28.02.2013 um 09:09 hat Wenchao Xia geschrieben:
This patch added a new way to savevm: save vmstate as plane contents
instead of stream.
So the idea is that when we introduce internal live snapshots, you don't
keep old state in the saved VM state, but yo
It turns out it is javac in raring chroots which gives me the problem.
I finally realized that the bug is about a libreoffice build in a
precise chroot. I'm running a build (which has been running most of the
day) with qemu-arm-static from a hand-built qemu source tree with this
morning's latest H
于 2013-2-28 0:22, Kevin Wolf 写道:
Am 27.02.2013 um 17:04 hat Markus Armbruster geschrieben:
Wenchao Xia writes:
Signed-off-by: Wenchao Xia
Reviewed-by: Eric Blake
---
block.c | 24
include/block/block.h |2 ++
savevm.c | 22
2013/3/1 Peter Maydell :
> On 27 February 2013 07:15, Kuo-Jung Su wrote:
>> From: Kuo-Jung Su
>>
>> Some ethernet mac relies on the bit ordering reversal functions
>> to performance the multicast address hash code calculation.
>> So I've ported the bitrev.[ch] from linux kernel into QEMU.
>>
>> S
于 2013-2-28 23:57, Stefan Hajnoczi 写道:
On Tue, Feb 26, 2013 at 06:40:14PM +0800, Wenchao Xia wrote:
This serial of patches does two things: merge some info code
in qemu-img, and add following interfaces:
1) qmp: query-images
2) qmp: query-snapshots
3) hmp: show internal snapshot info on a sin
于 2013-2-28 23:24, Stefan Hajnoczi 写道:
On Wed, Feb 27, 2013 at 10:32:13AM +0800, Wenchao Xia wrote:
于 2013-2-26 23:59, Eric Blake 写道:
On 02/26/2013 03:40 AM, Wenchao Xia wrote:
Signed-off-by: Wenchao Xia
In v6, I complained that these functions didn't match the namespace
expected in block.c
于 2013-2-28 23:47, Stefan Hajnoczi 写道:
On Tue, Feb 26, 2013 at 06:40:20PM +0800, Wenchao Xia wrote:
diff --git a/block.c b/block.c
index 8d0145a..71fc9e7 100644
--- a/block.c
+++ b/block.c
@@ -2880,15 +2880,33 @@ SnapshotInfoList
*bdrv_query_snapshot_infolist(BlockDriverState *bs,
return
于 2013-2-28 23:36, Stefan Hajnoczi 写道:
On Tue, Feb 26, 2013 at 06:40:19PM +0800, Wenchao Xia wrote:
diff --git a/include/block/block.h b/include/block/block.h
index e6d915c..51a14f2 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -319,6 +319,13 @@ void bdrv_get_backing_filename
于 2013-2-28 23:41, Stefan Hajnoczi 写道:
On Thu, Feb 28, 2013 at 09:53:53AM +0800, Wenchao Xia wrote:
于 2013-2-27 22:26, Markus Armbruster 写道:
Wenchao Xia writes:
This patch add function bdrv_query_snapshot_infolist(), which will
adds
return snapshot info of an image in qmp object form
于 2013-2-28 23:20, Stefan Hajnoczi 写道:
On Tue, Feb 26, 2013 at 06:40:16PM +0800, Wenchao Xia wrote:
Compared to bdrv_can_snapshot(), this function return whether
bs* is ready to read snapshot info from instead of write. If yes,
caller can then query snapshot information, but taking snapshot
i
2013/3/1 Peter Maydell :
> On 27 February 2013 07:15, Kuo-Jung Su wrote:
>> From: Kuo-Jung Su
>
> Your subject line could be made a little more specific, like this:
> "hw/nand.c: correct the sense of the BUSY/READY status bit".
>
Got it, thanks
>> The BIT6 of Status Register(SR):
>>
>> SR[6] be
Hi,
Thanks for submitting this report. I've removed the security label from
the bug after reading through the comments and the referenced bug.
Modifying argv is not terribly portable and I think a reasonable person
would expect that a password specified on the command line would be
visible throug
ping ...
在 2013-02-27三的 09:17 +0800，liguang写道：
> Signed-off-by: liguang
> ---
> target-i386/cpu.c | 296 ++--
> 1 files changed, 148 insertions(+), 148 deletions(-)
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index aab35c7..ce76055 1
Stefan Berger and I discovered on IRC that virtio-rng is unable to
support fd passing. We attempted:
qemu-system-x86_64 ... -add-fd set=4,fd=34,opaque=RDONLY:/dev/urandom
-object rng-random,id=rng0,filename=/dev/fdset/4 -device
virtio-rng-pci,rng=rng0,bus=pci.0,addr=0x6
qemu-system-x86_64: -devi
On 02/21/2013 03:20 PM, Michael S. Tsirkin wrote:
I don't think people mind using RDMA specifically,
small amounts of data can be sent using SEND commands.
But it's cleaner not to use TCP for parts of data.
Understood. Still debating with my co-workers when and how long it will
take to implemen
On 02/21/2013 03:06 PM, Michael S. Tsirkin wrote:
On Mon, Feb 11, 2013 at 05:49:53PM -0500, Michael R. Hines wrote:
From: "Michael R. Hines"
Signed-off-by: Michael R. Hines
---
include/qemu/rdma.h | 281 ++
migration-rdma.c| 1444 ++
Hi,
Currently migration_bitmap_sync() is very expensive: on the order of
15-20 milliseconds by my count using timestamps (for a simple 2GB ram
virtual machine).
Until new EPT processor versions come out in 2014, we need software
support for cutting this time down much lowerby at least
configure | 11 +
default-configs/i386-softmmu.mak | 2 +
default-configs/x86_64-softmmu.mak | 2 +
hmp-commands.hx| 2 +
hmp.c | 44 ++
hmp.h | 1 +
include/qemu/sockets.h
Each PCI Bridge has a set of implied VGA regions that are enabled
when the VGA bit is set in the bridge control register. This allows
VGA devices behind bridges.
Signed-off-by: Alex Williamson
---
v2: BRIDGE_CONTROL is 2 bytes
hw/pci/pci_bridge.c | 45 +++
On Thu, Feb 28, 2013 at 01:34:39PM -0700, Alex Williamson wrote:
> On Thu, 2013-02-28 at 22:26 +0200, Michael S. Tsirkin wrote:
> > On Thu, Feb 28, 2013 at 12:00:03PM -0700, Alex Williamson wrote:
> > > Each PCI Bridge has a set of implied VGA regions that are enabled
> > > when the VGA bit is set
On Thu, 28 Feb 2013 08:26:54 -0700
Alex Williamson wrote:
> Looking at how this would happen on bare metal,
In coreboot(which can use SeaBIOS as a payload) it currently works like
that (in src/device/device.c ):
/* If we prefer plugin VGA over chipset VGA, the chipset might want to
know. */
if (
On 02/28/2013 05:13 AM, Hu Tao wrote:
> This patch enables preservation of cpu runstate during save/load vm.
> So when a vm is restored from snapshot, the cpu runstate is restored,
> too.
What happens if a management app wants to override the runstate when
restoring the domain? I can think of sev
On Thu, 2013-02-28 at 22:26 +0200, Michael S. Tsirkin wrote:
> On Thu, Feb 28, 2013 at 12:00:03PM -0700, Alex Williamson wrote:
> > Each PCI Bridge has a set of implied VGA regions that are enabled
> > when the VGA bit is set in the bridge control register. This allows
> > VGA devices behind bridg
On Thu, Feb 28, 2013 at 12:00:03PM -0700, Alex Williamson wrote:
> Each PCI Bridge has a set of implied VGA regions that are enabled
> when the VGA bit is set in the bridge control register. This allows
> VGA devices behind bridges.
>
> Signed-off-by: Alex Williamson
> ---
> hw/pci/pci_bridge.c
On Thu, Feb 28, 2013 at 7:42 PM, Markus Armbruster wrote:
> Blue Swirl writes:
>
>> On Thu, Feb 28, 2013 at 8:14 AM, Markus Armbruster wrote:
>>> Blue Swirl writes:
>>>
On Mon, Feb 4, 2013 at 5:19 PM, Markus Armbruster
wrote:
> Test cases are scraped from Markus Kuhn's UTF-8 dec
From: Peter Crosthwaite
Bits in the ISR were continually mirroring their corresponding TX/RX SR bits.
This is incorrect. The ISR bits are only ever set at the time their
corresponding event occurs.
Signed-off-by: Peter Crosthwaite
Message-id:
cedfb6d108318846480b416a6041023ea5a353d6.1360901435
The code for handling the default "unknown command state" case in
pflash_read in pflash_cfi01.c comments "reset state & treat it as
a read". However the code doesn't actually do this. Moving the
default case to the top of the switch so it can fall through into
the read case brings this file into li
The Intel flash command set requires that a read operation after
doing a 'single byte write' command returns the status register;
add this case to pflash_read() so we return the correct information.
Similarly, the case for the 0x28 flavour of block erase was missing.
Signed-off-by: Peter Maydell
Blue Swirl writes:
> On Thu, Feb 28, 2013 at 8:14 AM, Markus Armbruster wrote:
>> Blue Swirl writes:
>>
>>> On Mon, Feb 4, 2013 at 5:19 PM, Markus Armbruster wrote:
Test cases are scraped from Markus Kuhn's UTF-8 decoder capability and
stress test at
http://www.cl.cam.ac.uk/~mgk
On Thu, Feb 28, 2013 at 6:53 PM, Peter Maydell wrote:
> Hi; here's the arm-devs queue. Mostly this is a bunch of Peter C's
> patches. There's a bunch of other stuff bubbling under which will
> probably go into another pullreq in a couple of weeks' time (mostly
> series which failed review or need
From: Peter Crosthwaite
In QEMU emulation, there is no functional difference between the ARM mpcore
private timers and watchdogs. Removed all the distinction between the two from
arm_mptimer.c and converted it to be just the mptimer. a9mpcore and arm11mpcore
just instantiate the same mptimer obje
Each PCI Bridge has a set of implied VGA regions that are enabled
when the VGA bit is set in the bridge control register. This allows
VGA devices behind bridges.
Signed-off-by: Alex Williamson
---
hw/pci/pci_bridge.c | 47 ---
hw/pci/pci_bus.h|
From: Antoine Mathys
The proper mapping between 24 hours and 12 hours modes is:
0 12 AM
1-111-11 AM
12 12 PM
13-23 1-11 PM
Fix code accordingly.
Signed-off-by: Antoine Mathys
Signed-off-by: Peter Maydell
---
hw/ds1338.c |8
1 file changed, 4 insertions(+), 4 dele
From: Peter Crosthwaite
This doesn't happen in the real hardware. The Zynq TRM explicitly states that
this bit has no effect on the rx descriptor pointer ("The receive queue
pointer register is unaffected").
Signed-off-by: Peter Crosthwaite
Message-id:
06fdf92b78ee62d8965779bafd29c8df1a5d2718.
From: Peter Crosthwaite
Trivial find replace on type names "timerblock" and "arm_mptimer_state" to
conform with QEMU coding style.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/arm_mptimer.c | 56 +++-
From: Peter Crosthwaite
Allows for repeating of -sd arguments in the same way as -pflash and -mtdblock.
Acked-by: Igor Mitsyanko
Reviewed-by: Peter Maydell
Signed-off-by: Peter Crosthwaite
Signed-off-by: Peter Maydell
---
vl.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff -
From: Peter Crosthwaite
To conform with QEMU coding style.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Peter Maydell
---
hw/a9mpcore.c| 26 +-
hw/arm11mpcore.c | 20 ++--
2 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/hw/a9
From: Peter Crosthwaite
The device needs to check for queued RX packets when the RX path is re-enabled.
Signed-off-by: Peter Crosthwaite
Message-id:
1fa8c88a3b7c654886d0a7484c2463cd4c2a2781.1360901435.git.peter.crosthwa...@xilinx.com
Signed-off-by: Peter Maydell
---
hw/cadence_gem.c |3 +
From: Peter Crosthwaite
The gem_receive() function replicates the logic for whether or not the device
can rx. Just call the actual gem_can_receive() function in place.
Signed-off-by: Peter Crosthwaite
Message-id:
bf7f93969f3e01fbc76d68d2955307fdbad11bb1.1360901435.git.peter.crosthwa...@xilinx.
From: Peter Crosthwaite
Add some helpful messages that show the rx descriptor pointer moving as packets
are rxed.
Signed-off-by: Peter Crosthwaite
Message-id:
1ef2eb34dade64d589a69a2bcfd5aaddb7d50164.1360901435.git.peter.crosthwa...@xilinx.com
Signed-off-by: Peter Maydell
---
hw/cadence_gem.
Hello,
OK now.
Linux wbmain1 3.5.0-25-generic #38-Ubuntu SMP Mon Feb 18 23:27:42 UTC 2013
x86_64 x86_64 x86_64 GNU/Linux
root@wbmain1:~# kvm -version
QEMU emulator version 1.2.0 (qemu-kvm-1.2.0+noroms-0ubuntu2.12.10.3, Debian),
Copyright (c) 2003-2008 Fabrice Bellard (Proposal)
Usb-Passthrough
On Thu, Feb 28, 2013 at 5:41 PM, Anthony Green wrote:
>
> Signed-off-by: Anthony Green
> ---
> hw/moxie/Makefile.objs | 6 ++
> hw/moxie/moxiesim.c| 175
> +
> include/sysemu/arch_init.h | 1 +
> 3 files changed, 182 insertions(+)
> c
On Thu, Feb 28, 2013 at 5:41 PM, Anthony Green wrote:
>
> Signed-off-by: Anthony Green
> ---
> disas.c | 6 +
> disas/Makefile.objs | 1 +
> disas/moxie.c | 360
>
> include/disas/bfd.h | 66 +-
> 4 files change
Hi; here's the arm-devs queue. Mostly this is a bunch of Peter C's
patches. There's a bunch of other stuff bubbling under which will
probably go into another pullreq in a couple of weeks' time (mostly
series which failed review or need a little more on-list time).
Please pull.
thanks
-- PMM
The
From: Peter Crosthwaite
The Xilinx Zynq device has two SDHCI controllers. Added to the machine model.
Reviewed-by: Peter Maydell
Signed-off-by: Peter Crosthwaite
Signed-off-by: Peter Maydell
---
hw/xilinx_zynq.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/hw/xilinx_zynq
From: Peter Crosthwaite
Currently, M25P80 uses an object property to differentiate between flash parts.
Changed this over to use QOM sub-classes - the actual names of the different
parts
are used to create a set of dynamic classes which passes the part info as class
data. The object no longer ne
From: Peter Crosthwaite
Split the SCU in a9mpcore out into its own object definition. mpcore is now
just a container for the mpcore components.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Peter Maydell
---
hw/a9mpcore.c| 122 +++--
hw/a9scu.c
From: Peter Crosthwaite
This field was write only and thus unused. Removed.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Peter Maydell
---
hw/a9mpcore.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/hw/a9mpcore.c b/hw/a9mpcore.c
index 0032f53..23630af 10
Every bridge needs to know how to map IRQs from it's secondary bus to
the primary bus. We seem to be direct mapped on ioh3420. This avoids
segfaults when trying to put assigned devices behind root ports.
Signed-off-by: Alex Williamson
---
hw/ioh3420.c |7 +++
1 file changed, 7 insertio
On 28 February 2013 17:39, Fabien Chouteau wrote:
> On 02/28/2013 03:16 PM, Peter Maydell wrote:
>> On 28 February 2013 14:01, Fabien Chouteau wrote:
>>> In fact I'm
>>> working on a big-endian R4F (TMS570) and I have endianness issue in the
>>> communication with GDB.
>>
>> If you're also trying
On Thu, Feb 28, 2013 at 8:14 AM, Markus Armbruster wrote:
> Blue Swirl writes:
>
>> On Mon, Feb 4, 2013 at 5:19 PM, Markus Armbruster wrote:
>>> Test cases are scraped from Markus Kuhn's UTF-8 decoder capability and
>>> stress test at
>>> http://www.cl.cam.ac.uk/~mgk25/ucs/examples/UTF-8-test.tx
Stefan Hajnoczi wrote on 28/02/2013 04:43:04 PM:
> > I see your point, but the shared-process only needs access to
> > the virtio ring/buffers (not necessary the entire memory of
> > all the guests), the network sockets and image files opened by
> > all the qemu user-space process. So, if you hav
This adds a new "check-autotest" target that calls out to the
Autotest-based virt-test testsuite. The testsuite is very comprehensive,
however the current state of the "developer- oriented" tools only allows a
small subset of tests to be performed. The tests take around 30 minutes
to run.
To use
On 27 February 2013 22:09, Anthony Green wrote:
> --- a/configure
> +++ b/configure
> @@ -955,6 +955,7 @@ mips-softmmu \
> mipsel-softmmu \
> mips64-softmmu \
> mips64el-softmmu \
> +moxie-softmmu \
> or32-softmmu \
> ppc-softmmu \
> ppcemb-softmmu \
> @@ -3898,7 +3899,7 @@ target_arch2=`ech
We currently expect to find VGA devices on the root bus but we will
also support them below bridges iff the VGA routing across the bridges
is pre-configured. This patch maintains that behavior, but also
enables SeaBIOS to enable VGA routing to the first VGA class device it
finds when there is no p
On 27 February 2013 22:09, Anthony Green wrote:
>
> Signed-off-by: Anthony Green
> ---
> hw/moxie/Makefile.objs | 6 ++
> hw/moxie/moxiesim.c| 175
> +
> include/sysemu/arch_init.h | 1 +
> 3 files changed, 182 insertions(+)
> create
Signed-off-by: Anthony Green
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 12 +++-
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json |
Signed-off-by: Anthony Green
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 175 +
include/sysemu/arch_init.h | 1 +
3 files changed, 182 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/mox
Signed-off-by: Anthony Green
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 66 +-
4 files changed, 401 insertions(+), 32 deletions(-)
create mode 100644 disas/moxie.c
Signed-off-by: Anthony Green
---
target-moxie/Makefile.objs |2 +
target-moxie/cpu.c | 174
target-moxie/cpu.h | 169
target-moxie/helper.c | 100 +
target-moxie/helper.h |6 +
target-moxie/machine.c | 27 ++
target-moxie/mmu.c
This version addresses all of what I understood to be required changes
by Peter Maydell.
Again, I thank everybody who invested time into reviewing this. It's
definitely in much better shape now.
AG
Anthony Green (4):
Add moxie target code
Add moxie disassembler
Add sample moxie system
A
Anthony Liguori writes:
> Markus Armbruster writes:
>
>> Anthony Liguori writes:
>>
>>> Paolo Bonzini writes:
>>>
>>> What about:
>>>
>>> [numa]
>>> node=1
>>> cpus=2
>>> cpus=3
>>>
>>> qemu -readconfig numa.cfg -numa node=1,cpus=1
>>
>> I figure
On 02/28/2013 03:16 PM, Peter Maydell wrote:
> On 28 February 2013 14:01, Fabien Chouteau wrote:
>> On 02/27/2013 09:49 PM, Paul Brook wrote:
>>> I've got a patch to implement this as a side-effect of a different feature,
>>> I'll look at pushing it out.
>>
>> Great, don't hesitate to ask if you w
On 28 February 2013 17:30, Anthony Green wrote:
> On Thu, Feb 28, 2013 at 6:06 AM, Peter Maydell
> wrote:
>> On 27 February 2013 22:09, Anthony Green wrote:
>>> +case 0x31: /* div.l */
>>> +{
>>> +int a = (opcode >> 4) & 0xf;
>>> +int b = opco
Anthony Liguori writes:
> Markus Armbruster writes:
>
>> Related: overwrite something you got from a config file on the command
>> line.
>>
>> In both your example and mine, we have entirely separate options, and
>> they have perfectly ordinary overwrite semantics: each option overwrites
>> the
On 27 February 2013 07:15, Kuo-Jung Su wrote:
> From: Kuo-Jung Su
>
> The s->addr should be reset along with the s->addrlen,
> or it might have the previous address shifted to MSB
> and then causes problem to nand erase operation.
>
> Signed-off-by: Kuo-Jung Su
> ---
> hw/nand.c |1 +
> 1 f
Peter - thanks for reviewing this.
On Thu, Feb 28, 2013 at 6:06 AM, Peter Maydell wrote:
> On 27 February 2013 22:09, Anthony Green wrote:
>> +static const VMStateDescription vmstate_moxie_cpu = {
>> +.name = "cpu",
>> +.unmigratable = 1,
>> +};
>
> Since this is a new CPU it should just
Michael Tokarev writes:
> 28.02.2013 17:55, M. Mohan Kumar wrote:
>> Michael Tokarev writes:
>>
>> Hi,
>>
>> Please try mounting with -oversion=9p2000.L
>>
>> With qemu-1.4.0 and 9p2000.L, I could not recreate this issue. ie not
>> getting Unknown error during directory listing.
>
> Yes, wit
On 27 February 2013 07:15, Kuo-Jung Su wrote:
> From: Kuo-Jung Su
>
> Some ethernet mac relies on the bit ordering reversal functions
> to performance the multicast address hash code calculation.
> So I've ported the bitrev.[ch] from linux kernel into QEMU.
>
> Signed-off-by: Kuo-Jung Su
> ---
>
Public bug reported:
Note: if further information is required, I'll be glad to supply it.
I am using on the host
- HP z800 with 72GB RAM and 2x x5680
- Gentoo 64-bit host (3.7.9 kernel, FGLRX RADEON driver 13.1)
- LIBVIRT 1.0.2 with QEMU(-KVM) 1.4.0
The guest:
- Windows 7 32-bit
- 2GB allocated
Paolo Bonzini writes:
> Il 28/02/2013 14:22, Anthony Liguori ha scritto:
>> At least that makes it testable with make check.
>>> >
>>> > Can you remind me what migration tests we have in make check?
>> I've got fingerprinting tests in qemu-test that dumps all of the details
>> of PCI devices
On 27 February 2013 07:15, Kuo-Jung Su wrote:
> From: Kuo-Jung Su
Your subject line could be made a little more specific, like this:
"hw/nand.c: correct the sense of the BUSY/READY status bit".
> The BIT6 of Status Register(SR):
>
> SR[6] behaves the same as R/B# pin
> SR[6] = 0 indicates t
Le Thursday 28 Feb 2013 à 11:14:34 (+0100), Kevin Wolf a écrit :
> Am 28.02.2013 um 10:41 hat Stefan Hajnoczi geschrieben:
> > On Wed, Feb 27, 2013 at 04:00:28PM +0100, Benoît Canet wrote:
> > > > > -if ((refcount == 1) != ((l2_entry &
> > > > > QCOW_OFLAG_COPIED) != 0)) {
> > > >
On Tue, Feb 26, 2013 at 06:40:14PM +0800, Wenchao Xia wrote:
> This serial of patches does two things: merge some info code
> in qemu-img, and add following interfaces:
> 1) qmp: query-images
> 2) qmp: query-snapshots
> 3) hmp: show internal snapshot info on a single block device
> These patche
On Tue, Feb 26, 2013 at 06:40:20PM +0800, Wenchao Xia wrote:
> diff --git a/block.c b/block.c
> index 8d0145a..71fc9e7 100644
> --- a/block.c
> +++ b/block.c
> @@ -2880,15 +2880,33 @@ SnapshotInfoList
> *bdrv_query_snapshot_infolist(BlockDriverState *bs,
> return head;
> }
>
> -void collec
On 02/27/2013 03:28 AM, Andreas Färber wrote:
Am 27.02.2013 00:03, schrieb jsch...@linux.vnet.ibm.com:
[snip]
I wrote an ASN.1 implementation once, and it seems to me you are mixing
up ASN.1 and BER here in your enum/array/... naming. The types are
general ASN.1 concepts and apply to other enco
On Thu, Feb 28, 2013 at 09:53:53AM +0800, Wenchao Xia wrote:
> 于 2013-2-27 22:26, Markus Armbruster 写道:
> > Wenchao Xia writes:
> >
> >>This patch add function bdrv_query_snapshot_infolist(), which will
> >
> > adds
> >
> >> return snapshot info of an image in qmp object format. The impleme
On 19 February 2013 04:19, Peter Crosthwaite
wrote:
> Configure to use the DTC submodule to build libfdt when no system libfdt
> is found. Prompt to install the DTC submodule if --enable-fdt is set but
> no DTC can be found.
>
> DTC has no out-of-tree build capability, so the configure will symlin
On Tue, Feb 26, 2013 at 06:40:19PM +0800, Wenchao Xia wrote:
> diff --git a/include/block/block.h b/include/block/block.h
> index e6d915c..51a14f2 100644
> --- a/include/block/block.h
> +++ b/include/block/block.h
> @@ -319,6 +319,13 @@ void bdrv_get_backing_filename(BlockDriverState *bs,
>
> The disk is the bottleneck, not memory bandwidth. Hard disks only do
> 10-100 MB/sec and SSDs only do a couple 100 MB/sec. Memory copy is
> insignificant compared to the I/O activity required to copy out the entire
> disk
> image, not to mention delaying guest writes until we read the original
On Thu, 2013-02-28 at 08:50 +0200, Michael S. Tsirkin wrote:
> On Wed, Feb 27, 2013 at 02:16:23PM -0700, Alex Williamson wrote:
> >
> > When we start adding root ports and bridges to systems we need some
> > concept of a primary VGA device.The differentiation of the primary
> > device is that it's
> > Unfortunately, NBD add considerable overheads. I guess the socket
> communications copies data.
> > This is really unnecessary if I can write directly to the output stream.
>
> The disk is the bottleneck, not memory bandwidth. Hard disks only do
> 10-100 MB/sec and SSDs only do a couple 100 M
On Wed, Feb 27, 2013 at 10:32:13AM +0800, Wenchao Xia wrote:
> 于 2013-2-26 23:59, Eric Blake 写道:
> >On 02/26/2013 03:40 AM, Wenchao Xia wrote:
> >>Signed-off-by: Wenchao Xia
> >
> >In v6, I complained that these functions didn't match the namespace
> >expected in block.c. You replied:
> >
> >>>
On Tue, Feb 26, 2013 at 06:40:16PM +0800, Wenchao Xia wrote:
> Compared to bdrv_can_snapshot(), this function return whether
> bs* is ready to read snapshot info from instead of write. If yes,
> caller can then query snapshot information, but taking snapshot
> is not always possible for that *bs
Il 28/02/2013 14:41, Anthony Liguori ha scritto:
>
> This is certainly ambiguous. Does this mean that you have a single cpu
> for the node (VCPU 4) or does it mean the node have 4 cpus (presumably
> ranged 0-3).
>
> Given that ambiguity the following:
>
> qemu -numa node,nodeid=2,cpus=4,cpu
Il 28/02/2013 14:32, Anthony Liguori ha scritto:
>>> >> qemu -numa
>>> >> node=1,cpus=0,cpus=1,cpus=2,cpus=3,cpus=8,cpus=9,cpus=10,cpus=11
>> >
>> > Let me pick up the baby you just threw out with the bathwater for you:
>> >
>> > qemu -numa node,nodeid=1,cpus=0-3,cpus=8-11
> If you're okay with
Il 28/02/2013 14:22, Anthony Liguori ha scritto:
>>> >> At least that makes it testable with make check.
>> >
>> > Can you remind me what migration tests we have in make check?
> I've got fingerprinting tests in qemu-test that dumps all of the details
> of PCI devices. If this is a run time switch
On 02/20/2013 07:37 AM, David Woodhouse wrote:
> On Wed, 2013-02-20 at 16:34 +0100, Paolo Bonzini wrote:
>> Il 20/02/2013 16:18, Laszlo Ersek ha scritto:
> I'm beginning to wish I'd just ignored the fact that
> we need a properly working "soft" reset to get back from 286 protected
> mod
On 19 February 2013 04:16, Peter Crosthwaite
wrote:
> The cross compile CFLAGS are needed to properly build pixman (and any other
> submodules). Only the EXTRA_CFLAGS set is passed to submodules not
> QEMU_CFLAGS,
> so put the cross compile flags in EXTRA_CFLAGS instead.
>
> Signed-off-by: Peter
On Wed, Feb 27, 2013 at 03:50:53PM +, Dietmar Maurer wrote:
> > NBD enables interprocess communication - any form of IPC requires a protocol
> > and NBD is quite a trivial one. What is a simpler way of talking to a
> > backup
> > server?
>
> Unfortunately, NBD add considerable overheads. I g
On Wed, Feb 27, 2013 at 05:25:49PM +0200, Abel Gordon wrote:
>
>
> Stefan Hajnoczi wrote on 26/02/2013 06:45:30 PM:
>
>
> > > But is this significantly different than any other security bug in the
> > > host,
> > > qemu, kvm? If you perform the I/O virtualization in a separate (not
> > > q
[Subject corrected: the issue is about unWRITAble dirs, not unREADable ones]
28.02.2013 17:55, M. Mohan Kumar wrote:
> Michael Tokarev writes:
>
> Hi,
>
> Please try mounting with -oversion=9p2000.L
>
> With qemu-1.4.0 and 9p2000.L, I could not recreate this issue. ie not
> getting Unknown err
On 28 February 2013 14:01, Fabien Chouteau wrote:
> On 02/27/2013 09:49 PM, Paul Brook wrote:
>> I've got a patch to implement this as a side-effect of a different feature,
>> I'll look at pushing it out.
>
> Great, don't hesitate to ask if you want some help.
>
> In the meantime I have another qu
28.02.2013 16:24, M. Mohan Kumar wrote:
> Michael Tokarev writes:
>> 28.02.2013 13:12, Aneesh Kumar K.V wrote:
>>> any specific reason why you are trying 9p .u ?
>>
>> Sorry? What _is_ "9p .u" ? :)
>
> 9p.u is the extension of 9p protocol developed during Linux porting of
> 9p. Original 9p was
On 27 February 2013 05:17, Peter Crosthwaite
wrote:
> Device model for Primecell PL330 DMA controller.
>
> Signed-off-by: Peter Crosthwaite
> Signed-off-by: Kirill Batuzov
> Tested-by: Igor Mitsyanko
> +error_setg(errp, "Bad value for i-cache_len property: %d\n",
> +
On Thu, Feb 28, 2013 at 04:09:44PM +0800, Wenchao Xia wrote:
> diff --git a/arch_init.c b/arch_init.c
> index 8daeafa..0c12095 100644
> --- a/arch_init.c
> +++ b/arch_init.c
> @@ -657,6 +657,245 @@ static int ram_save_iterate(QEMUFile *f, void *opaque)
> return total_sent;
> }
>
> +/* ram s
On 02/27/2013 09:49 PM, Paul Brook wrote:
> I've got a patch to implement this as a side-effect of a different feature,
> I'll look at pushing it out.
Great, don't hesitate to ask if you want some help.
In the meantime I have another question for you. In
helper.c:vfp_gdb_get_reg(), there's a com
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